Searched refs:saved_mask (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/drivers/irqchip/
H A Dirq-brcmstb-l2.c49 u32 saved_mask; /* for suspend/resume */ member in struct:brcmstb_l2_intc_data
90 b->saved_mask = irq_reg_readl(gc, CPU_MASK_STATUS); brcmstb_l2_intc_suspend()
107 irq_reg_writel(gc, ~b->saved_mask & ~gc->wake_active, CPU_CLEAR); brcmstb_l2_intc_resume()
110 irq_reg_writel(gc, b->saved_mask, CPU_MASK_SET); brcmstb_l2_intc_resume()
111 irq_reg_writel(gc, ~b->saved_mask, CPU_MASK_CLEAR); brcmstb_l2_intc_resume()
/linux-4.4.14/drivers/cpufreq/
H A Dia64-acpi-cpufreq.c106 cpumask_t saved_mask; processor_get_freq() local
111 saved_mask = current->cpus_allowed; processor_get_freq()
120 set_cpus_allowed_ptr(current, &saved_mask); processor_get_freq()
130 set_cpus_allowed_ptr(current, &saved_mask); processor_get_freq()
143 cpumask_t saved_mask; processor_set_freq() local
148 saved_mask = current->cpus_allowed; processor_set_freq()
190 set_cpus_allowed_ptr(current, &saved_mask); processor_set_freq()
/linux-4.4.14/arch/arm/mach-omap2/
H A Dprm3xxx.c36 static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
37 static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
182 * @saved_mask: ptr to a u32 array to save IRQENABLE bits
184 * Save the PRM_IRQENABLE_MPU register to @saved_mask. @saved_mask
191 static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask) omap3xxx_prm_save_and_clear_irqen() argument
193 saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD, omap3xxx_prm_save_and_clear_irqen()
203 * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
205 * Restore the PRM_IRQENABLE_MPU register from @saved_mask. Intended
211 static void omap3xxx_prm_restore_irqen(u32 *saved_mask) omap3xxx_prm_restore_irqen() argument
213 omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD, omap3xxx_prm_restore_irqen()
H A Dprm44xx.c38 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
39 static void omap44xx_prm_restore_irqen(u32 *saved_mask);
244 * @saved_mask: ptr to a u32 array to save IRQENABLE bits
247 * @saved_mask. @saved_mask must be allocated by the caller.
253 static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask) omap44xx_prm_save_and_clear_irqen() argument
261 saved_mask[i] = omap44xx_prm_save_and_clear_irqen()
274 * @saved_mask: ptr to a u32 array of IRQENABLE bits saved previously
277 * @saved_mask. Intended to be used in the PRM interrupt handler resume
282 static void omap44xx_prm_restore_irqen(u32 *saved_mask) omap44xx_prm_restore_irqen() argument
287 omap4_prm_write_inst_reg(saved_mask[i], omap44xx_prm_restore_irqen()
H A Dprcm-common.h491 * @saved_mask: IRQENABLE regs are saved here during suspend
497 * @saved_mask, @priority_mask, @base_irq, @suspended, and
512 void (*save_and_clear_irqen)(u32 *saved_mask);
513 void (*restore_irqen)(u32 *saved_mask);
515 u32 *saved_mask; member in struct:omap_prcm_irq_setup
H A Dprm_common.c124 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask); omap_prcm_irq_handler()
215 kfree(prcm_irq_setup->saved_mask); omap_prcm_irq_cleanup()
216 prcm_irq_setup->saved_mask = NULL; omap_prcm_irq_cleanup()
253 prcm_irq_setup->restore_irqen(prcm_irq_setup->saved_mask); omap_prcm_irq_complete()
293 prcm_irq_setup->saved_mask = kzalloc(sizeof(u32) * nr_regs, GFP_KERNEL); omap_prcm_register_chain_handler()
297 if (!prcm_irq_chips || !prcm_irq_setup->saved_mask || omap_prcm_register_chain_handler()
/linux-4.4.14/drivers/acpi/
H A Dprocessor_throttling.c897 cpumask_var_t saved_mask; acpi_processor_get_throttling() local
906 if (!alloc_cpumask_var(&saved_mask, GFP_KERNEL)) acpi_processor_get_throttling()
912 cpumask_copy(saved_mask, &current->cpus_allowed); acpi_processor_get_throttling()
916 free_cpumask_var(saved_mask); acpi_processor_get_throttling()
921 set_cpus_allowed_ptr(current, saved_mask); acpi_processor_get_throttling()
922 free_cpumask_var(saved_mask); acpi_processor_get_throttling()
/linux-4.4.14/arch/m68k/q40/
H A Dq40ints.c194 /*static unsigned short saved_mask;*/

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