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/linux-4.4.14/Documentation/devicetree/bindings/reset/
Dzynq-reset.txt8 - compatible: "xlnx,zynq-reset"
12 - #reset-cells: Must be 1
18 compatible = "xlnx,zynq-reset";
20 #reset-cells = <1>;
25 0 : soft reset
26 32 : ddr reset
27 64 : topsw reset
28 96 : dmac reset
29 128: usb0 reset
30 129: usb1 reset
[all …]
Dreset.txt3 This binding is intended to represent the hardware reset signals present
8 Hardware blocks typically receive a reset signal. This signal is generated by
9 a reset provider (e.g. power management or clock module) and received by a
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
14 A reset signal is represented by the phandle of the provider, plus a reset
15 specifier - a list of DT cells that represents the reset signal within the
16 provider. The length (number of cells) and semantics of the reset specifier
17 are dictated by the binding of the reset provider, although common schemes
20 A word on where to place reset signal consumers in device tree: It is possible
[all …]
Dath79-reset.txt1 Binding for Qualcomm Atheros AR7xxx/AR9XXX reset controller
3 Please also refer to reset.txt in this directory for common reset
7 - compatible: has to be "qca,<soctype>-reset", "qca,ar7100-reset"
10 - #reset-cells : Specifies the number of cells needed to encode reset
15 reset-controller@1806001c {
16 compatible = "qca,ar9132-reset", "qca,ar7100-reset";
19 #reset-cells = <1>;
Dberlin,reset.txt1 Marvell Berlin reset controller
4 Please also refer to reset.txt in this directory for common reset
7 The reset controller node must be a sub-node of the chip controller
11 - compatible: should be "marvell,berlin2-reset"
12 - #reset-cells: must be set to 2
16 chip_rst: reset {
17 compatible = "marvell,berlin2-reset";
18 #reset-cells = <2>;
Dsirf,rstc.txt4 Please also refer to reset.txt in this directory for common reset
11 - #reset-cells: 1, see below
15 rstc: reset-controller@88010000 {
18 #reset-cells = <1>;
21 Specifying reset lines connected to IP modules
24 The reset controller(rstc) manages various reset sources. This module provides
25 reset signals for most blocks in system. Those device nodes should specify the
26 reset line on the rstc in their resets property, containing a phandle to the
27 rstc device node and a RESET_INDEX specifying which module to reset, as described
28 in reset.txt.
Dallwinner,sunxi-clock-reset.txt4 Please also refer to reset.txt in this directory for common reset
9 "allwinner,sun6i-a31-ahb1-reset"
10 "allwinner,sun6i-a31-clock-reset"
13 - #reset-cells: 1, see below
17 ahb1_rst: reset@01c202c0 {
18 #reset-cells = <1>;
19 compatible = "allwinner,sun6i-a31-ahb1-reset";
Dst,sti-picophyreset.txt4 This binding describes a reset controller device that is used to enable and
13 Please refer to Documentation/devicetree/bindings/reset/reset.txt
14 for common reset controller binding usage.
18 - #reset-cells: 1, see below
24 #reset-cells = <1>;
30 Device nodes should specify the reset channel required in their "resets"
33 Documentation/devicetree/bindings/reset/reset.txt.
41 Macro definitions for the supported reset channels can be found in:
42 include/dt-bindings/reset/stih407-resets.h
Dst,sti-powerdown.txt4 This binding describes a reset controller device that is used to enable and
7 registers. These have been grouped together into a single reset controller
15 Please refer to reset.txt in this directory for common reset
21 - #reset-cells: 1, see below
26 #reset-cells = <1>;
34 Device nodes should specify the reset channel required in their "resets"
36 index specifying which channel to use, as described in reset.txt
44 Macro definitions for the supported reset channels can be found in:
46 include/dt-bindings/reset/stih415-resets.h
47 include/dt-bindings/reset/stih416-resets.h
Dfsl,imx-src.txt4 Please also refer to reset.txt in this directory for common reset
13 - #reset-cells: 1, see below
21 #reset-cells = <1>;
24 Specifying reset lines connected to IP modules
27 The system reset controller can be used to reset the GPU, VPU,
29 nodes should specify the reset line on the SRC in their resets
31 RESET_INDEX specifying which module to reset, as described in
32 reset.txt
Dst,sti-softreset.txt4 This binding describes a reset controller device that is used to enable and
14 Please refer to reset.txt in this directory for common reset
20 - #reset-cells: 1, see below
25 #reset-cells = <1>;
33 Device nodes should specify the reset channel required in their "resets"
35 index specifying which channel to use, as described in reset.txt
43 Macro definitions for the supported reset channels can be found in:
45 include/dt-bindings/reset/stih415-resets.h
46 include/dt-bindings/reset/stih416-resets.h
Dnxp,lpc1850-rgu.txt4 Please also refer to reset.txt in this directory for common reset
12 - #reset-cells: should be 1
14 See table below for valid peripheral reset numbers. Numbers not
62 the reset signals and the connected block/peripheral.
65 rgu: reset-controller@40053000 {
70 #reset-cells = <1>;
82 reset-names = "stmmaceth";
Dbrcm,bcm63138-pmb.txt4 Please also refer to reset.txt in this directory for common reset
11 - #reset-cells: must be 2 first cell is the address within the bus instance designated
15 pmb0: reset-controller@4800c0 {
18 #reset-cells = <2>;
Dsocfpga-reset.txt7 - #reset-cells: 1
11 #reset-cells = <1>;
/linux-4.4.14/Documentation/devicetree/bindings/power/reset/
Dkeystone-reset.txt1 * Device tree bindings for Texas Instruments keystone reset
3 This node is intended to allow SoC reset in case of software reset
6 The Keystone SoCs can contain up to 4 watchdog timers to reset
8 block. The Reset Mux block can be configured to cause reset or not.
10 Additionally soft or hard reset can be configured.
14 - compatible: ti,keystone-reset
18 reset control registers.
26 - ti,soft-reset: Boolean option indicating soft reset.
27 By default hard reset is used.
29 - ti,wdt-list: WDT list that can cause SoC reset. It's not related
[all …]
Dsyscon-reboot.txt1 Generic SYSCON mapped register reset driver
3 This is a generic reset driver using syscon to map the reset register.
4 The reset is generally performed with a write to the reset register
12 - mask: the reset value written to the reboot register (32 bit access)
/linux-4.4.14/arch/m68k/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
24 obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
26 obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
28 obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt14 - resets: Must contain an entry for each entry in reset-names.
15 See ../reset/reset.txt for details.
16 - reset-names: Must include the following entries:
30 - resets: Must contain an entry for each entry in reset-names.
31 See ../reset/reset.txt for details.
32 - reset-names: Must include the following entries:
43 - resets: Must contain an entry for each entry in reset-names.
44 See ../reset/reset.txt for details.
45 - reset-names: Must include the following entries:
56 - resets: Must contain an entry for each entry in reset-names.
[all …]
/linux-4.4.14/arch/cris/arch-v10/kernel/
Ddma.c231 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset); in cris_free_dma()
233 IO_STATE_VALUE(R_DMA_CH0_CMD, cmd, reset)); in cris_free_dma()
236 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset); in cris_free_dma()
238 IO_STATE_VALUE(R_DMA_CH1_CMD, cmd, reset)); in cris_free_dma()
241 *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, reset); in cris_free_dma()
243 IO_STATE_VALUE(R_DMA_CH2_CMD, cmd, reset)); in cris_free_dma()
246 *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, reset); in cris_free_dma()
248 IO_STATE_VALUE(R_DMA_CH3_CMD, cmd, reset)); in cris_free_dma()
251 *R_DMA_CH4_CMD = IO_STATE(R_DMA_CH4_CMD, cmd, reset); in cris_free_dma()
253 IO_STATE_VALUE(R_DMA_CH4_CMD, cmd, reset)); in cris_free_dma()
[all …]
/linux-4.4.14/drivers/vfio/platform/
Dvfio_platform_private.h74 int (*reset)(struct vfio_platform_device *vdev); member
83 vfio_platform_reset_fn_t reset; member
106 .reset = __reset, \
110 #define module_vfio_reset_handler(compat, reset) \ argument
112 static int __init reset ## _module_init(void) \
114 vfio_platform_register_reset(compat, reset); \
117 static void __exit reset ## _module_exit(void) \
119 vfio_platform_unregister_reset(compat, reset); \
121 module_init(reset ## _module_init); \
122 module_exit(reset ## _module_exit)
Dvfio_platform_common.c44 reset_fn = iter->reset; in vfio_platform_lookup_reset()
54 vdev->reset = vfio_platform_lookup_reset(vdev->compat, in vfio_platform_get_reset()
56 if (!vdev->reset) { in vfio_platform_get_reset()
58 vdev->reset = vfio_platform_lookup_reset(vdev->compat, in vfio_platform_get_reset()
65 if (vdev->reset) in vfio_platform_put_reset()
144 if (vdev->reset) { in vfio_platform_release()
146 vdev->reset(vdev); in vfio_platform_release()
178 if (vdev->reset) { in vfio_platform_open()
180 vdev->reset(vdev); in vfio_platform_open()
216 if (vdev->reset) in vfio_platform_ioctl()
[all …]
DMakefile6 obj-$(CONFIG_VFIO_PLATFORM) += reset/
12 obj-$(CONFIG_VFIO_AMBA) += reset/
/linux-4.4.14/drivers/clk/qcom/
Dcommon.c28 struct qcom_reset_controller reset; member
99 struct qcom_reset_controller *reset; in qcom_cc_really_probe() local
131 reset = &cc->reset; in qcom_cc_really_probe()
132 reset->rcdev.of_node = dev->of_node; in qcom_cc_really_probe()
133 reset->rcdev.ops = &qcom_reset_ops; in qcom_cc_really_probe()
134 reset->rcdev.owner = dev->driver->owner; in qcom_cc_really_probe()
135 reset->rcdev.nr_resets = desc->num_resets; in qcom_cc_really_probe()
136 reset->regmap = regmap; in qcom_cc_really_probe()
137 reset->reset_map = desc->resets; in qcom_cc_really_probe()
139 ret = reset_controller_register(&reset->rcdev); in qcom_cc_really_probe()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,pericfg.txt4 The Mediatek pericfg controller provides various clocks and reset
13 - #reset-cells: Must be 1
18 Also it uses the common reset controller binding from
19 Documentation/devicetree/bindings/reset/reset.txt.
20 The available reset outputs are defined in
21 dt-bindings/reset-controller/mt*-resets.h
29 #reset-cells = <1>;
Dmediatek,infracfg.txt4 The Mediatek infracfg controller provides various clocks and reset
13 - #reset-cells: Must be 1
18 Also it uses the common reset controller binding from
19 Documentation/devicetree/bindings/reset/reset.txt.
20 The available reset outputs are defined in
21 dt-bindings/reset-controller/mt*-resets.h
29 #reset-cells = <1>;
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dcsr,atlas7-car.txt1 * Clock and reset bindings for CSR atlas7
7 - #reset-cells: Should be <1>
13 The reset consumer should specify the desired reset by having the reset
14 ID in its "reset" phandle cell.
17 Examples: Clock and reset controller node:
23 #reset-cells = <1>;
26 Examples: Consumers using clock or reset:
Drockchip,rk3288-cru.txt4 controllers within the SoC and also implements a reset controller for SoC
13 - #reset-cells: should be 1.
23 used in device tree sources. Similar macros exist for the reset sources in
48 #reset-cells = <1>;
Drockchip,rk3188-cru.txt4 controllers within the SoC and also implements a reset controller for SoC
14 - #reset-cells: should be 1.
25 Similar macros exist for the reset sources in these files.
48 #reset-cells = <1>;
Drockchip,rk3368-cru.txt4 controllers within the SoC and also implements a reset controller for SoC
13 - #reset-cells: should be 1.
23 used in device tree sources. Similar macros exist for the reset sources in
48 #reset-cells = <1>;
Dqcom,lcc.txt13 - #reset-cells : shall contain 1
20 #reset-cells = <1>;
Dnvidia,tegra124-dfll.txt27 - resets: Must contain an entry for each entry in reset-names.
28 See ../reset/reset.txt for details.
29 - reset-names: Must include the following entries:
65 reset-names = "dvco";
Dqcom,mmcc.txt15 - #reset-cells : shall contain 1
25 #reset-cells = <1>;
Dxgene.txt25 reset and/or the divider. Either may be omitted, but at least
37 - csr-offset : Offset to the CSR reset register from the reset address base.
39 - csr-mask : CSR reset mask bit. Default is 0xF.
40 - enable-offset : Offset to the enable register from the reset address base.
Dqcom,gcc.txt19 - #reset-cells : shall contain 1
29 #reset-cells = <1>;
/linux-4.4.14/drivers/reset/
DMakefile2 obj-$(CONFIG_ARCH_LPC18XX) += reset-lpc18xx.o
3 obj-$(CONFIG_ARCH_SOCFPGA) += reset-socfpga.o
4 obj-$(CONFIG_ARCH_BERLIN) += reset-berlin.o
5 obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
7 obj-$(CONFIG_ARCH_ZYNQ) += reset-zynq.o
8 obj-$(CONFIG_ATH79) += reset-ath79.o
DKconfig10 This framework is designed to abstract reset handling of devices
11 via GPIOs or SoC-internal reset controller modules.
15 source "drivers/reset/sti/Kconfig"
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dsoc-ac97link.txt9 "ac97-reset": AC97-link reset state
10 "ac97-warm-reset": AC97-link warm reset state
12 ac97-sdata, ac97-reset
20 pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
Dnvidia,tegra20-ac97.txt7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
18 - nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
19 of the GPIO used to reset the external AC97 codec
29 nvidia,codec-reset-gpio = <&gpio 170 0>;
33 reset-names = "ac97";
Dnvidia,tegra20-i2s.txt7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
27 reset-names = "i2s";
Dnvidia,tegra30-i2s.txt11 - resets : Must contain an entry for each entry in reset-names.
12 See ../reset/reset.txt for details.
13 - reset-names : Must include the following entries:
26 reset-names = "i2s";
Dnvidia,tegra30-hda.txt12 - resets : Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
14 - reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
29 reset-names = "hda", "hda2hdmi", "hda2codec_2x";
Dcs4271.txt19 - reset-gpio: a GPIO spec to define which pin is connected to the chip's
23 - cirrus,enable-soft-reset:
26 without putting the chip back into hardware reset, which also requires
41 reset-gpio = <&gpio 23 0>;
47 reset-gpio = <&gpio 23 0>;
Dcs4349.txt11 - reset-gpios : a GPIO spec for the reset pin.
18 reset-gpios = <&gpio 54 0>;
Dak5386.txt11 - reset-gpio : a GPIO spec for the reset/power down pin.
20 reset-gpio = <&gpio0 23>;
Dtas571x.txt4 signals that can be wired up to GPIOs: reset (strongly recommended), and
15 - reset-gpios: GPIO specifier for the TAS571x's active low reset line
36 reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
Dnvidia,tegra30-ahub.txt18 - resets : Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20 - reset-names : Must include the following entries:
77 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
Dcs4270.txt13 - reset-gpio : a GPIO spec for the reset pin. If specified, it will be
Dadi,adau1701.txt11 - reset-gpio: A GPIO spec to define which pin is connected to the
13 assert a hardware reset at probe time.
32 reset-gpio = <&gpio 23 0>;
Dti,tas5086.txt10 - reset-gpio: A GPIO spec to define which pin is connected to the
12 assert a hardware reset at probe time.
43 reset-gpio = <&gpio 23 0>;
Dcs42l52.txt11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
42 reset-gpio = <&gpio 10 0>;
Dak4104.txt15 - reset-gpio : a GPIO spec for the reset pin. If specified, it will be
Dwm8804.txt18 - wlf,reset-gpio: A GPIO specifier for the GPIO controlling the reset pin
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/4xx/
Dreboot.txt4 software reset mechanism may be overridden. Here the possible values of
7 1 - PPC4xx core reset
8 2 - PPC4xx chip reset
9 3 - PPC4xx system reset (default)
17 reset-type = <2>; /* Use chip-reset */
/linux-4.4.14/Documentation/devicetree/bindings/power_supply/
Daxxia-reset.txt3 This driver can do reset of the Axxia SoC. It uses the registers in the syscon
4 block to initiate a chip reset.
7 -compatible: "lsi,axm55xx-reset"
17 reset: reset@2010031000 {
18 compatible = "lsi,axm55xx-reset";
/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-emmc.txt1 * The simple eMMC hardware reset provider
3 The purpose of this driver is to perform standard eMMC hw reset
9 doesn't have hardware reset logic connected to emmc card and (limited or
15 - reset-gpios : contains a GPIO specifier. The reset GPIO is asserted
16 and then deasserted to perform eMMC card reset. To perform
17 reset procedure as described in Jedec 4.4 specification, the
24 reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
Dnvidia,tegra20-sdhci.txt17 - resets : Must contain an entry for each entry in reset-names.
18 See ../reset/reset.txt for details.
19 - reset-names : Must include the following entries:
33 reset-names = "sdhci";
Dmmc-pwrseq-simple.txt11 - reset-gpios : contains a list of GPIO specifiers. The reset GPIOs are asserted
24 reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
/linux-4.4.14/arch/arm/boot/dts/
Dtegra30.dtsi47 reset-names = "pex", "afi", "pcie_x";
97 reset-names = "host1x";
110 reset-names = "mpe";
119 reset-names = "vi";
128 reset-names = "epp";
137 reset-names = "isp";
146 reset-names = "2d";
157 reset-names = "3d", "3d2";
168 reset-names = "dc";
187 reset-names = "dc";
[all …]
Dtegra20.dtsi19 reset-names = "host1x";
32 reset-names = "mpe";
41 reset-names = "vi";
50 reset-names = "epp";
59 reset-names = "isp";
68 reset-names = "2d";
76 reset-names = "3d";
87 reset-names = "dc";
104 reset-names = "dc";
121 reset-names = "hdmi";
[all …]
Dtegra114.dtsi20 reset-names = "host1x";
33 reset-names = "2d";
41 reset-names = "3d";
52 reset-names = "dc";
71 reset-names = "dc";
90 reset-names = "hdmi";
102 reset-names = "dsi";
118 reset-names = "dsi";
168 #reset-cells = <1>;
213 reset-names = "dma";
[all …]
Dtegra124.dtsi7 #include <dt-bindings/reset/tegra124-car.h>
51 reset-names = "pex", "afi", "pcie_x";
91 reset-names = "host1x";
106 reset-names = "dc";
121 reset-names = "dc";
136 reset-names = "hdmi";
150 reset-names = "sor";
162 reset-names = "dpaux";
191 reset-names = "gpu";
226 #reset-cells = <1>;
[all …]
Dstih41x-b2000.dtsi58 snps,reset-gpio = <&pio106 2>;
59 snps,reset-active-low;
60 snps,reset-delays-us = <0 10000 10000>;
68 snps,reset-gpio = <&pio4 7>;
69 snps,reset-active-low;
70 snps,reset-delays-us = <0 10000 10000>;
Dstih410.dtsi24 reset-names = "global", "port";
35 reset-names = "global", "port";
47 reset-names = "power", "softreset";
63 reset-names = "power", "softreset";
77 reset-names = "power", "softreset";
93 reset-names = "power", "softreset";
153 reset-names = "compo-main", "compo-aux";
163 reset-names = "tvout";
203 reset-names = "hdmi";
Dstih418.dtsi39 reset-names = "global", "port";
48 reset-names = "global", "port";
58 reset-names = "power", "softreset";
72 reset-names = "power", "softreset";
84 reset-names = "power", "softreset";
98 reset-names = "power", "softreset";
Dsun9i-a80.dtsi147 #reset-cells = <1>;
158 #reset-cells = <1>;
393 reset-names = "phy";
416 reset-names = "hsic", "phy";
452 reset-names = "hsic", "phy";
464 reset-names = "ahb";
478 reset-names = "ahb";
492 reset-names = "ahb";
506 reset-names = "ahb";
519 reset-names = "ahb";
[all …]
Dste-hrefv60plus.dtsi176 * pull low to reset state
198 * reset signals low.
213 * Display Interface 1 uses GPIO 65 for RST (reset).
214 * Display Interface 2 uses GPIO 66 for RST (reset).
215 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
Dstih416.dtsi15 #include <dt-bindings/reset/stih416-resets.h>
47 #reset-cells = <1>;
52 #reset-cells = <1>;
199 reset-names = "stmmaceth";
221 reset-names = "stmmaceth";
335 reset-names = "pwr-dwn", "sw-rst";
363 reset-names = "power", "softreset";
378 reset-names = "power", "softreset";
394 reset-names = "power", "softreset";
408 reset-names = "power", "softreset";
[all …]
Dste-nomadik-nhk15.dts43 pins = "GPIO77_B8"; // reset line
55 pins = "GPIO79_C9"; // reset line
79 reset-gpios = <&stmpe_gpio44 10 GPIO_ACTIVE_HIGH>;
94 reset-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>; // GPIO77
136 reset-gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; // GPIO79
Domap3-cm-t3530.dts13 /* Regulator to trigger the reset signal of the Wifi module */
14 mmc2_sdio_reset: regulator-mmc2-sdio-reset {
16 regulator-name = "regulator-mmc2-sdio-reset";
Dstih41x-b2020.dtsi71 snps,reset-gpio = <&pio3 0>;
72 snps,reset-active-low;
73 snps,reset-delays-us = <0 10000 10000>;
Ddove-d3plug.dts93 reset-gpios = <&gpio0 26 1>;
94 reset-delay-us = <20000>;
101 reset-gpios = <&gpio0 25 1>;
Dsun8i-a23-a33.dtsi244 #reset-cells = <1>;
280 reset-names = "ahb";
299 reset-names = "ahb";
318 reset-names = "ahb";
419 ahb1_rst: reset@01c202c0 {
420 #reset-cells = <1>;
421 compatible = "allwinner,sun6i-a31-clock-reset";
425 apb1_rst: reset@01c202d0 {
426 #reset-cells = <1>;
427 compatible = "allwinner,sun6i-a31-clock-reset";
[all …]
Dbcm63138.dtsi112 pmb0: reset-controller@4800c0 {
115 #reset-cells = <2>;
118 pmb1: reset-controller@4800e0 {
121 #reset-cells = <2>;
Dstih407-family.dtsi12 #include <dt-bindings/reset/stih407-resets.h>
98 #reset-cells = <1>;
103 #reset-cells = <1>;
108 #reset-cells = <1>;
336 reset-names = "global", "port";
357 reset-names = "miphy-sw-rst";
373 reset-names = "miphy-sw-rst";
387 reset-names = "miphy-sw-rst";
553 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
574 reset-names = "pwr-dwn",
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/phy/
Dphy-stih407-usb.txt9 - resets : list of phandle and reset specifier pairs. There should be two entries, one
11 - reset-names : list of reset signal names. Should be "global" and "port"
12 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
13 See: Documentation/devicetree/bindings/reset/reset.txt
23 reset-names = "global", "port";
Dnvidia,tegra20-usb-phy.txt26 - resets : Must contain an entry for each entry in reset-names.
27 See ../reset/reset.txt for details.
28 - reset-names : Must include the following entries:
29 - usb: The PHY's own reset signal.
30 - utmi-pads: The reset of the PHY containing the chip-wide UTMI pad control
34 - nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
Dqcom,usb-8x16-phy.txt43 Definition: See reset.txt section "consumers". PHY reset specifier.
45 - reset-names:
71 reset-names = "phy";
Dsun9i-usb-phy.txt15 - resets : a list of phandle + reset specifier pairs
16 - reset-names : depending on the "phy_type" property,
35 reset-names = "hsic", "phy";
Dphy-miphy28lp.txt30 - resets : phandle to the parent reset controller.
31 - reset-names : Associated name must be "miphy-sw-rst".
66 reset-names = "miphy-sw-rst";
82 reset-names = "miphy-sw-rst";
95 reset-names = "miphy-sw-rst";
/linux-4.4.14/drivers/watchdog/
Dmena21_wdt.c47 int reset = 0; in a21_wdt_get_bootstatus() local
49 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST0]) ? (1 << 0) : 0; in a21_wdt_get_bootstatus()
50 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST1]) ? (1 << 1) : 0; in a21_wdt_get_bootstatus()
51 reset |= gpio_get_value(drv->gpios[GPIO_WD_RST2]) ? (1 << 2) : 0; in a21_wdt_get_bootstatus()
53 return reset; in a21_wdt_get_bootstatus()
151 unsigned int reset = 0; in a21_wdt_probe() local
202 reset = a21_wdt_get_bootstatus(drv); in a21_wdt_probe()
203 if (reset == 2) in a21_wdt_probe()
205 else if (reset == 4) in a21_wdt_probe()
207 else if (reset == 5) in a21_wdt_probe()
[all …]
Dmpc8xxx_wdt.c65 static bool reset = 1; variable
66 module_param(reset, bool, 0);
67 MODULE_PARM_DESC(reset,
101 if (reset) in mpc8xxx_wdt_start()
197 reset ? "reset" : "interrupt", timeout, timeout_sec); in mpc8xxx_wdt_probe()
216 reset ? "reset" : "machine check exception"); in mpc8xxx_wdt_remove()
/linux-4.4.14/drivers/phy/
Dphy-sun9i-usb.c47 struct reset_control *reset; member
88 ret = reset_control_deassert(phy->reset); in sun9i_usb_phy_init()
110 reset_control_assert(phy->reset); in sun9i_usb_phy_exit()
149 phy->reset = devm_reset_control_get(dev, "hsic"); in sun9i_usb_phy_probe()
150 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
152 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
161 phy->reset = devm_reset_control_get(dev, "phy"); in sun9i_usb_phy_probe()
162 if (IS_ERR(phy->reset)) { in sun9i_usb_phy_probe()
164 return PTR_ERR(phy->reset); in sun9i_usb_phy_probe()
Dphy-exynos-mipi-video.c54 u32 val, reset; in __set_phy_state() local
57 reset = EXYNOS4_MIPI_PHY_MRESETN; in __set_phy_state()
59 reset = EXYNOS4_MIPI_PHY_SRESETN; in __set_phy_state()
66 val |= reset; in __set_phy_state()
68 val &= ~reset; in __set_phy_state()
80 val |= reset; in __set_phy_state()
82 val &= ~reset; in __set_phy_state()
/linux-4.4.14/Documentation/devicetree/bindings/net/
Dstmmac.txt14 - snps,reset-gpio gpio number for phy reset.
15 - snps,reset-active-low boolean flag to indicate if phy reset is active low.
16 - snps,reset-delays-us is triplet of delays
17 The 1st cell is reset pre-delay in micro seconds.
18 The 2nd cell is reset pulse in micro seconds.
19 The 3rd cell is reset post-delay in micro seconds.
34 - resets: Should contain a phandle to the STMMAC reset signal, if any
35 - reset-names: Should contain the reset signal name "stmmaceth", if a
36 reset phandle is given
Dfsl-fec.txt10 - phy-reset-gpios : Should specify the gpio for phy reset
11 - phy-reset-duration : Reset duration in milliseconds. Should present
12 only if property "phy-reset-gpios" is available. Missing the property
39 phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */
51 phy-reset-gpios = <&gpio2 14 0>; /* GPIO2_14 */
Drockchip-dwmac.txt27 - snps,reset-gpio gpio number for phy reset.
28 - snps,reset-active-low boolean flag to indicate if phy reset is active low.
59 snps,reset-gpio = <&gpio4 7 0>;
60 snps,reset-active-low;
Ddavicom-dm9000.txt14 - reset-gpios : phandle of gpio that will be used to reset chip during probe
26 reset-gpios = <&gpf 12 GPIO_ACTIVE_LOW>;
Dsti-dwmac.txt19 - resets : phandle pointing to the system reset controller with correct
20 reset line index for ethernet reset.
45 reset-names = "stmmaceth";
/linux-4.4.14/drivers/reset/sti/
DMakefile1 obj-$(CONFIG_STI_RESET_SYSCFG) += reset-syscfg.o
3 obj-$(CONFIG_STIH415_RESET) += reset-stih415.o
4 obj-$(CONFIG_STIH416_RESET) += reset-stih416.o
5 obj-$(CONFIG_STIH407_RESET) += reset-stih407.o
Dreset-syscfg.h28 struct reg_field reset; member
34 .reset = REG_FIELD(_rr, _rb, _rb), \
39 .reset = REG_FIELD(_rr, _rb, _rb), }
Dreset-syscfg.c30 struct regmap_field *reset; member
65 err = regmap_field_write(ch->reset, ctrl_val); in syscfg_reset_program_hw()
114 .reset = syscfg_reset_dev,
150 f = devm_regmap_field_alloc(dev, map, data->channels[i].reset); in syscfg_reset_controller_register()
154 rc->channels[i].reset = f; in syscfg_reset_controller_register()
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx4/
Dreset.c44 void __iomem *reset; in mlx4_reset() local
92 reset = ioremap(pci_resource_start(dev->persist->pdev, 0) + in mlx4_reset()
95 if (!reset) { in mlx4_reset()
104 sem = readl(reset + MLX4_SEM_OFFSET); in mlx4_reset()
114 iounmap(reset); in mlx4_reset()
119 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); in mlx4_reset()
120 iounmap(reset); in mlx4_reset()
/linux-4.4.14/Documentation/devicetree/bindings/usb/
Dohci-st.txt16 - resets : phandle to the powerdown and reset controller for the USB IP
17 - reset-names : should be "power" and "softreset".
18 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
19 See: Documentation/devicetree/bindings/reset/reset.txt
36 reset-names = "power", "softreset";
Dnvidia,tegra20-ehci.txt16 - resets : Must contain an entry for each entry in reset-names.
17 See ../reset/reset.txt for details.
18 - reset-names : Must include the following entries:
22 - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
23 USB ports, which need reset twice due to hardware issues.
Dehci-st.txt17 - resets : phandle + reset specifier pairs to the powerdown and softreset lines
19 - reset-names : should be "power" and "softreset"
20 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
21 See: Documentation/devicetree/bindings/reset/reset.txt
38 reset-names = "power", "softreset";
Ddwc3-st.txt13 - resets : list of phandle and reset specifier pairs. There should be two entries, one
15 - reset-names : list of reset signal names. Names should be "powerdown" and "softreset"
16 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
17 See: Documentation/devicetree/bindings/reset/reset.txt
52 reset-names = "powerdown", "softreset";
Dmsm-hsusb.txt35 reset methodology. (optional)
42 - resets: A list of phandle + reset-specifier pairs for the
43 resets listed in reset-names
44 - reset-names: Should contain the following:
45 "phy" USB PHY controller reset
46 "link" USB LINK controller reset
105 reset-names = "phy", "link";
Dallwinner,sun4i-a10-musb.txt9 - reset : reset specifier for the ahb reset (A31 and newer only)
Dusb-ehci.txt15 - needs-reset-on-resume : boolean, set this to force EHCI reset after resume
21 - resets : phandle + reset specifier pair
Dusb-nop-xceiv.txt18 - reset-gpios: Should specify the GPIO for reset.
33 reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
Dusb3503.txt15 - reset-gpios: Should specify GPIO for reset.
34 reset-gpios = <&gpx3 5 1>;
/linux-4.4.14/Documentation/devicetree/bindings/display/
Dssd1307fb.txt11 - reset-gpios: Should contain the GPIO used to reset the OLED display
18 - reset-active-low: Is the reset gpio is active on physical low?
37 reset-gpios = <&gpio2 7>;
38 reset-active-low;
45 reset-gpios = <&gpio2 7>;
46 reset-active-low;
Dst,stih4xx.txt39 See ../reset/reset.txt for details.
40 - reset-names: names of the resets listed in resets property in the same
52 See ../reset/reset.txt for details.
53 - reset-names: names of the resets listed in resets property in the same
112 See ../reset/reset.txt for details.
113 - reset-names: names of the resets listed in resets property in the same
186 reset-names = "compo-main", "compo-aux";
195 reset-names = "tvout";
235 reset-names = "hqvdp";
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Darmada-cpu-reset.txt1 Marvell Armada CPU reset controller
6 - compatible: Should be "marvell,armada-370-cpu-reset".
9 datasheet for the CPU reset registers
12 compatible = "marvell,armada-370-cpu-reset";
/linux-4.4.14/Documentation/devicetree/bindings/watchdog/
Datmel-wdt.txt21 use the at91 watchdog reset. Software watchdog use the watchdog
22 interrupt to trigger a software reset.
23 - atmel,reset-type : Should be "proc" or "all".
24 "all" : assert peripherals and processor reset signals
25 "proc" : assert the processor reset signal
32 watchdog reset time depends on mean CPU usage and will not reset at all
46 atmel,reset-type = "all";
Dmen-a021-wdt.txt9 4: Watchdog reset cause bit 0
10 5: Watchdog reset cause bit 1
11 6: Watchdog reset cause bit 2
Dcadence-wdt.txt11 - reset-on-timeout : If this property exists, then a reset is done
22 reset-on-timeout;
Dst_lpc_wdt.txt26 CPU reset type.
31 - st,warm-reset : If present reset type will be 'warm' - if not it will be cold
41 st,warm-reset;
Datmel-sama5d4-wdt.txt11 "hardware": enable watchdog fault reset. A watchdog fault triggers
12 watchdog reset.
19 watchdog reset time depends on mean CPU usage and will not reset at all
/linux-4.4.14/Documentation/devicetree/bindings/mfd/
Dsun6i-prcm.txt4 (like clks and reset controllers).
12 - see Documentation/devicetree/reset/allwinner,sunxi-clock-reset.txt for reset
56 compatible = "allwinner,sun6i-a31-clock-reset";
57 #reset-cells = <1>;
Dtwl4030-power.txt1 Texas Instruments TWL family (twl4030) reset and power management module
10 "ti,twl4030-power-reset"
14 The use of ti,twl4030-power-reset is recommended at least on
15 3530 that needs a special configuration for warm reset to work.
/linux-4.4.14/drivers/power/reset/
DKconfig2 bool "Board level reset or power off"
4 Provides a number of drivers which either reset a complete board
7 Say Y here to enable board reset and power off
26 tristate "Atmel AT91 reset driver"
34 bool "LSI Axxia reset driver"
42 bool "Broadcom STB reset driver"
128 bool "ARM Versatile Express power-off and reset driver"
132 Power off and reset support for the ARM Ltd. Versatile
136 bool "APM SoC X-Gene reset driver"
142 bool "Keystone reset driver"
[all …]
DMakefile3 obj-$(CONFIG_POWER_RESET_AT91_RESET) += at91-reset.o
4 obj-$(CONFIG_POWER_RESET_AXXIA) += axxia-reset.o
18 obj-$(CONFIG_POWER_RESET_KEYSTONE) += keystone-reset.o
21 obj-$(CONFIG_POWER_RESET_RMOBILE) += rmobile-reset.o
/linux-4.4.14/Documentation/devicetree/bindings/display/panel/
Dsamsung,s6e8aa0.txt8 - reset-gpios: a GPIO spec for the reset pin
13 - reset-delay: delay after reset sequence [ms]
34 reset-gpios = <&gpy4 5 0>;
36 reset-delay = <100>;
Dsamsung,ld9040.txt8 - reset-gpios: a GPIO spec for the reset pin
15 - reset-delay: delay after reset sequence [ms]
34 reset-gpios = <&gpy4 5 0>;
39 reset-delay = <10>;
Dsony,acx565akm.txt9 - reset-gpios: panel reset gpio
23 reset-gpios = <&gpio3 26 GPIO_ACTIVE_HIGH>; /* 90 */
Dtpo,td043mtea1.txt6 - reset-gpios: panel reset gpio
26 reset-gpios = <&gpio7 7 0>;
Dpanel-dsi-cm.txt9 - reset-gpios: panel reset gpio
22 reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
Dsharp,ls037v7dw01.txt11 - reset-gpios: a GPIO spec for the optional reset pin.
33 reset-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>; /* gpio155, lcd RESB */
/linux-4.4.14/Documentation/devicetree/bindings/pwm/
Dnvidia,tegra20-pwm.txt13 - resets: Must contain an entry for each entry in reset-names.
14 See ../reset/reset.txt for details.
15 - reset-names: Must include the following entries:
26 reset-names = "pwm";
/linux-4.4.14/drivers/vfio/platform/reset/
DKconfig2 tristate "VFIO support for calxeda xgmac reset"
5 Enables the VFIO platform driver to handle reset for Calxeda xgmac
10 tristate "VFIO support for AMD XGBE reset"
13 Enables the VFIO platform driver to handle reset for AMD XGBE
/linux-4.4.14/Documentation/devicetree/bindings/spi/
Dnvidia,tegra20-sflash.txt9 - resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11 - reset-names : Must include the following entries:
34 reset-names = "spi";
Dnvidia,tegra20-slink.txt9 - resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11 - reset-names : Must include the following entries:
34 reset-names = "spi";
Dnvidia,tegra114-spi.txt11 - resets : Must contain an entry for each entry in reset-names.
12 See ../reset/reset.txt for details.
13 - reset-names : Must include the following entries:
38 reset-names = "spi";
Dspi-sirf.txt8 - resets: phandle to the reset controller asserting this device in
9 reset
10 See ../reset/reset.txt for details.
/linux-4.4.14/Documentation/devicetree/bindings/dma/
Dtegra20-apbdma.txt10 - resets : Must contain an entry for each entry in reset-names.
11 See ../reset/reset.txt for details.
12 - reset-names : Must include the following entries:
42 reset-names = "dma";
/linux-4.4.14/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt22 - resets: Must contain an entry for each entry in reset-names.
23 See ../reset/reset.txt for details.
24 - reset-names: Must include the following entries:
41 reset-names = "gpu";
/linux-4.4.14/Documentation/devicetree/bindings/input/
Dinput-reset.txt1 Input: sysrq reset sequence
6 specified) the system is sync'ed and reset.
11 The /chosen node should contain a 'linux,sysrq-reset-seq' child node to define
15 sysrq-reset-seq: array of Linux keycodes, one keycode per cell.
25 linux,sysrq-reset-seq {
Dnvidia,tegra20-kbc.txt18 - resets: Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20 - reset-names: Must include the following entries:
43 reset-names = "kbc";
/linux-4.4.14/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra30-actmon.txt17 - resets: Must contain an entry for each entry in reset-names. See
18 ../../reset/reset.txt for details.
19 - reset-names: Must include the following entries:
31 reset-names = "actmon";
Dnvidia,nvec.txt18 - resets : Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20 - reset-names : Must include the following entries:
/linux-4.4.14/Documentation/devicetree/bindings/serial/
Dnvidia,tegra20-hsuart.txt9 - resets : Must contain an entry for each entry in reset-names.
10 See ../reset/reset.txt for details.
11 - reset-names : Must include the following entries:
33 reset-names = "serial";
/linux-4.4.14/Documentation/PCI/
Dpci-error-recovery.txt21 offered, so that the affected PCI device(s) are reset and put back
22 into working condition. The reset phase requires coordination
41 of reset it desires, the choices being a simple re-enabling of I/O
42 or requesting a slot reset.
44 If any driver requests a slot reset, that is what will be done.
46 After a reset and/or a re-enabling of I/O, all drivers are
96 PCI_ERS_RESULT_CAN_RECOVER, /* Device driver can recover without slot reset */
97 PCI_ERS_RESULT_NEED_RESET, /* Device driver wants slot to be reset. */
107 a slot reset. If link_reset() is not implemented, the card is assumed to
146 slot reset.
[all …]
/linux-4.4.14/drivers/isdn/hisax/
Disurf.c126 release_region(cs->hw.isurf.reset, 1); in release_io_isurf()
136 byteout(cs->hw.isurf.reset, chips); /* Reset On */ in reset_isurf()
138 byteout(cs->hw.isurf.reset, ISURF_ISAR_EA); /* Reset Off */ in reset_isurf()
212 cs->hw.isurf.reset = card->para[1]; in setup_isurf()
238 cs->hw.isurf.reset = pnp_port_start(pnp_d, 0); in setup_isurf()
241 if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) { in setup_isurf()
243 cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem); in setup_isurf()
260 if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) { in setup_isurf()
263 cs->hw.isurf.reset); in setup_isurf()
271 release_region(cs->hw.isurf.reset, 1); in setup_isurf()
[all …]
/linux-4.4.14/drivers/crypto/sunxi-ss/
Dsun4i-ss-core.c259 ss->reset = devm_reset_control_get_optional(&pdev->dev, "ahb"); in sun4i_ss_probe()
260 if (IS_ERR(ss->reset)) { in sun4i_ss_probe()
261 if (PTR_ERR(ss->reset) == -EPROBE_DEFER) in sun4i_ss_probe()
262 return PTR_ERR(ss->reset); in sun4i_ss_probe()
264 ss->reset = NULL; in sun4i_ss_probe()
290 if (ss->reset) { in sun4i_ss_probe()
291 err = reset_control_deassert(ss->reset); in sun4i_ss_probe()
375 if (ss->reset) in sun4i_ss_probe()
376 reset_control_assert(ss->reset); in sun4i_ss_probe()
401 if (ss->reset) in sun4i_ss_remove()
[all …]
/linux-4.4.14/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c285 int reset; in mpc5200_psc_ac97_gpio_reset() local
293 reset = PSC1_RESET; /* AC97_1_RES */ in mpc5200_psc_ac97_gpio_reset()
299 reset = PSC2_RESET; /* AC97_2_RES */ in mpc5200_psc_ac97_gpio_reset()
317 setbits8(&wkup_gpio->wkup_gpioe, reset); in mpc5200_psc_ac97_gpio_reset()
320 setbits8(&wkup_gpio->wkup_ddr, reset); in mpc5200_psc_ac97_gpio_reset()
325 clrbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
331 setbits8(&wkup_gpio->wkup_dvo, reset); in mpc5200_psc_ac97_gpio_reset()
/linux-4.4.14/arch/alpha/oprofile/
Dop_model_ev6.c24 unsigned long ctl, reset, need_reset, i; in ev6_reg_setup() local
45 reset = need_reset = 0; in ev6_reg_setup()
54 reset |= (0x100000 - count) << (i ? 6 : 28); in ev6_reg_setup()
58 reg->reset_values = reset; in ev6_reg_setup()
Dop_model_ev5.c30 int i, ctl, reset, need_reset; in common_reg_setup() local
89 ctl = reset = need_reset = 0; in common_reg_setup()
106 reset |= (max - count) << (48 - 16*i); in common_reg_setup()
111 reg->reset_values = reset; in common_reg_setup()
Dop_model_ev67.c25 unsigned long ctl, reset, need_reset, i; in ev67_reg_setup() local
50 reset = need_reset = 0; in ev67_reg_setup()
59 reset |= (0x100000 - count) << (i ? 6 : 28); in ev67_reg_setup()
63 reg->reset_values = reset; in ev67_reg_setup()
/linux-4.4.14/drivers/input/keyboard/
Dsunkbd.c85 volatile s8 reset; member
99 if (sunkbd->reset <= -1) { in sunkbd_interrupt()
104 sunkbd->reset = data; in sunkbd_interrupt()
119 sunkbd->reset = -1; in sunkbd_interrupt()
196 sunkbd->reset = -2; in sunkbd_initialize()
198 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); in sunkbd_initialize()
199 if (sunkbd->reset < 0) in sunkbd_initialize()
202 sunkbd->type = sunkbd->reset; in sunkbd_initialize()
227 wait_event_interruptible_timeout(sunkbd->wait, sunkbd->reset >= 0, HZ); in sunkbd_reinit()
/linux-4.4.14/Documentation/devicetree/bindings/input/touchscreen/
Dtsc2005.txt12 - reset-gpios : GPIO specifier for the controller reset line
17 will reset it. This is disabled by default.
28 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
51 reset-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* 104 */
Dzforce_ts.txt7 - reset-gpios: reset gpio the chip is connected to
26 reset-gpios = <&gpio5 9 0>; /* RST */
/linux-4.4.14/Documentation/devicetree/bindings/ata/
Dahci-st.txt16 - resets : The power-down, soft-reset and power-reset lines of SATA IP
17 - reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
31 reset-names = "pwr-dwn", "sw-rst";
47 reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
Dtegra-sata.txt18 - resets : Must contain an entry for each entry in reset-names.
19 See ../reset/reset.txt for details.
20 - reset-names : Must include the following entries:
Datmel-at91_cf.txt7 and reset gpio's are mandatory while irq and vcc gpio's are
17 &pioC 5 0 /* reset */
/linux-4.4.14/drivers/clk/sunxi/
Dclk-sun9i-mmc.c37 struct reset_control *reset; member
127 data->reset = devm_reset_control_get(&pdev->dev, NULL); in sun9i_a80_mmc_config_clk_probe()
128 if (IS_ERR(data->reset)) { in sun9i_a80_mmc_config_clk_probe()
130 return PTR_ERR(data->reset); in sun9i_a80_mmc_config_clk_probe()
133 ret = reset_control_deassert(data->reset); in sun9i_a80_mmc_config_clk_probe()
181 reset_control_assert(data->reset); in sun9i_a80_mmc_config_clk_probe()
198 reset_control_assert(data->reset); in sun9i_a80_mmc_config_clk_remove()
/linux-4.4.14/drivers/net/can/softing/
Dsofting_cs.c49 .reset = softingcs_reset,
61 .reset = softingcs_reset,
73 .reset = softingcs_reset,
85 .reset = softingcs_reset,
97 .reset = softingcs_reset,
109 .reset = softingcs_reset,
121 .reset = softingcs_reset,
133 .reset = softingcs_reset,
145 .reset = softingcs_reset,
/linux-4.4.14/drivers/net/wireless/cw1200/
Dcw1200_sdio.c191 if (pdata->reset) { in cw1200_sdio_off()
192 gpio_set_value(pdata->reset, 0); in cw1200_sdio_off()
194 gpio_free(pdata->reset); in cw1200_sdio_off()
208 if (pdata->reset) { in cw1200_sdio_on()
209 gpio_request(pdata->reset, "cw1200_wlan_reset"); in cw1200_sdio_on()
210 gpio_direction_output(pdata->reset, 0); in cw1200_sdio_on()
216 if (pdata->reset || pdata->powerup) in cw1200_sdio_on()
242 if (pdata->reset) { in cw1200_sdio_on()
243 gpio_set_value(pdata->reset, 1); in cw1200_sdio_on()
Dcw1200_spi.c287 if (pdata->reset) { in cw1200_spi_off()
288 gpio_set_value(pdata->reset, 0); in cw1200_spi_off()
290 gpio_free(pdata->reset); in cw1200_spi_off()
304 if (pdata->reset) { in cw1200_spi_on()
305 gpio_request(pdata->reset, "cw1200_wlan_reset"); in cw1200_spi_on()
306 gpio_direction_output(pdata->reset, 0); in cw1200_spi_on()
312 if (pdata->reset || pdata->powerup) in cw1200_spi_on()
338 if (pdata->reset) { in cw1200_spi_on()
339 gpio_set_value(pdata->reset, 1); in cw1200_spi_on()
/linux-4.4.14/sound/core/seq/oss/
Dseq_oss_writeq.c80 struct snd_seq_remove_events reset; in snd_seq_oss_writeq_clear() local
82 memset(&reset, 0, sizeof(reset)); in snd_seq_oss_writeq_clear()
83 reset.remove_mode = SNDRV_SEQ_REMOVE_OUTPUT; /* remove all */ in snd_seq_oss_writeq_clear()
84 snd_seq_oss_control(q->dp, SNDRV_SEQ_IOCTL_REMOVE_EVENTS, &reset); in snd_seq_oss_writeq_clear()
/linux-4.4.14/Documentation/devicetree/bindings/thermal/
Drockchip-thermal.txt14 - resets : Must contain an entry for each entry in reset-names.
15 See ../reset/reset.txt for details.
16 - reset-names : Must include the name "tsadc-apb".
19 - pinctrl-1 : The "default" pinctrl state, it will be set after reset the
36 reset-names = "tsadc-apb";
Dtegra-soctherm.txt21 - resets : Must contain an entry for each entry in reset-names.
22 See ../reset/reset.txt for details.
23 - reset-names : Must include the following entries:
40 reset-names = "soctherm";
/linux-4.4.14/drivers/media/usb/dvb-usb/
Ddvb-usb-firmware.c39 u8 reset; in usb_cypress_load_firmware() local
43 reset = 1; in usb_cypress_load_firmware()
44 if ((ret = usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1)) != 1) in usb_cypress_load_firmware()
66 reset = 0; in usb_cypress_load_firmware()
67 if (ret || usb_cypress_writemem(udev,cypress[type].cpu_cs_register,&reset,1) != 1) { in usb_cypress_load_firmware()
/linux-4.4.14/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.txt23 - resets: Must contain an entry for each entry in reset-names.
24 See ../reset/reset.txt for details.
25 - reset-names: Must include the following entries:
44 reset-names = "axi", "ahb", "dclk";
/linux-4.4.14/Documentation/devicetree/bindings/fuse/
Dnvidia,tegra20-fuse.txt23 - resets: Must contain an entry for each entry in reset-names.
24 See ../reset/reset.txt for details.
25 - reset-names: Must include the following entries:
37 reset-names = "fuse";
/linux-4.4.14/Documentation/devicetree/bindings/rtc/
Dmoxa,moxart-rtc.txt8 - gpio-rtc-reset : RTC reset gpio, with zero flags
16 gpio-rtc-reset = <&gpio 7 0>;
/linux-4.4.14/drivers/media/dvb-frontends/
Dlgdt330x.c133 u8 reset[] = { in lgdt3302_SwReset() local
140 reset, sizeof(reset)); in lgdt3302_SwReset()
144 reset[1] = 0x7f; in lgdt3302_SwReset()
146 reset, sizeof(reset)); in lgdt3302_SwReset()
154 u8 reset[] = { in lgdt3303_SwReset() local
160 reset, sizeof(reset)); in lgdt3303_SwReset()
164 reset[1] = 0x01; in lgdt3303_SwReset()
166 reset, sizeof(reset)); in lgdt3303_SwReset()
/linux-4.4.14/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_init.c1678 p_dev->ahw->reset.seq_error++; in qlcnic_83xx_poll_reg()
1681 __func__, p_dev->ahw->reset.seq_index); in qlcnic_83xx_poll_reg()
1693 u16 *buff = (u16 *)p_dev->ahw->reset.buff; in qlcnic_83xx_reset_template_checksum()
1694 int count = p_dev->ahw->reset.hdr->size / sizeof(u16); in qlcnic_83xx_reset_template_checksum()
1716 if (ahw->reset.buff != NULL) { in qlcnic_83xx_get_reset_instruction_template()
1720 kfree(ahw->reset.buff); in qlcnic_83xx_get_reset_instruction_template()
1725 ahw->reset.seq_error = 0; in qlcnic_83xx_get_reset_instruction_template()
1726 ahw->reset.buff = kzalloc(QLC_83XX_RESTART_TEMPLATE_SIZE, GFP_KERNEL); in qlcnic_83xx_get_reset_instruction_template()
1727 if (p_dev->ahw->reset.buff == NULL) in qlcnic_83xx_get_reset_instruction_template()
1730 p_buff = p_dev->ahw->reset.buff; in qlcnic_83xx_get_reset_instruction_template()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/net/nfc/
Dnfcmrvl.txt12 - reset-n-io: Output GPIO pin used to reset the chip (active low).
33 reset-n-io = <&gpio3 16 0>;
60 reset-n-io = <&gpio3 19 0>;
84 reset-n-io = <&gpio3 19 0>;
Dst-nci-spi.txt8 - reset-gpios: Output GPIO pin used to reset the ST21NFCB
33 reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
Dst-nci-i2c.txt9 - reset-gpios: Output GPIO pin used to reset the ST21NFCB
35 reset-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
/linux-4.4.14/drivers/media/pci/mantis/
Dhopper_vp3028.c50 mantis_gpio_set_bits(mantis, config->reset, 0); in vp3028_frontend_init()
54 mantis_gpio_set_bits(mantis, config->reset, 1); in vp3028_frontend_init()
87 .reset = GPIF_A03,
Dmantis_vp3030.c62 mantis_gpio_set_bits(mantis, config->reset, 0); in vp3030_frontend_init()
66 mantis_gpio_set_bits(mantis, config->reset, 1); in vp3030_frontend_init()
102 .reset = GPIF_A13,
/linux-4.4.14/drivers/block/
Dhd.c115 static int reset; variable
318 if (reset) in hd_out()
321 reset = 1; in hd_out()
371 if (reset) { in reset_hd()
372 reset = 0; in reset_hd()
377 if (reset) in reset_hd()
385 if (reset) in reset_hd()
425 reset = 1; in bad_rw_intr()
541 reset = 1; in hd_times_out()
559 return reset; in do_special_op()
[all …]
/linux-4.4.14/drivers/input/misc/
Dpmic8xxx-pwrkey.c139 bool reset = system_state == SYSTEM_RESTART; in pmic8xxx_pwrkey_shutdown() local
142 error = pwrkey->shutdown_fn(pwrkey, reset); in pmic8xxx_pwrkey_shutdown()
155 if (!reset) in pmic8xxx_pwrkey_shutdown()
288 static int pm8058_pwrkey_shutdown(struct pmic8xxx_pwrkey *pwrkey, bool reset) in pm8058_pwrkey_shutdown() argument
295 if (!reset) { in pm8058_pwrkey_shutdown()
323 if (reset) in pm8058_pwrkey_shutdown()
328 static int pm8921_pwrkey_shutdown(struct pmic8xxx_pwrkey *pwrkey, bool reset) in pm8921_pwrkey_shutdown() argument
335 if (reset) in pm8921_pwrkey_shutdown()
/linux-4.4.14/Documentation/mic/mpssd/
Dmicctrl58 echo reset > $f/state
61 reset() function
157 reset $2
/linux-4.4.14/Documentation/devicetree/bindings/iio/
Dsensorhub.txt13 - mcu-reset-gpios: [out] sensorhub reset
24 mcu-reset-gpios = <&gpx0 5 0>;
/linux-4.4.14/Documentation/hwmon/
Dw83l786ng16 * reset boolean
18 Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default
19 behavior is no chip reset to preserve BIOS settings
Dltc294554 in1_reset_history Write 1 to reset in1 history
63 in2_reset_history Write 1 to reset in2 history
72 curr1_reset_history Write 1 to reset curr1 history
82 power1_reset_history Write 1 to reset power1 history
/linux-4.4.14/drivers/gpu/drm/i915/
Di915_params.c46 .reset = true,
103 module_param_named_unsafe(reset, i915.reset, bool, 0600);
104 MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmfmac/
Dchip.h76 int (*reset)(void *ctx, struct brcmf_chip *chip); member
87 void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset);
88 void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset,
/linux-4.4.14/Documentation/devicetree/bindings/media/i2c/
Dmt9p031.txt17 - reset-gpios: Chip reset GPIO
30 reset-gpios = <&gpio3 30 0>;
Dadv7604.txt36 - reset-gpios: Reference to the GPIO connected to the device's reset pin.
50 - default-input: Select which input is selected after reset.
58 reset-gpios = <&ioexp 0 GPIO_ACTIVE_LOW>;
Dtc358743.txt14 - reset-gpios: gpio phandle GPIO connected to the reset pin
35 reset-gpios = <&gpio6 9 GPIO_ACTIVE_LOW>;
/linux-4.4.14/drivers/usb/misc/
Didmouse.c141 goto reset; in idmouse_create_image()
144 goto reset; in idmouse_create_image()
150 goto reset; in idmouse_create_image()
153 goto reset; in idmouse_create_image()
159 goto reset; in idmouse_create_image()
162 goto reset; in idmouse_create_image()
187 reset: in idmouse_create_image()
/linux-4.4.14/Documentation/devicetree/bindings/media/
Dsi4713.txt14 - reset-gpios: GPIO specifier for the chips reset line
26 reset-gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 */
/linux-4.4.14/arch/s390/include/asm/
Dreset.h16 extern void register_reset_call(struct reset_call *reset);
17 extern void unregister_reset_call(struct reset_call *reset);
/linux-4.4.14/arch/mips/boot/dts/qca/
Dar9132.dtsi119 rst: reset-controller@1806001c {
120 compatible = "qca,ar9132-reset",
121 "qca,ar7100-reset";
124 #reset-cells = <1>;
/linux-4.4.14/Documentation/xtensa/
Dmmu.txt18 TLBs are in their reset state.
19 ITLBCFG and DTLBCFG are zero (reset state).
20 RASID is 0x04030201 (reset state).
21 PS.RING is zero (reset state).
22 LITBASE is zero (reset state, PC-relative literals); required to be PIC.
/linux-4.4.14/Documentation/devicetree/bindings/gpio/
Dgpio-restart.txt4 This binding supports level and edge triggered reset. At driver load
12 triggering a level triggered reset condition. This will also cause an
14 reset. After a delay specified by active-delay, the GPIO is set to
16 triggered reset. After a delay specified by inactive-delay, the GPIO
24 low to reset the board set it to "Active Low", otherwise set
/linux-4.4.14/tools/testing/selftests/ftrace/test.d/
Dfunctions2 clear_trace() { # reset trace output
14 reset_tracer() { # reset the current tracer
/linux-4.4.14/Documentation/DocBook/
Dw1.xml.db25 API-w1-reset-bus
26 API-w1-reset-select-slave
27 API-w1-reset-resume-command
/linux-4.4.14/drivers/clk/sirf/
Dclk-atlas7.c1392 struct atlas7_reset_desc *reset = &atlas7_reset_unit[reset_idx]; in atlas7_reset_module() local
1405 spin_lock_irqsave(reset->lock, flags); in atlas7_reset_module()
1407 if (clkc_readl(reset->clk_ofs + 8) & (1 << reset->clk_bit)) { in atlas7_reset_module()
1408 clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4); in atlas7_reset_module()
1410 clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4); in atlas7_reset_module()
1411 clkc_writel(1 << reset->rst_bit, reset->rst_ofs); in atlas7_reset_module()
1413 clkc_writel(1 << reset->clk_bit, reset->clk_ofs); in atlas7_reset_module()
1415 clkc_writel(1 << reset->rst_bit, reset->rst_ofs + 4); in atlas7_reset_module()
1416 clkc_writel(1 << reset->clk_bit, reset->clk_ofs); in atlas7_reset_module()
1418 clkc_writel(1 << reset->clk_bit, reset->clk_ofs + 4); in atlas7_reset_module()
[all …]
/linux-4.4.14/drivers/video/backlight/
Dbd6107.c100 gpio_set_value(bd->pdata->reset, 0); in bd6107_backlight_update_status()
102 gpio_set_value(bd->pdata->reset, 1); in bd6107_backlight_update_status()
131 if (pdata == NULL || !pdata->reset) { in bd6107_probe()
150 ret = devm_gpio_request_one(&client->dev, pdata->reset, in bd6107_probe()
Dhx8357.c88 unsigned reset; member
325 gpio_set_value(lcd->reset, 1); in hx8357_lcd_reset()
327 gpio_set_value(lcd->reset, 0); in hx8357_lcd_reset()
329 gpio_set_value(lcd->reset, 1); in hx8357_lcd_reset()
605 lcd->reset = of_get_named_gpio(spi->dev.of_node, "gpios-reset", 0); in hx8357_probe()
606 if (!gpio_is_valid(lcd->reset)) { in hx8357_probe()
611 ret = devm_gpio_request_one(&spi->dev, lcd->reset, in hx8357_probe()
617 lcd->reset, ret); in hx8357_probe()
/linux-4.4.14/include/linux/
Dftrace.h376 int remove, int reset);
378 int len, int reset);
380 int len, int reset);
381 void ftrace_set_global_filter(unsigned char *buf, int len, int reset);
382 void ftrace_set_global_notrace(unsigned char *buf, int len, int reset);
624 #define ftrace_set_filter_ip(ops, ip, remove, reset) ({ -ENODEV; }) argument
625 #define ftrace_set_filter(ops, buf, len, reset) ({ -ENODEV; }) argument
626 #define ftrace_set_notrace(ops, buf, len, reset) ({ -ENODEV; }) argument
/linux-4.4.14/Documentation/devicetree/bindings/c6x/
Dclocks.txt26 - ti,c64x+pll-reset-delay: CPU cycles to delay after PLL reset
38 ti,c64x+pll-reset-delay = <12000>;
/linux-4.4.14/arch/arm/mach-davinci/
Dclock.h106 int (*reset) (struct clk *clk, bool reset); member
133 int davinci_clk_reset(struct clk *clk, bool reset);
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/
Dguts.txt4 enabling, power-on-reset configuration monitoring, general-purpose
22 contains a functioning "reset control register" (i.e. the board
23 is wired to reset upon setting the HRESET_REQ bit in this register).
/linux-4.4.14/drivers/infiniband/hw/mthca/
Dmthca_reset.c148 void __iomem *reset = ioremap(pci_resource_start(mdev->pdev, 0) + in mthca_reset() local
151 if (!reset) { in mthca_reset()
158 writel(MTHCA_RESET_VALUE, reset); in mthca_reset()
159 iounmap(reset); in mthca_reset()
/linux-4.4.14/include/linux/platform_data/
Dnet-cw1200.h17 int reset; /* GPIO to RSTn signal (0 disables) */ member
33 int reset; /* GPIO to RSTn signal (0 disables) */ member
/linux-4.4.14/drivers/staging/fbtft/
Dfb_agm1264k-fl.c77 par->fbtftops.reset(par); in init_display()
89 static void reset(struct fbtft_par *par) in reset() function
91 if (par->gpio.reset == -1) in reset()
96 gpio_set_value(par->gpio.reset, 0); in reset()
98 gpio_set_value(par->gpio.reset, 1); in reset()
443 .reset = reset,
/linux-4.4.14/kernel/trace/
Dtrace_selftest.c391 trace->reset(tr); in trace_selftest_startup_dynamic_tracing()
399 trace->reset(tr); in trace_selftest_startup_dynamic_tracing()
686 trace->reset(tr); in trace_selftest_startup_function()
789 trace->reset(tr); in trace_selftest_startup_function_graph()
845 trace->reset(tr); in trace_selftest_startup_irqsoff()
907 trace->reset(tr); in trace_selftest_startup_preemptoff()
1015 trace->reset(tr); in trace_selftest_startup_preemptirqsoff()
1135 trace->reset(tr); in trace_selftest_startup_wakeup()
1172 trace->reset(tr); in trace_selftest_startup_sched_switch()
1204 trace->reset(tr); in trace_selftest_startup_branch()
/linux-4.4.14/drivers/staging/speakup/
Dkobjects.c81 static void report_char_chartab_status(int reset, int received, int used, in report_char_chartab_status() argument
91 if (reset) { in report_char_chartab_status()
125 int reset = 0; in chars_chartab_store() local
139 reset = 1; in chars_chartab_store()
176 reset = 1; /* just reset on error. */ in chars_chartab_store()
208 if (reset) { in chars_chartab_store()
216 report_char_chartab_status(reset, received, used, rejected, in chars_chartab_store()
721 static void report_msg_status(int reset, int received, int used, in report_msg_status() argument
727 if (reset) { in report_msg_status()
756 int reset = 0; in message_store_helper() local
[all …]
/linux-4.4.14/net/ceph/
Dauth_none.c14 static void reset(struct ceph_auth_client *ac) in reset() function
110 .reset = reset,
/linux-4.4.14/drivers/soc/dove/
Dpmu.c36 struct reset_controller_dev reset; member
45 #define rcdev_to_pmu(rcdev) container_of(rcdev, struct pmu_data, reset)
91 .reset = pmu_reset_reset,
106 pmu->reset = pmu_reset; in pmu_reset_init()
107 pmu->reset.of_node = pmu->of_node; in pmu_reset_init()
109 ret = reset_controller_register(&pmu->reset); in pmu_reset_init()
/linux-4.4.14/arch/xtensa/boot/boot-elf/
Dbootstrap.S28 .global reset
69 reset: label
/linux-4.4.14/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt50 - resets: Must contain an entry for each entry in reset-names.
51 See ../reset/reset.txt for details.
52 - reset-names: Must include the following entries:
71 reset-names = "i2c";
/linux-4.4.14/drivers/clk/bcm/
Dclk-iproc-pll.c215 const struct iproc_pll_reset_ctrl *reset = &ctrl->reset; in __pll_put_in_reset() local
217 val = readl(pll->control_base + reset->offset); in __pll_put_in_reset()
218 val &= ~(1 << reset->reset_shift | 1 << reset->p_reset_shift); in __pll_put_in_reset()
219 iproc_pll_write(pll, pll->control_base, reset->offset, val); in __pll_put_in_reset()
227 const struct iproc_pll_reset_ctrl *reset = &ctrl->reset; in __pll_bring_out_reset() local
238 val = readl(pll->control_base + reset->offset); in __pll_bring_out_reset()
239 val |= 1 << reset->reset_shift | 1 << reset->p_reset_shift; in __pll_bring_out_reset()
240 iproc_pll_write(pll, pll->control_base, reset->offset, val); in __pll_bring_out_reset()
/linux-4.4.14/drivers/mfd/
Ducb1x00-core.c508 if (pdata && pdata->reset) in ucb1x00_probe()
509 pdata->reset(UCB_RST_PROBE); in ucb1x00_probe()
613 if (pdata && pdata->reset) in ucb1x00_probe()
614 pdata->reset(UCB_RST_PROBE_FAIL); in ucb1x00_probe()
639 if (pdata && pdata->reset) in ucb1x00_remove()
640 pdata->reset(UCB_RST_REMOVE); in ucb1x00_remove()
697 } else if (pdata && pdata->reset) in ucb1x00_suspend()
698 pdata->reset(UCB_RST_SUSPEND); in ucb1x00_suspend()
709 if (!ucb->irq_wake && pdata && pdata->reset) in ucb1x00_resume()
710 pdata->reset(UCB_RST_RESUME); in ucb1x00_resume()
/linux-4.4.14/net/core/
Drequest_sock.c98 bool reset) in reqsk_fastopen_remove() argument
112 if (!reset || lsk->sk_state != TCP_LISTEN) { in reqsk_fastopen_remove()

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