Home
last modified time | relevance | path

Searched refs:prediv (Results 1 – 20 of 20) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/clock/st/
Dst,clkgen-prediv.txt12 "st,clkgena-prediv-c65", "st,clkgena-prediv"
13 "st,clkgena-prediv-c32", "st,clkgena-prediv"
26 clk_m_a2_osc_prediv: clk-m-a2-osc-prediv {
28 compatible = "st,clkgena-prediv-c32",
29 "st,clkgena-prediv";
33 clock-output-names = "clk-m-a2-osc-prediv";
Dst,clkgen.txt49 [5] Documentation/devicetree/bindings/clock/st,clkgen-prediv.txt
75 clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
77 compatible = "st,clkgena-prediv-c65",
78 "st,clkgena-prediv";
82 clock-output-names = "clk-s-a0-osc-prediv";
Dst,clkgen-pll.txt12 "st,clkgena-prediv-c65", "st,clkgena-prediv"
13 "st,clkgena-prediv-c32", "st,clkgena-prediv"
/linux-4.4.14/arch/mips/ar7/
Dclock.c84 u32 prediv; member
111 static void approximate(int base, int target, int *prediv, in approximate() argument
122 *prediv = j; in approximate()
128 static void calculate(int base, int target, int *prediv, int *postdiv, in calculate() argument
133 for (*prediv = 1; *prediv <= 32; (*prediv)++) { in calculate()
134 tmp_base = base / *prediv; in calculate()
144 if (base / *prediv * *mul / *postdiv != target) { in calculate()
145 approximate(base, target, prediv, postdiv, mul); in calculate()
146 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
153 *prediv, *postdiv, *mul); in calculate()
[all …]
/linux-4.4.14/arch/arm/mach-davinci/
Dclock.c416 u32 ctrl, mult = 1, prediv = 1, postdiv = 1; in clk_pllclk_recalc() local
435 prediv = __raw_readl(pll->base + PREDIV); in clk_pllclk_recalc()
436 if (prediv & PLLDIV_EN) in clk_pllclk_recalc()
437 prediv = (prediv & pll->div_ratio_mask) + 1; in clk_pllclk_recalc()
439 prediv = 1; in clk_pllclk_recalc()
444 prediv = 8; in clk_pllclk_recalc()
455 rate /= prediv; in clk_pllclk_recalc()
464 if (prediv > 1) in clk_pllclk_recalc()
465 pr_debug("/ %d ", prediv); in clk_pllclk_recalc()
485 int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, in davinci_set_pllrate() argument
[all …]
Dda850.c946 unsigned int prediv; member
955 .prediv = 1,
964 .prediv = 1,
973 .prediv = 2,
982 .prediv = 1,
991 .prediv = 1,
1000 .prediv = 1,
1126 unsigned int prediv, mult, postdiv; in da850_set_pll0rate() local
1132 prediv = opp->prediv; in da850_set_pll0rate()
1136 ret = davinci_set_pllrate(pll, prediv, mult, postdiv); in da850_set_pll0rate()
Dclock.h128 int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
/linux-4.4.14/arch/arm/boot/dts/
Dstih415-clock.dtsi43 clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
45 compatible = "st,clkgena-prediv-c65",
46 "st,clkgena-prediv";
50 clock-output-names = "clk-s-a0-osc-prediv";
101 clk_s_a1_osc_prediv: clk-s-a1-osc-prediv {
103 compatible = "st,clkgena-prediv-c65",
104 "st,clkgena-prediv";
108 clock-output-names = "clk-s-a1-osc-prediv";
177 clk_m_a0_osc_prediv: clk-m-a0-osc-prediv {
179 compatible = "st,clkgena-prediv-c32",
[all …]
Dstih416-clock.dtsi44 clk_s_a0_osc_prediv: clk-s-a0-osc-prediv {
46 compatible = "st,clkgena-prediv-c65",
47 "st,clkgena-prediv";
51 clock-output-names = "clk-s-a0-osc-prediv";
102 clk_s_a1_osc_prediv: clk-s-a1-osc-prediv {
104 compatible = "st,clkgena-prediv-c65",
105 "st,clkgena-prediv";
109 clock-output-names = "clk-s-a1-osc-prediv";
179 clk_m_a0_osc_prediv: clk-m-a0-osc-prediv {
181 compatible = "st,clkgena-prediv-c32",
[all …]
/linux-4.4.14/arch/frv/kernel/
Dtime.c73 unsigned short base, pre, prediv; in time_divisor_init() local
77 prediv = 4; in time_divisor_init()
78 base = __res_bus_clock_speed_HZ / pre / HZ / (1 << prediv); in time_divisor_init()
81 __set_TxCKSL_DATA(0, prediv); in time_divisor_init()
/linux-4.4.14/arch/c6x/platforms/
Dpll.c271 u32 ctrl, mult = 0, prediv = 0, postdiv = 0; in clk_pllclk_recalc() local
292 prediv = pll_read(pll, PLLPRE); in clk_pllclk_recalc()
293 if (prediv & PLLDIV_EN) in clk_pllclk_recalc()
294 prediv = (prediv & PLLDIV_RATIO_MASK) + 1; in clk_pllclk_recalc()
296 prediv = 0; in clk_pllclk_recalc()
307 if (prediv) in clk_pllclk_recalc()
308 rate /= prediv; in clk_pllclk_recalc()
317 prediv, mult, postdiv, rate / 1000000); in clk_pllclk_recalc()
/linux-4.4.14/drivers/media/dvb-frontends/
Dtua6100.c75 u32 prediv; in tua6100_set_params() local
118 prediv = (c->frequency * _R) / (_ri / 1000); in tua6100_set_params()
119 div = prediv / _P; in tua6100_set_params()
126 reg1[3] |= (prediv - (div*_P)) & 0x7f; in tua6100_set_params()
Ddib7000p.c489 u8 loopdiv, prediv; in dib7000p_update_pll() local
493 prediv = reg_1856 & 0x3f; in dib7000p_update_pll()
496 if ((bw != NULL) && (bw->pll_prediv != prediv || bw->pll_ratio != loopdiv)) { in dib7000p_update_pll()
497 …dprintk("Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d)", prediv, bw->pll… in dib7000p_update_pll()
506 xtal = (internal / loopdiv) * prediv; in dib7000p_update_pll()
Ddib8000.c746 u8 loopdiv, prediv, oldprediv = state->cfg.pll->pll_prediv ; in dib8000_update_pll() local
750 prediv = reg_1856 & 0x3f; in dib8000_update_pll()
753 if ((pll == NULL) || (pll->pll_prediv == prediv && in dib8000_update_pll()
757 …dprintk("Updating pll (prediv: old = %d new = %d ; loopdiv : old = %d new = %d)", prediv, pll->pl… in dib8000_update_pll()
771 xtal = 2 * (internal / loopdiv) * prediv; in dib8000_update_pll()
/linux-4.4.14/drivers/clk/pistachio/
Dclk-pll.c276 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
279 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK; in pll_gf40lp_frac_recalc_rate()
296 rate = do_div_round_closest(rate, (prediv * postdiv1 * postdiv2) << 24); in pll_gf40lp_frac_recalc_rate()
416 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
420 prediv = (val >> PLL_CTRL1_REFDIV_SHIFT) & PLL_CTRL1_REFDIV_MASK; in pll_gf40lp_laint_recalc_rate()
428 rate = do_div_round_closest(rate, prediv * postdiv1 * postdiv2); in pll_gf40lp_laint_recalc_rate()
/linux-4.4.14/drivers/clk/keystone/
Dpll.c85 u32 mult = 0, prediv, postdiv, val; in clk_pllclk_recalc() local
100 prediv = (val & pll_data->plld_mask); in clk_pllclk_recalc()
113 rate /= (prediv + 1); in clk_pllclk_recalc()
/linux-4.4.14/drivers/clk/
Dclk-vt8500.c359 u32 *multiplier, u32 *prediv) in vt8500_find_pll_bits() argument
367 *prediv = 1; in vt8500_find_pll_bits()
372 *prediv = 2; in vt8500_find_pll_bits()
374 *prediv = 1; in vt8500_find_pll_bits()
376 *multiplier = rate / (parent_rate / *prediv); in vt8500_find_pll_bits()
377 tclk = (parent_rate / *prediv) * *multiplier; in vt8500_find_pll_bits()
/linux-4.4.14/drivers/tty/serial/
Dioc3_serial.c105 #define SER_CLK_SPEED(prediv) ((22000000 << 1) / prediv) argument
313 int lcr, prediv; in set_baud() local
316 for (prediv = 6; prediv < 64; prediv++) { in set_baud()
317 divisor = SER_DIVISOR(baud, SER_CLK_SPEED(prediv)); in set_baud()
320 actual_baud = DIVISOR_TO_BAUD(divisor, SER_CLK_SPEED(prediv)); in set_baud()
334 if (prediv == 64) { in set_baud()
345 writeb((unsigned char)prediv, &uart->iu_scr); in set_baud()
/linux-4.4.14/drivers/media/usb/dvb-usb/
Ddib0700_devices.c2025 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; in dib8096p_get_best_sampling() local
2036 adc->pll_prediv = prediv; in dib8096p_get_best_sampling()
2055 for (prediv = min_prediv; prediv < max_prediv; prediv++) { in dib8096p_get_best_sampling()
2056 fcp = xtal / prediv; in dib8096p_get_best_sampling()
2059 fmem = ((xtal/prediv) * loopdiv); in dib8096p_get_best_sampling()
2076 adc->pll_prediv = prediv; in dib8096p_get_best_sampling()
2080 …he.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->tim… in dib8096p_get_best_sampling()
2530 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1; in dib7090p_get_best_sampling() local
2541 adc->pll_prediv = prediv; in dib7090p_get_best_sampling()
2561 for (prediv = min_prediv ; prediv < max_prediv; prediv++) { in dib7090p_get_best_sampling()
[all …]
/linux-4.4.14/drivers/media/i2c/
Dov2659.c912 u32 prediv, postdiv, mult; in ov2659_pll_calc_params() local
920 prediv = ctrl3[j].div; in ov2659_pll_calc_params()
924 actual /= prediv; in ov2659_pll_calc_params()