| /linux-4.4.14/drivers/clk/keystone/ |
| H A D | pll.c | 70 * @pll_data: PLL driver specific data
74 struct clk_pll_data *pll_data; member in struct:clk_pll
83 struct clk_pll_data *pll_data = pll->pll_data; clk_pllclk_recalc() local
91 if (pll_data->has_pllctrl) { clk_pllclk_recalc()
92 val = readl(pll_data->pllm); clk_pllclk_recalc()
93 mult = (val & pll_data->pllm_lower_mask); clk_pllclk_recalc()
97 val = readl(pll_data->pll_ctl0); clk_pllclk_recalc()
98 mult |= ((val & pll_data->pllm_upper_mask) clk_pllclk_recalc()
99 >> pll_data->pllm_upper_shift); clk_pllclk_recalc()
100 prediv = (val & pll_data->plld_mask); clk_pllclk_recalc()
102 if (!pll_data->has_pllctrl) clk_pllclk_recalc()
104 postdiv = ((val & pll_data->clkod_mask) >> clk_pllclk_recalc()
105 pll_data->clkod_shift) + 1; clk_pllclk_recalc()
106 else if (pll_data->pllod) { clk_pllclk_recalc()
107 postdiv = readl(pll_data->pllod); clk_pllclk_recalc()
108 postdiv = ((postdiv & pll_data->clkod_mask) >> clk_pllclk_recalc()
109 pll_data->clkod_shift) + 1; clk_pllclk_recalc()
111 postdiv = pll_data->postdiv; clk_pllclk_recalc()
127 struct clk_pll_data *pll_data) clk_register_pll()
143 pll->pll_data = pll_data; clk_register_pll()
164 struct clk_pll_data *pll_data; _of_pll_clk_init() local
169 pll_data = kzalloc(sizeof(*pll_data), GFP_KERNEL); _of_pll_clk_init()
170 if (!pll_data) { _of_pll_clk_init()
176 if (of_property_read_u32(node, "fixed-postdiv", &pll_data->postdiv)) { _of_pll_clk_init()
178 pll_data->clkod_mask = CLKOD_MASK; _of_pll_clk_init()
179 pll_data->clkod_shift = CLKOD_SHIFT; _of_pll_clk_init()
187 pll_data->pllod = of_iomap(node, i); _of_pll_clk_init()
191 pll_data->pll_ctl0 = of_iomap(node, i); _of_pll_clk_init()
192 if (!pll_data->pll_ctl0) { _of_pll_clk_init()
194 iounmap(pll_data->pllod); _of_pll_clk_init()
198 pll_data->pllm_lower_mask = PLLM_LOW_MASK; _of_pll_clk_init()
199 pll_data->pllm_upper_shift = PLLM_HIGH_SHIFT; _of_pll_clk_init()
200 pll_data->plld_mask = PLLD_MASK; _of_pll_clk_init()
201 pll_data->has_pllctrl = pllctrl; _of_pll_clk_init()
202 if (!pll_data->has_pllctrl) { _of_pll_clk_init()
203 pll_data->pllm_upper_mask = PLLM_HIGH_MASK; _of_pll_clk_init()
205 pll_data->pllm_upper_mask = MAIN_PLLM_HIGH_MASK; _of_pll_clk_init()
207 pll_data->pllm = of_iomap(node, i); _of_pll_clk_init()
208 if (!pll_data->pllm) { _of_pll_clk_init()
209 iounmap(pll_data->pll_ctl0); _of_pll_clk_init()
210 iounmap(pll_data->pllod); _of_pll_clk_init()
215 clk = clk_register_pll(NULL, node->name, parent_name, pll_data); _of_pll_clk_init()
223 kfree(pll_data); _of_pll_clk_init()
124 clk_register_pll(struct device *dev, const char *name, const char *parent_name, struct clk_pll_data *pll_data) clk_register_pll() argument
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| /linux-4.4.14/arch/c6x/include/asm/ |
| H A D | clock.h | 80 struct pll_data;
92 struct pll_data *pll_data; member in struct:clk
108 struct pll_data { struct
119 /* pll_data flag bit */
136 extern struct pll_data c6x_soc_pll1;
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| /linux-4.4.14/arch/arm/mach-davinci/ |
| H A D | clock.c | 292 struct pll_data *pll; clk_sysclk_recalc()
296 if (clk->pll_data) clk_sysclk_recalc()
305 if (WARN_ON(!clk->parent->pll_data)) clk_sysclk_recalc()
308 pll = clk->parent->pll_data; clk_sysclk_recalc()
330 struct pll_data *pll; davinci_set_sysclk_rate()
335 if (clk->pll_data) davinci_set_sysclk_rate()
343 if (WARN_ON(!clk->parent->pll_data)) davinci_set_sysclk_rate()
350 pll = clk->parent->pll_data; davinci_set_sysclk_rate()
418 struct pll_data *pll = clk->pll_data; clk_pllclk_recalc()
485 int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, davinci_set_pllrate()
596 if (clk->pll_data) davinci_clk_init()
608 if (clk->pll_data) { davinci_clk_init()
609 struct pll_data *pll = clk->pll_data; davinci_clk_init()
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| H A D | clock.h | 76 struct pll_data { struct
101 struct pll_data *pll_data; member in struct:clk
128 int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
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| H A D | dm644x.c | 45 static struct pll_data pll1_data = {
50 static struct pll_data pll2_data = {
63 .pll_data = &pll1_data,
111 .pll_data = &pll2_data,
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| H A D | dm646x.c | 54 static struct pll_data pll1_data = {
59 static struct pll_data pll2_data = {
78 .pll_data = &pll1_data,
154 .pll_data = &pll2_data,
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| H A D | dm355.c | 45 static struct pll_data pll1_data = {
51 static struct pll_data pll2_data = {
67 .pll_data = &pll1_data,
145 .pll_data = &pll2_data,
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| H A D | da850.c | 54 static struct pll_data pll0_data = {
69 .pll_data = &pll0_data,
131 static struct pll_data pll1_data = {
140 .pll_data = &pll1_data,
1128 struct pll_data *pll = clk->pll_data; da850_set_pll0rate()
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| H A D | dm365.c | 56 static struct pll_data pll1_data = {
62 static struct pll_data pll2_data = {
77 .pll_data = &pll1_data,
166 .pll_data = &pll2_data,
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| H A D | da830.c | 40 static struct pll_data pll0_data = {
54 .pll_data = &pll0_data,
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| /linux-4.4.14/arch/c6x/platforms/ |
| H A D | plldata.c | 36 struct pll_data c6x_soc_pll1 = {
42 .pll_data = &c6x_soc_pll1,
172 struct pll_data *pll = &c6x_soc_pll1; c6455_setup_clocks()
210 struct pll_data *pll = &c6x_soc_pll1; c6457_setup_clocks()
260 struct pll_data *pll = &c6x_soc_pll1; c6472_setup_clocks()
309 struct pll_data *pll = &c6x_soc_pll1; c6474_setup_clocks()
358 struct pll_data *pll = &c6x_soc_pll1; c6678_setup_clocks()
423 struct pll_data *pll = &c6x_soc_pll1; c64x_setup_clocks()
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| H A D | pll.c | 204 static u32 pll_read(struct pll_data *pll, int reg) pll_read()
212 struct pll_data *pll; clk_sysclk_recalc()
221 if (WARN_ON(!clk->parent->pll_data)) clk_sysclk_recalc()
224 pll = clk->parent->pll_data; clk_sysclk_recalc()
273 struct pll_data *pll = clk->pll_data; clk_pllclk_recalc()
335 if (clk->pll_data) __init_clk()
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| /linux-4.4.14/drivers/clk/st/ |
| H A D | clkgen-pll.c | 842 struct clkgen_pll_data *pll_data, clkgen_pll_register()
855 init.ops = pll_data->ops; clkgen_pll_register()
861 pll->data = pll_data; clkgen_pll_register()
997 struct clkgen_pll_data *pll_data, clkgen_odf_register()
1014 gate->reg = reg + pll_data->odf_gate[odf].offset; clkgen_odf_register()
1015 gate->bit_idx = pll_data->odf_gate[odf].shift; clkgen_odf_register()
1025 div->reg = reg + pll_data->odf[odf].offset; clkgen_odf_register()
1026 div->shift = pll_data->odf[odf].shift; clkgen_odf_register()
1027 div->width = fls(pll_data->odf[odf].mask); clkgen_odf_register()
841 clkgen_pll_register(const char *parent_name, struct clkgen_pll_data *pll_data, void __iomem *reg, const char *clk_name, spinlock_t *lock) clkgen_pll_register() argument
995 clkgen_odf_register(const char *parent_name, void __iomem *reg, struct clkgen_pll_data *pll_data, int odf, spinlock_t *odf_lock, const char *odf_name) clkgen_odf_register() argument
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