| /linux-4.4.14/arch/powerpc/boot/dts/fsl/ |
| D | p4080si-post.dtsi | 378 pll2: pll2@840 { label
383 clock-output-names = "pll2", "pll2-div2";
416 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
417 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
425 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
426 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
434 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
435 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
443 clocks = <&pll2 0>, <&pll2 1>, <&pll3 0>, <&pll3 1>;
444 clock-names = "pll2", "pll2-div2", "pll3", "pll3-div2";
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| D | t4240si-post.dtsi | 954 pll2: pll2@840 { label
959 clock-output-names = "pll2", "pll2-div2", "pll2-div4";
984 <&pll2 0>, <&pll2 1>, <&pll2 2>;
987 "pll2", "pll2-div2", "pll2-div4";
997 <&pll2 0>, <&pll2 1>, <&pll2 2>;
1000 "pll2", "pll2-div2", "pll2-div4";
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| /linux-4.4.14/drivers/mfd/ |
| D | sm501.c | 117 static unsigned long decode_div(unsigned long pll2, unsigned long val, in decode_div() argument
122 pll2 = 288 * MHZ; in decode_div()
124 return pll2 / div_tab[(val >> lshft) & mask]; in decode_div()
141 unsigned long pll2 = 0; in sm501_dump_clk() local
145 pll2 = 336 * MHZ; in sm501_dump_clk()
148 pll2 = 288 * MHZ; in sm501_dump_clk()
151 pll2 = 240 * MHZ; in sm501_dump_clk()
154 pll2 = 192 * MHZ; in sm501_dump_clk()
158 sdclk0 = (misct & (1<<12)) ? pll2 : 288 * MHZ; in sm501_dump_clk()
161 sdclk1 = (misct & (1<<20)) ? pll2 : 288 * MHZ; in sm501_dump_clk()
[all …]
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | renesas,r8a73a4-cpg-clocks.txt | 17 "pll0", "pll1", "pll2", "pll2s", "pll2h", "z", "z2", "i", "m3", "b",
29 clock-output-names = "main", "pll0", "pll1", "pll2",
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| D | renesas,sh73a0-cpg-clocks.txt | 19 "pll0", "pll1", "pll2", "pll3", "dsi0phy", "dsi1phy", "zg", "m3", "b",
31 clock-output-names = "main", "pll0", "pll1", "pll2",
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| D | prima2-clock.txt | 18 pll2 3
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| D | imx28-clock.txt | 17 pll2 3
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| D | nv04.c | 208 uint32_t pll2 = (oldpll2 & 0x7fff0000) | 1 << 31 | pv->NM2; in setPLL_double_highregs() local
218 pll2 = 0; in setPLL_double_highregs()
227 pll2 |= 0x011f; in setPLL_double_highregs()
233 if (oldpll1 == pll1 && oldpll2 == pll2) in setPLL_double_highregs()
266 nvkm_wr32(device, reg2, pll2); in setPLL_double_highregs()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/ |
| D | hw.c | 133 uint32_t pll2, struct nvkm_pll_vals *pllvals) in nouveau_hw_decode_pll() argument
144 pllvals->NM1 = pll2 & 0xffff; in nouveau_hw_decode_pll()
147 pllvals->NM2 = pll2 >> 16; in nouveau_hw_decode_pll()
150 if (nv_two_reg_pll(dev) && pll2 & NV31_RAMDAC_ENABLE_VCO2) in nouveau_hw_decode_pll()
151 pllvals->NM2 = pll2 & 0xffff; in nouveau_hw_decode_pll()
170 uint32_t reg1, pll1, pll2 = 0; in nouveau_hw_get_pllvals() local
180 pll2 = nvif_rd32(device, reg1 + 4); in nouveau_hw_get_pllvals()
184 pll2 = nvif_rd32(device, reg2); in nouveau_hw_get_pllvals()
193 pll2 = 0; in nouveau_hw_get_pllvals()
196 pll2 = 0; in nouveau_hw_get_pllvals()
[all …]
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | sun5i.dtsi | 47 #include <dt-bindings/clock/sun4i-a10-pll2.h>
106 pll2: clk@01c20008 { label
108 compatible = "allwinner,sun5i-a13-pll2-clk";
111 clock-output-names = "pll2-1x", "pll2-2x",
112 "pll2-4x", "pll2-8x";
302 clocks = <&pll2 SUN4I_A10_PLL2_1X>;
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| D | sun4i-a10.dtsi | 48 #include <dt-bindings/clock/sun4i-a10-pll2.h>
199 pll2: clk@01c20008 { label
201 compatible = "allwinner,sun4i-a10-pll2-clk";
204 clock-output-names = "pll2-1x", "pll2-2x",
205 "pll2-4x", "pll2-8x";
499 clocks = <&pll2 SUN4I_A10_PLL2_1X>;
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| D | ste-nomadik-stn8815.dtsi | 223 pll2: pll2@0 { label
234 clocks = <&pll2>;
249 clocks = <&pll2>;
257 clocks = <&pll2>;
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| D | sun7i-a20.dtsi | 50 #include <dt-bindings/clock/sun4i-a10-pll2.h>
203 pll2: clk@01c20008 { label
205 compatible = "allwinner,sun4i-a10-pll2-clk";
208 clock-output-names = "pll2-1x", "pll2-2x",
209 "pll2-4x", "pll2-8x";
508 clocks = <&pll2 SUN4I_A10_PLL2_1X>;
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| D | dra74x.dtsi | 114 "pll2_clkctrl", "pll2";
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| D | r8a73a4.dtsi | 511 clock-output-names = "main", "pll0", "pll1", "pll2",
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| D | sh73a0.dtsi | 588 clock-output-names = "main", "pll0", "pll1", "pll2",
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| /linux-4.4.14/drivers/clk/sunxi/ |
| D | Makefile | 9 obj-y += clk-a10-pll2.o
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| /linux-4.4.14/drivers/clk/mxs/ |
| D | clk-imx28.c | 139 ref_xtal, pll0, pll1, pll2, ref_cpu, ref_emi, ref_io0, ref_io1, enumerator
176 clks[pll2] = mxs_clk_pll("pll2", "ref_xtal", PLL2CTRL0, 23, 50000000); in mx28_clocks_init()
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| /linux-4.4.14/Documentation/devicetree/bindings/display/ti/ |
| D | ti,dra7-dss.txt | 24 'pll1', 'pll2_clkctrl', 'pll2'
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| /linux-4.4.14/drivers/clk/sirf/ |
| D | clk-prima2.c | 61 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
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| D | clk-atlas6.c | 62 rtc, osc, pll1, pll2, pll3, mem, sys, security, dsp, gps, enumerator
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| /linux-4.4.14/drivers/gpu/drm/i915/ |
| D | intel_ddi.c | 1168 clock.m2 |= state->pll2 & PORT_PLL_M2_FRAC_MASK; in bxt_calc_pll_link()
1741 crtc_state->dpll_hw_state.pll2 = clk_div.m2_frac; in bxt_ddi_pll_select()
2846 temp |= pll->config.hw_state.pll2; in bxt_ddi_pll_enable()
2947 hw_state->pll2 = I915_READ(BXT_PORT_PLL(port, 2)); in bxt_ddi_pll_get_hw_state()
2948 hw_state->pll2 &= PORT_PLL_M2_FRAC_MASK; in bxt_ddi_pll_get_hw_state()
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| D | i915_drv.h | 387 uint32_t ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, member
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| D | intel_display.c | 12070 pipe_config->dpll_hw_state.pll2, in intel_dump_pipe_config()
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| /linux-4.4.14/drivers/clk/qcom/ |
| D | mmcc-msm8960.c | 116 static struct clk_pll pll2 = { variable
2760 [PLL2] = &pll2.clkr,
2936 [PLL2] = &pll2.clkr,
|