Searched refs:phyreg_def (Results 1 – 16 of 16) sorted by relevance
93 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_read()147 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl8723_phy_rf_serial_write()193 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()194 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()195 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()196 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in rtl8723_phy_init_bb_rf_reg_def()198 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()199 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()200 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()201 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in rtl8723_phy_init_bb_rf_reg_def()[all …]
104 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_read()165 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92s_phy_rf_serial_write()713 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92s_phy_init_register_definition()714 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92s_phy_init_register_definition()715 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92s_phy_init_register_definition()716 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92s_phy_init_register_definition()719 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92s_phy_init_register_definition()720 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92s_phy_init_register_definition()721 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92s_phy_init_register_definition()722 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92s_phy_init_register_definition()[all …]
437 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92s_phy_rf6052_config()
102 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_read()156 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf_serial_write()438 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()439 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()440 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()441 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92c_phy_init_bb_rf_register_definition()443 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()444 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()445 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()446 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92c_phy_init_bb_rf_register_definition()[all …]
170 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_read()220 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf_serial_write()852 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()853 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()854 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()855 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl88e_phy_init_bb_rf_register_definition()857 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()858 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()859 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()860 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl88e_phy_init_bb_rf_register_definition()[all …]
443 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl88e_phy_rf6052_config_parafile()
273 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_read()321 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_write()415 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()417 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()419 rtlphy->phyreg_def[RF90_PATH_C].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()422 rtlphy->phyreg_def[RF90_PATH_D].rfintfs = RFPGA0_XCD_RFINTERFACESW; in _rtl92d_phy_init_bb_rf_register_definition()425 rtlphy->phyreg_def[RF90_PATH_A].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()427 rtlphy->phyreg_def[RF90_PATH_B].rfintfi = RFPGA0_XAB_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()429 rtlphy->phyreg_def[RF90_PATH_C].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()431 rtlphy->phyreg_def[RF90_PATH_D].rfintfi = RFPGA0_XCD_RFINTERFACERB; in _rtl92d_phy_init_bb_rf_register_definition()[all …]
544 pphyreg = &rtlphy->phyreg_def[rfpath]; in rtl92d_phy_rf6052_config()
164 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_read()214 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf_serial_write()1075 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()1076 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_def()1078 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1079 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1081 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_def()1082 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_def()1084 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = in phy_init_bb_rf_register_def()1086 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = in phy_init_bb_rf_register_def()[all …]
87 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ee_phy_rf6052_config_parafile()
282 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8821ae_phy_rf_serial_write()2192 rtlphy->phyreg_def[RF90_PATH_A].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_definition()2193 rtlphy->phyreg_def[RF90_PATH_B].rfintfs = RFPGA0_XAB_RFINTERFACESW; in phy_init_bb_rf_register_definition()2195 rtlphy->phyreg_def[RF90_PATH_A].rfintfo = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2196 rtlphy->phyreg_def[RF90_PATH_B].rfintfo = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2198 rtlphy->phyreg_def[RF90_PATH_A].rfintfe = RFPGA0_XA_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2199 rtlphy->phyreg_def[RF90_PATH_B].rfintfe = RFPGA0_XB_RFINTERFACEOE; in phy_init_bb_rf_register_definition()2201 rtlphy->phyreg_def[RF90_PATH_A].rf3wire_offset = RA_LSSIWRITE_8821A; in phy_init_bb_rf_register_definition()2202 rtlphy->phyreg_def[RF90_PATH_B].rf3wire_offset = RB_LSSIWRITE_8821A; in phy_init_bb_rf_register_definition()2204 rtlphy->phyreg_def[RF90_PATH_A].rfhssi_para2 = RHSSIREAD_8821AE; in phy_init_bb_rf_register_definition()[all …]
447 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723be_phy_rf6052_config_parafile()
443 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92ce_phy_rf6052_config_parafile()
448 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl8723e_phy_rf6052_config_parafile()
421 pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92c_phy_rf6052_config_parafile()
1197 struct bb_reg_def phyreg_def[4]; /*Radio A/B/C/D */ member