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Searched refs:phases (Results 1 – 33 of 33) sorted by relevance

/linux-4.4.14/scripts/
Danalyze_suspend.py216 phases = [] # ordered list of phases variable in Data
236 self.phases = []
259 self.phases = self.sortedPhases()
261 return self.dmesg[self.phases[0]]['start']
264 self.dmesg[self.phases[0]]['start'] = time
266 return self.dmesg[self.phases[-1]]['end']
269 self.dmesg[self.phases[-1]]['end'] = time
271 for phase in self.phases:
292 for phase in self.phases:
306 for phase in self.phases:
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/linux-4.4.14/Documentation/devicetree/bindings/mmc/
Drockchip-dw-mshc.txt23 to control the clock phases, "ciu-sample" is required for tuning high-
27 probing, low speeds or in case where all phases work at tuning time.
/linux-4.4.14/Documentation/power/
Ddevices.txt146 they are called in phases for every device, respecting the parent-child
271 Suspending or resuming the system is done in several phases. Different phases
276 various phases always run after tasks have been frozen and before they are
277 unfrozen. Furthermore, the *_noirq phases run at a time when IRQ handlers have
280 All phases use PM domain, bus, type, class or driver callbacks (that is, methods
314 the phases are:
322 time.) Unlike the other suspend-related phases, during the prepare
338 phases as well as the resume_noirq, resume_early and resume phases of
357 "quiesce device" and "save device state" phases, in which cases
374 At the end of these phases, drivers should have stopped all I/O transactions
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Dpci.txt422 callbacks for this purpose. They are executed in phases such that each phase
424 to the given subsystem before the next phase begins. These phases always run
430 be preserved, such as one of the ACPI sleep states S1-S3, the phases are:
434 The following PCI bus type's callbacks, respectively, are used in these phases:
498 S1-S3, into the working state (ACPI S0), the phases are:
503 phases:
550 to be free) in the following three phases:
561 The other two phases, however, are different.
579 back to the fully functional state and this is done in the following phases:
605 three phases:
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Dsuspend-and-interrupts.txt36 suspend-resume cycle, including the "noirq" phases of suspending and resuming
/linux-4.4.14/drivers/nfc/pn544/
Dpn544.c347 u8 phases = 0; in pn544_hci_start_poll() local
378 phases |= 1; /* Type A */ in pn544_hci_start_poll()
380 phases |= (1 << 2); /* Type F 212 */ in pn544_hci_start_poll()
381 phases |= (1 << 3); /* Type F 424 */ in pn544_hci_start_poll()
384 phases |= (1 << 5); /* NFC active */ in pn544_hci_start_poll()
387 PN544_PL_RDPHASES, &phases, 1); in pn544_hci_start_poll()
/linux-4.4.14/drivers/gpu/drm/i915/
Di915_gem_shrinker.c81 } phases[] = { in i915_gem_shrink() local
110 for (phase = phases; phase->list; phase++) { in i915_gem_shrink()
/linux-4.4.14/drivers/vfio/pci/
Dvfio_pci_config.c1047 int ret, evcc, phases, vc_arb; in vfio_vc_cap_len() local
1060 phases = 128; in vfio_vc_cap_len()
1062 phases = 64; in vfio_vc_cap_len()
1064 phases = 32; in vfio_vc_cap_len()
1066 phases = 0; in vfio_vc_cap_len()
1068 vc_arb = phases * 4; in vfio_vc_cap_len()
/linux-4.4.14/drivers/scsi/arm/
Dfas216.c250 static const char *phases[] = { in fas216_bus_phase() local
257 return phases[stat & STAT_BUSMASK]; in fas216_bus_phase()
262 static const char *phases[] = { in fas216_drv_phase() local
276 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
277 phases[info->scsi.phase]) in fas216_drv_phase()
278 return phases[info->scsi.phase]; in fas216_drv_phase()
/linux-4.4.14/drivers/scsi/
DNCR5380.c348 } phases[] __maybe_unused = { variable
459 …for (i = 0; (phases[i].value != PHASE_UNKNOWN) && (phases[i].value != (status & PHASE_MASK)); ++i); in NCR5380_print_phase()
460 printk("scsi%d : phase %s\n", instance->host_no, phases[i].name); in NCR5380_print_phase()
Datari_NCR5380.c545 } phases[] = { variable
569 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && in NCR5380_print_phase()
570 (phases[i].value != (status & PHASE_MASK)); ++i) in NCR5380_print_phase()
572 printk(KERN_DEBUG "scsi%d: phase %s\n", HOSTNO, phases[i].name); in NCR5380_print_phase()
Dsym53c416.c200 enum phases enum
/linux-4.4.14/Documentation/driver-model/
Doverview.txt67 The above abstraction prevents unnecessary pain during transitional phases.
/linux-4.4.14/Documentation/
Dmemory-hotplug.txt58 There are 2 phases in Memory Hotplug.
86 phases can be execute in seamless way.)
Dinitrd.txt14 initrd is mainly designed to allow system startup to occur in two phases,
Dxillybus.txt332 bootstrap process is done in three phases:
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Didle-states.txt46 The following diagram depicts the CPU execution phases and related timing
59 Diagram 1: CPU idle state execution phases
/linux-4.4.14/drivers/scsi/aic7xxx/
Daic7xxx.seq475 * Now determine what phases the host wants us
599 * Data phases on the bus are from the
656 * Main loop for information transfer phases. Wait for the
921 * As a target, we control the phases,
1344 * For data-in phases, wait for any pending acks from the
1346 * send Ignore Wide Residue messages for data-in phases.
Daic7xxx.reg130 * Possible phases in SCSISIGI
161 * Possible phases to write into SCSISIG0
Daic79xx.seq845 * Main loop for information transfer phases. Wait for the
1754 * For data-in phases, wait for any pending acks from the
1756 * send Ignore Wide Residue messages for data-in phases.
2121 * phases that are typically caused by CRC errors in status packet
Daic79xx.reg1745 * Possible phases to write into SCSISIG0
1776 * Possible phases in SCSISIGI
/linux-4.4.14/Documentation/filesystems/
Dsharedsubtree.txt896 The overall algorithm breaks the operation into 3 phases: (look at
900 2. commit phases.
901 3. abort phases.
/linux-4.4.14/Documentation/timers/
Dtimekeeping.txt40 the counter register is read in two phases on the bus lowest 16 bits first
/linux-4.4.14/Documentation/scheduler/
Dsched-deadline.txt136 A typical real-time task is composed of a repetition of computation phases
472 the preliminary phases of the merge and we really seek feedback that would
/linux-4.4.14/Documentation/scsi/
Dst.txt284 max_sg_segs) and the number of segments used in phases 1 and 2
289 is smaller than the number of segments used in phases 1 and 2,
DChangeLog.sym53c8xx97 * Simpler handling of illegal phases and data overrun from
DChangeLog.1992-1997327 all DATA IN and DATA OUT phases right. Utilize HBA_interpret flag.
/linux-4.4.14/Documentation/development-process/
D1.Intro24 the mechanics of the merge window. The various phases in the patch
/linux-4.4.14/Documentation/networking/
Dswitchdev.txt386 allocations) between the two phases.
/linux-4.4.14/Documentation/RCU/
DwhatisRCU.txt51 "reclamation" phases. The removal phase removes references to data items
63 Splitting the update into removal and reclamation phases permits the
Dchecklist.txt91 readers see valid data at all phases of the update.
/linux-4.4.14/Documentation/networking/dsa/
Ddsa.txt336 prepare/abort/commit phases are often simplified into a prepare phase which
/linux-4.4.14/Documentation/cgroups/
Dmemory.txt112 The memory controller implementation has been divided into phases. These