Searched refs:p_ptt (Results 1 - 12 of 12) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/qlogic/qed/
H A Dqed_hw.h91 * @param p_ptt
96 struct qed_ptt *p_ptt);
102 * @param p_ptt
106 u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt);
113 * @param p_ptt
116 struct qed_ptt *p_ptt,
134 * @param p_ptt
139 struct qed_ptt *p_ptt,
147 * @param p_ptt
152 struct qed_ptt *p_ptt,
160 * @param p_ptt
166 struct qed_ptt *p_ptt,
176 * @param p_ptt
182 struct qed_ptt *p_ptt,
193 * @param p_ptt
198 struct qed_ptt *p_ptt,
206 * @param p_ptt
210 struct qed_ptt *p_ptt,
218 * @param p_ptt
221 struct qed_ptt *p_ptt);
H A Dqed_mcp.c55 struct qed_ptt *p_ptt) qed_mcp_cmd_port_init()
59 u32 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, addr); qed_mcp_cmd_port_init()
69 struct qed_ptt *p_ptt) qed_mcp_read_mb()
78 tmp = qed_rd(p_hwfn, p_ptt, qed_mcp_read_mb()
100 struct qed_ptt *p_ptt) qed_load_mcp_offsets()
106 p_info->public_base = qed_rd(p_hwfn, p_ptt, MISC_REG_SHARED_MEM_ADDR); qed_load_mcp_offsets()
113 drv_mb_offsize = qed_rd(p_hwfn, p_ptt, qed_load_mcp_offsets()
122 mfw_mb_offsize = qed_rd(p_hwfn, p_ptt, qed_load_mcp_offsets()
126 p_info->mfw_mb_length = (u16)qed_rd(p_hwfn, p_ptt, p_info->mfw_mb_addr); qed_load_mcp_offsets()
131 p_info->drv_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & qed_load_mcp_offsets()
135 p_info->drv_pulse_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_pulse_mb) & qed_load_mcp_offsets()
138 p_info->mcp_hist = (u16)qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); qed_load_mcp_offsets()
144 struct qed_ptt *p_ptt) qed_mcp_cmd_init()
155 if (qed_load_mcp_offsets(p_hwfn, p_ptt) != 0) { qed_mcp_cmd_init()
183 struct qed_ptt *p_ptt) qed_mcp_reset()
191 org_mcp_reset_seq = qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0); qed_mcp_reset()
192 DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, qed_mcp_reset()
199 } while ((org_mcp_reset_seq == qed_rd(p_hwfn, p_ptt, qed_mcp_reset()
204 qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { qed_mcp_reset()
216 struct qed_ptt *p_ptt, qed_do_mcp_cmd()
227 actual_mb_seq = DRV_MB_RD(p_hwfn, p_ptt, drv_mb_header) & qed_do_mcp_cmd()
234 qed_rd(p_hwfn, p_ptt, MISCS_REG_GENERIC_POR_0)) { qed_do_mcp_cmd()
236 qed_load_mcp_offsets(p_hwfn, p_ptt); qed_do_mcp_cmd()
237 qed_mcp_cmd_port_init(p_hwfn, p_ptt); qed_do_mcp_cmd()
242 DRV_MB_WR(p_hwfn, p_ptt, drv_mb_param, param); qed_do_mcp_cmd()
245 DRV_MB_WR(p_hwfn, p_ptt, drv_mb_header, (cmd | seq)); qed_do_mcp_cmd()
254 *o_mcp_resp = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_header); qed_do_mcp_cmd()
268 *o_mcp_param = DRV_MB_RD(p_hwfn, p_ptt, fw_mb_param); qed_do_mcp_cmd()
279 struct qed_ptt *p_ptt, qed_mcp_cmd()
297 rc = qed_do_mcp_cmd(p_hwfn, p_ptt, cmd, param, qed_mcp_cmd()
307 struct qed_ptt *p_ptt) qed_mcp_set_drv_ver()
313 DRV_MB_WR(p_hwfn, p_ptt, union_data.ver_str[i], qed_mcp_set_drv_ver()
318 struct qed_ptt *p_ptt, qed_mcp_load_req()
331 qed_mcp_set_drv_ver(cdev, p_hwfn, p_ptt); qed_mcp_load_req()
338 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_LOAD_REQ, qed_mcp_load_req()
369 struct qed_ptt *p_ptt, qed_mcp_handle_link_change()
378 status = qed_rd(p_hwfn, p_ptt, qed_mcp_handle_link_change()
430 qed_init_pf_rl(p_hwfn, p_ptt, p_hwfn->rel_pf_id, qed_mcp_handle_link_change()
491 struct qed_ptt *p_ptt, qed_mcp_set_link()
518 qed_wr(p_hwfn, p_ptt, qed_mcp_set_link()
541 rc = qed_mcp_cmd(p_hwfn, p_ptt, cmd, 0, &reply, &param); qed_mcp_set_link()
551 qed_mcp_handle_link_change(p_hwfn, p_ptt, true); qed_mcp_set_link()
557 struct qed_ptt *p_ptt) qed_mcp_handle_events()
567 qed_mcp_read_mb(p_hwfn, p_ptt); qed_mcp_handle_events()
582 qed_mcp_handle_link_change(p_hwfn, p_ptt, false); qed_mcp_handle_events()
595 qed_wr(p_hwfn, p_ptt, qed_mcp_handle_events()
618 struct qed_ptt *p_ptt; qed_mcp_get_mfw_ver() local
621 p_ptt = qed_ptt_acquire(p_hwfn); qed_mcp_get_mfw_ver()
622 if (!p_ptt) qed_mcp_get_mfw_ver()
625 global_offsize = qed_rd(p_hwfn, p_ptt, qed_mcp_get_mfw_ver()
629 *p_mfw_ver = qed_rd(p_hwfn, p_ptt, qed_mcp_get_mfw_ver()
633 qed_ptt_release(p_hwfn, p_ptt); qed_mcp_get_mfw_ver()
642 struct qed_ptt *p_ptt; qed_mcp_get_media_type() local
651 p_ptt = qed_ptt_acquire(p_hwfn); qed_mcp_get_media_type()
652 if (!p_ptt) qed_mcp_get_media_type()
655 *p_media_type = qed_rd(p_hwfn, p_ptt, p_hwfn->mcp_info->port_addr + qed_mcp_get_media_type()
658 qed_ptt_release(p_hwfn, p_ptt); qed_mcp_get_media_type()
664 struct qed_ptt *p_ptt, qed_mcp_get_shmem_func()
670 u32 mfw_path_offsize = qed_rd(p_hwfn, p_ptt, addr); qed_mcp_get_shmem_func()
679 ((u32 *)p_data)[i] = qed_rd(p_hwfn, p_ptt, qed_mcp_get_shmem_func()
704 struct qed_ptt *p_ptt) qed_mcp_fill_shmem_func_info()
709 qed_mcp_get_shmem_func(p_hwfn, p_ptt, &shmem_info, qed_mcp_fill_shmem_func_info()
799 struct qed_ptt *p_ptt) qed_mcp_drain()
804 rc = qed_mcp_cmd(p_hwfn, p_ptt, qed_mcp_drain()
815 struct qed_ptt *p_ptt, qed_mcp_get_flash_size()
820 flash_size = qed_rd(p_hwfn, p_ptt, MCP_REG_NVM_CFG4); qed_mcp_get_flash_size()
832 struct qed_ptt *p_ptt, qed_mcp_send_drv_version()
843 DRV_MB_WR(p_hwfn, p_ptt, union_data.drv_version.version, qed_mcp_send_drv_version()
847 DRV_MB_WR(p_hwfn, p_ptt, qed_mcp_send_drv_version()
852 rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_VERSION, 0, &reply, qed_mcp_send_drv_version()
54 qed_mcp_cmd_port_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_cmd_port_init() argument
68 qed_mcp_read_mb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_read_mb() argument
99 qed_load_mcp_offsets(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_load_mcp_offsets() argument
143 qed_mcp_cmd_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_cmd_init() argument
182 qed_mcp_reset(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_reset() argument
215 qed_do_mcp_cmd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 cmd, u32 param, u32 *o_mcp_resp, u32 *o_mcp_param) qed_do_mcp_cmd() argument
278 qed_mcp_cmd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 cmd, u32 param, u32 *o_mcp_resp, u32 *o_mcp_param) qed_mcp_cmd() argument
305 qed_mcp_set_drv_ver(struct qed_dev *cdev, struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_set_drv_ver() argument
317 qed_mcp_load_req(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 *p_load_code) qed_mcp_load_req() argument
368 qed_mcp_handle_link_change(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_reset) qed_mcp_handle_link_change() argument
490 qed_mcp_set_link(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_up) qed_mcp_set_link() argument
556 qed_mcp_handle_events(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_handle_events() argument
663 qed_mcp_get_shmem_func(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct public_func *p_data, int pfid) qed_mcp_get_shmem_func() argument
703 qed_mcp_fill_shmem_func_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_fill_shmem_func_info() argument
798 qed_mcp_drain(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_mcp_drain() argument
814 qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 *p_flash_size) qed_mcp_get_flash_size() argument
831 qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_mcp_drv_version *p_ver) qed_mcp_send_drv_version() argument
H A Dqed_hw.c71 struct qed_ptt *p_ptt; qed_ptt_invalidate() local
75 p_ptt = &p_hwfn->p_ptt_pool->ptts[i]; qed_ptt_invalidate()
76 p_ptt->pxp.offset = QED_BAR_INVALID_OFFSET; qed_ptt_invalidate()
88 struct qed_ptt *p_ptt; qed_ptt_acquire() local
96 p_ptt = list_first_entry(&p_hwfn->p_ptt_pool->free_list, qed_ptt_acquire()
98 list_del(&p_ptt->list_entry); qed_ptt_acquire()
103 "allocated ptt %d\n", p_ptt->idx); qed_ptt_acquire()
104 return p_ptt; qed_ptt_acquire()
116 struct qed_ptt *p_ptt) qed_ptt_release()
119 list_add(&p_ptt->list_entry, &p_hwfn->p_ptt_pool->free_list); qed_ptt_release()
124 struct qed_ptt *p_ptt) qed_ptt_get_hw_addr()
127 return le32_to_cpu(p_ptt->pxp.offset) << 2; qed_ptt_get_hw_addr()
130 static u32 qed_ptt_config_addr(struct qed_ptt *p_ptt) qed_ptt_config_addr() argument
133 p_ptt->idx * sizeof(struct pxp_ptt_entry); qed_ptt_config_addr()
136 u32 qed_ptt_get_bar_addr(struct qed_ptt *p_ptt) qed_ptt_get_bar_addr() argument
139 p_ptt->idx * PXP_EXTERNAL_BAR_PF_WINDOW_SINGLE_SIZE; qed_ptt_get_bar_addr()
143 struct qed_ptt *p_ptt, qed_ptt_set_win()
148 prev_hw_addr = qed_ptt_get_hw_addr(p_hwfn, p_ptt); qed_ptt_set_win()
156 p_ptt->idx, new_hw_addr); qed_ptt_set_win()
159 p_ptt->pxp.offset = cpu_to_le32(new_hw_addr >> 2); qed_ptt_set_win()
162 qed_ptt_config_addr(p_ptt) + qed_ptt_set_win()
164 le32_to_cpu(p_ptt->pxp.offset)); qed_ptt_set_win()
168 struct qed_ptt *p_ptt, qed_set_ptt()
171 u32 win_hw_addr = qed_ptt_get_hw_addr(p_hwfn, p_ptt); qed_set_ptt()
179 qed_ptt_set_win(p_hwfn, p_ptt, hw_addr); qed_set_ptt()
183 return qed_ptt_get_bar_addr(p_ptt) + offset; qed_set_ptt()
199 struct qed_ptt *p_ptt, qed_wr()
202 u32 bar_addr = qed_set_ptt(p_hwfn, p_ptt, hw_addr); qed_wr()
211 struct qed_ptt *p_ptt, qed_rd()
214 u32 bar_addr = qed_set_ptt(p_hwfn, p_ptt, hw_addr); qed_rd()
225 struct qed_ptt *p_ptt, qed_memcpy_hw()
239 qed_ptt_set_win(p_hwfn, p_ptt, hw_addr + done); qed_memcpy_hw()
240 hw_offset = qed_ptt_get_bar_addr(p_ptt); qed_memcpy_hw()
257 struct qed_ptt *p_ptt, qed_memcpy_from()
264 qed_memcpy_hw(p_hwfn, p_ptt, dest, hw_addr, n, false); qed_memcpy_from()
268 struct qed_ptt *p_ptt, qed_memcpy_to()
275 qed_memcpy_hw(p_hwfn, p_ptt, src, hw_addr, n, true); qed_memcpy_to()
279 struct qed_ptt *p_ptt, qed_fid_pretend()
297 p_ptt->pxp.pretend.control = cpu_to_le16(control); qed_fid_pretend()
298 p_ptt->pxp.pretend.fid.concrete_fid.fid = cpu_to_le16(fid); qed_fid_pretend()
301 qed_ptt_config_addr(p_ptt) + qed_fid_pretend()
303 *(u32 *)&p_ptt->pxp.pretend); qed_fid_pretend()
307 struct qed_ptt *p_ptt, qed_port_pretend()
316 p_ptt->pxp.pretend.control = cpu_to_le16(control); qed_port_pretend()
319 qed_ptt_config_addr(p_ptt) + qed_port_pretend()
321 *(u32 *)&p_ptt->pxp.pretend); qed_port_pretend()
325 struct qed_ptt *p_ptt) qed_port_unpretend()
333 p_ptt->pxp.pretend.control = cpu_to_le16(control); qed_port_unpretend()
336 qed_ptt_config_addr(p_ptt) + qed_port_unpretend()
338 *(u32 *)&p_ptt->pxp.pretend); qed_port_unpretend()
408 struct qed_ptt *p_ptt) qed_dmae_post_command()
454 qed_wr(p_hwfn, p_ptt, qed_dmae_post_command()
460 qed_wr(p_hwfn, p_ptt, qed_dmae_post_command()
578 struct qed_ptt *p_ptt, qed_dmae_execute_sub_operation()
624 qed_dmae_post_command(p_hwfn, p_ptt); qed_dmae_execute_sub_operation()
646 struct qed_ptt *p_ptt, qed_dmae_execute_command()
698 p_ptt, qed_dmae_execute_command()
719 struct qed_ptt *p_ptt, qed_dmae_host2grc()
734 rc = qed_dmae_execute_command(p_hwfn, p_ptt, source_addr, qed_dmae_host2grc()
115 qed_ptt_release(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_ptt_release() argument
123 qed_ptt_get_hw_addr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_ptt_get_hw_addr() argument
142 qed_ptt_set_win(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 new_hw_addr) qed_ptt_set_win() argument
167 qed_set_ptt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 hw_addr) qed_set_ptt() argument
198 qed_wr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 hw_addr, u32 val) qed_wr() argument
210 qed_rd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 hw_addr) qed_rd() argument
224 qed_memcpy_hw(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, void *addr, u32 hw_addr, size_t n, bool to_device) qed_memcpy_hw() argument
256 qed_memcpy_from(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, void *dest, u32 hw_addr, size_t n) qed_memcpy_from() argument
267 qed_memcpy_to(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 hw_addr, void *src, size_t n) qed_memcpy_to() argument
278 qed_fid_pretend(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u16 fid) qed_fid_pretend() argument
306 qed_port_pretend(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u8 port_id) qed_port_pretend() argument
324 qed_port_unpretend(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_port_unpretend() argument
407 qed_dmae_post_command(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_dmae_post_command() argument
577 qed_dmae_execute_sub_operation(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u64 src_addr, u64 dst_addr, u8 src_type, u8 dst_type, u32 length) qed_dmae_execute_sub_operation() argument
645 qed_dmae_execute_command(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u64 src_addr, u64 dst_addr, u8 src_type, u8 dst_type, u32 size_in_dwords, struct qed_dmae_params *p_params) qed_dmae_execute_command() argument
718 qed_dmae_host2grc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u64 source_addr, u32 grc_addr, u32 size_in_dwords, u32 flags) qed_dmae_host2grc() argument
H A Dqed_init_ops.c83 struct qed_ptt *p_ptt, qed_init_rt()
94 qed_wr(p_hwfn, p_ptt, addr + (i << 2), rt_data[i].init_val); qed_init_rt()
118 struct qed_ptt *p_ptt, qed_init_array_dmae()
134 qed_wr(p_hwfn, p_ptt, addr + (i << 2), data[i]); qed_init_array_dmae()
136 rc = qed_dmae_host2grc(p_hwfn, p_ptt, qed_init_array_dmae()
145 struct qed_ptt *p_ptt, qed_init_fill_dmae()
161 return qed_dmae_host2grc(p_hwfn, p_ptt, qed_init_fill_dmae()
168 struct qed_ptt *p_ptt, qed_init_fill()
176 qed_wr(p_hwfn, p_ptt, addr, fill); qed_init_fill()
180 struct qed_ptt *p_ptt, qed_init_cmd_array()
212 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, 0, qed_init_cmd_array()
230 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, qed_init_cmd_array()
241 rc = qed_init_array_dmae(p_hwfn, p_ptt, addr, qed_init_cmd_array()
253 struct qed_ptt *p_ptt, qed_init_cmd_wr()
273 qed_wr(p_hwfn, p_ptt, addr, qed_init_cmd_wr()
279 rc = qed_init_fill_dmae(p_hwfn, p_ptt, addr, 0, qed_init_cmd_wr()
282 qed_init_fill(p_hwfn, p_ptt, addr, 0, qed_init_cmd_wr()
286 rc = qed_init_cmd_array(p_hwfn, p_ptt, cmd, qed_init_cmd_wr()
290 qed_init_rt(p_hwfn, p_ptt, addr, qed_init_cmd_wr()
316 struct qed_ptt *p_ptt, qed_init_cmd_rd()
326 val = qed_rd(p_hwfn, p_ptt, addr); qed_init_cmd_rd()
354 val = qed_rd(p_hwfn, p_ptt, addr); qed_init_cmd_rd()
367 struct qed_ptt *p_ptt, qed_init_cmd_cb()
430 struct qed_ptt *p_ptt, qed_init_run()
456 rc = qed_init_cmd_wr(p_hwfn, p_ptt, &cmd->write, qed_init_run()
460 qed_init_cmd_rd(p_hwfn, p_ptt, &cmd->read); qed_init_run()
479 qed_init_cmd_cb(p_hwfn, p_ptt, &cmd->callback); qed_init_run()
82 qed_init_rt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 addr, u32 rt_offset, u32 size) qed_init_rt() argument
117 qed_init_array_dmae(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 addr, u32 dmae_data_offset, u32 size, const u32 *buf, bool b_must_dmae, bool b_can_dmae) qed_init_array_dmae() argument
144 qed_init_fill_dmae(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 addr, u32 fill, u32 fill_count) qed_init_fill_dmae() argument
167 qed_init_fill(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 addr, u32 fill, u32 fill_count) qed_init_fill() argument
179 qed_init_cmd_array(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct init_write_op *cmd, bool b_must_dmae, bool b_can_dmae) qed_init_cmd_array() argument
252 qed_init_cmd_wr(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct init_write_op *cmd, bool b_can_dmae) qed_init_cmd_wr() argument
315 qed_init_cmd_rd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct init_read_op *cmd) qed_init_cmd_rd() argument
366 qed_init_cmd_cb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct init_callback_op *p_cmd) qed_init_cmd_cb() argument
429 qed_init_run(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int phase, int phase_id, int modes) qed_init_run() argument
H A Dqed_int.h56 * @param p_ptt
63 struct qed_ptt *p_ptt,
73 * @param p_ptt
77 struct qed_ptt *p_ptt,
84 * @param p_ptt
87 struct qed_ptt *p_ptt);
106 * @param p_ptt
117 struct qed_ptt *p_ptt,
126 * @param p_ptt
130 struct qed_ptt *p_ptt,
217 struct qed_ptt *p_ptt,
230 * @param p_ptt
235 struct qed_ptt *p_ptt);
293 * @param p_ptt
301 struct qed_ptt *p_ptt,
311 * @param p_ptt
317 struct qed_ptt *p_ptt,
334 struct qed_ptt *p_ptt,
344 * @param p_ptt
349 struct qed_ptt *p_ptt);
362 * @param p_ptt
365 struct qed_ptt *p_ptt);
371 * @param p_ptt
376 int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
H A Dqed_mcp.h132 * @param p_ptt
138 struct qed_ptt *p_ptt,
173 * @param p_ptt - PTT required for register access
183 struct qed_ptt *p_ptt,
194 * @param p_ptt
197 struct qed_ptt *p_ptt);
203 * @param p_ptt
209 struct qed_ptt *p_ptt,
216 * @param p_ptt
224 struct qed_ptt *p_ptt,
266 * @param p_ptt - PTT required for register access
271 struct qed_ptt *p_ptt);
277 * @param p_ptt
281 struct qed_ptt *p_ptt);
286 * @param p_ptt - PTT required for register access
301 * @param p_ptt - PTT required for register access
306 struct qed_ptt *p_ptt);
316 * @param p_ptt - PTT required for register access
327 struct qed_ptt *p_ptt,
334 * @param p_ptt
337 struct qed_ptt *p_ptt);
347 struct qed_ptt *p_ptt);
353 * @param p_ptt
358 struct qed_ptt *p_ptt);
H A Dqed_dev.c352 struct qed_ptt *p_ptt, qed_final_cleanup()
377 qed_wr(p_hwfn, p_ptt, XSDM_REG_OPERATION_GEN, command); qed_final_cleanup()
467 struct qed_ptt *p_ptt, qed_hw_init_common()
505 qed_wr(p_hwfn, p_ptt, NIG_REG_RX_BRB_OUT_EN, 0); qed_hw_init_common()
506 qed_wr(p_hwfn, p_ptt, NIG_REG_STORM_OUT_EN, 0); qed_hw_init_common()
507 qed_port_pretend(p_hwfn, p_ptt, p_hwfn->port_id ^ 1); qed_hw_init_common()
508 qed_wr(p_hwfn, p_ptt, NIG_REG_RX_BRB_OUT_EN, 0); qed_hw_init_common()
509 qed_wr(p_hwfn, p_ptt, NIG_REG_STORM_OUT_EN, 0); qed_hw_init_common()
510 qed_port_unpretend(p_hwfn, p_ptt); qed_hw_init_common()
512 rc = qed_init_run(p_hwfn, p_ptt, PHASE_ENGINE, ANY_PHASE_ID, hw_mode); qed_hw_init_common()
516 qed_wr(p_hwfn, p_ptt, PSWRQ2_REG_L2P_VALIDATE_VFID, 0); qed_hw_init_common()
517 qed_wr(p_hwfn, p_ptt, PGLUE_B_REG_USE_CLIENTID_IN_TAG, 1); qed_hw_init_common()
520 qed_wr(p_hwfn, p_ptt, 0x20b4, qed_hw_init_common()
521 qed_rd(p_hwfn, p_ptt, 0x20b4) & ~0x10); qed_hw_init_common()
527 struct qed_ptt *p_ptt, qed_hw_init_port()
532 rc = qed_init_run(p_hwfn, p_ptt, PHASE_PORT, p_hwfn->port_id, qed_hw_init_port()
538 struct qed_ptt *p_ptt, qed_hw_init_pf()
584 rc = qed_final_cleanup(p_hwfn, p_ptt, rel_pf_id); qed_hw_init_pf()
589 rc = qed_init_run(p_hwfn, p_ptt, PHASE_PF, rel_pf_id, hw_mode); qed_hw_init_pf()
594 rc = qed_init_run(p_hwfn, p_ptt, PHASE_QM_PF, rel_pf_id, hw_mode); qed_hw_init_pf()
599 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, true, true); qed_hw_init_pf()
603 qed_int_igu_enable(p_hwfn, p_ptt, int_mode); qed_hw_init_pf()
614 struct qed_ptt *p_ptt, qed_change_pci_hwfn()
620 qed_wr(p_hwfn, p_ptt, qed_change_pci_hwfn()
625 val = qed_rd(p_hwfn, p_ptt, qed_change_pci_hwfn()
769 struct qed_ptt *p_ptt = p_hwfn->p_main_ptt; for_each_hwfn() local
780 qed_wr(p_hwfn, p_ptt, for_each_hwfn()
783 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0); for_each_hwfn()
784 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0); for_each_hwfn()
785 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0); for_each_hwfn()
786 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0); for_each_hwfn()
787 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0); for_each_hwfn()
789 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_CONN, 0x0); for_each_hwfn()
790 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, 0x0); for_each_hwfn()
792 if ((!qed_rd(p_hwfn, p_ptt, for_each_hwfn()
794 (!qed_rd(p_hwfn, p_ptt, for_each_hwfn()
803 (u8)qed_rd(p_hwfn, p_ptt, for_each_hwfn()
805 (u8)qed_rd(p_hwfn, p_ptt, for_each_hwfn()
809 qed_int_igu_disable_int(p_hwfn, p_ptt); for_each_hwfn()
811 qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0); for_each_hwfn()
812 qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0); for_each_hwfn()
814 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, false, true); for_each_hwfn()
839 struct qed_ptt *p_ptt = p_hwfn->p_main_ptt; for_each_hwfn() local
845 qed_wr(p_hwfn, p_ptt, for_each_hwfn()
848 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_TCP, 0x0); for_each_hwfn()
849 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_UDP, 0x0); for_each_hwfn()
850 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_FCOE, 0x0); for_each_hwfn()
851 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_ROCE, 0x0); for_each_hwfn()
852 qed_wr(p_hwfn, p_ptt, PRS_REG_SEARCH_OPENFLOW, 0x0); for_each_hwfn()
854 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_CONN, 0x0); for_each_hwfn()
855 qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, 0x0); for_each_hwfn()
857 if ((!qed_rd(p_hwfn, p_ptt, for_each_hwfn()
859 (!qed_rd(p_hwfn, p_ptt, for_each_hwfn()
868 (u8)qed_rd(p_hwfn, p_ptt, for_each_hwfn()
870 (u8)qed_rd(p_hwfn, p_ptt, for_each_hwfn()
873 qed_int_igu_init_pure_rt(p_hwfn, p_ptt, false, false); for_each_hwfn()
1071 struct qed_ptt *p_ptt) qed_hw_get_nvm_info()
1078 nvm_cfg_addr = qed_rd(p_hwfn, p_ptt, MISC_REG_GEN_PURP_CR0); qed_hw_get_nvm_info()
1087 nvm_cfg1_offset = qed_rd(p_hwfn, p_ptt, nvm_cfg_addr + 4); qed_hw_get_nvm_info()
1093 p_hwfn->hw_info.vendor_id = qed_rd(p_hwfn, p_ptt, addr) & qed_hw_get_nvm_info()
1100 core_cfg = qed_rd(p_hwfn, p_ptt, addr); qed_hw_get_nvm_info()
1140 val = qed_rd(p_hwfn, p_ptt, addr); qed_hw_get_nvm_info()
1156 link_temp = qed_rd(p_hwfn, p_ptt, qed_hw_get_nvm_info()
1165 link_temp = qed_rd(p_hwfn, p_ptt, qed_hw_get_nvm_info()
1216 generic_cont0 = qed_rd(p_hwfn, p_ptt, addr); qed_hw_get_nvm_info()
1235 return qed_mcp_fill_shmem_func_info(p_hwfn, p_ptt); qed_hw_get_nvm_info()
1240 struct qed_ptt *p_ptt, qed_get_hw_info()
1247 port_mode = qed_rd(p_hwfn, p_ptt, qed_get_hw_info()
1262 qed_hw_get_nvm_info(p_hwfn, p_ptt); qed_get_hw_info()
1264 rc = qed_int_igu_read_cam(p_hwfn, p_ptt); qed_get_hw_info()
1279 qed_mcp_cmd_port_init(p_hwfn, p_ptt); qed_get_hw_info()
1553 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn); for_each_hwfn() local
1555 if (!p_ptt) { for_each_hwfn()
1561 qed_memcpy_from(p_hwfn, p_ptt, &mstats, for_each_hwfn()
1566 qed_memcpy_from(p_hwfn, p_ptt, &ustats, for_each_hwfn()
1571 qed_memcpy_from(p_hwfn, p_ptt, &pstats, for_each_hwfn()
1576 qed_memcpy_from(p_hwfn, p_ptt, &tstats, for_each_hwfn()
1583 qed_memcpy_from(p_hwfn, p_ptt, &port_stats, for_each_hwfn()
1587 qed_ptt_release(p_hwfn, p_ptt); for_each_hwfn()
1719 struct qed_ptt *p_ptt = qed_ptt_acquire(p_hwfn); for_each_hwfn() local
1721 if (!p_ptt) { for_each_hwfn()
1727 qed_memcpy_to(p_hwfn, p_ptt, for_each_hwfn()
1733 qed_memcpy_to(p_hwfn, p_ptt, for_each_hwfn()
1739 qed_memcpy_to(p_hwfn, p_ptt, for_each_hwfn()
1744 qed_ptt_release(p_hwfn, p_ptt); for_each_hwfn()
351 qed_final_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u16 id) qed_final_cleanup() argument
466 qed_hw_init_common(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int hw_mode) qed_hw_init_common() argument
526 qed_hw_init_port(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int hw_mode) qed_hw_init_port() argument
537 qed_hw_init_pf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, int hw_mode, bool b_hw_start, enum qed_int_mode int_mode, bool allow_npar_tx_switch) qed_hw_init_pf() argument
613 qed_change_pci_hwfn(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u8 enable) qed_change_pci_hwfn() argument
1070 qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_hw_get_nvm_info() argument
1239 qed_get_hw_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, enum qed_pci_personality personality) qed_get_hw_info() argument
H A Dqed_int.c360 struct qed_ptt *p_ptt) qed_int_sb_attn_setup()
370 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_L, qed_int_sb_attn_setup()
372 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_H, qed_int_sb_attn_setup()
377 struct qed_ptt *p_ptt, qed_int_sb_attn_init()
390 qed_int_sb_attn_setup(p_hwfn, p_ptt); qed_int_sb_attn_init()
394 struct qed_ptt *p_ptt) qed_int_sb_attn_alloc()
421 qed_int_sb_attn_init(p_hwfn, p_ptt, p_virt, p_phys); qed_int_sb_attn_alloc()
469 struct qed_ptt *p_ptt, qed_int_cau_conf_sb()
483 qed_wr(p_hwfn, p_ptt, val, lower_32_bits(sb_phys)); qed_int_cau_conf_sb()
484 qed_wr(p_hwfn, p_ptt, val + sizeof(u32), qed_int_cau_conf_sb()
488 qed_wr(p_hwfn, p_ptt, val, sb_entry.data); qed_int_cau_conf_sb()
489 qed_wr(p_hwfn, p_ptt, val + sizeof(u32), sb_entry.params); qed_int_cau_conf_sb()
509 qed_int_cau_conf_pi(p_hwfn, p_ptt, igu_sb_id, RX_PI, qed_int_cau_conf_sb()
517 qed_int_cau_conf_pi(p_hwfn, p_ptt, qed_int_cau_conf_sb()
526 struct qed_ptt *p_ptt, qed_int_cau_conf_pi()
547 qed_wr(p_hwfn, p_ptt, qed_int_cau_conf_pi()
558 struct qed_ptt *p_ptt, qed_int_sb_setup()
565 qed_int_cau_conf_sb(p_hwfn, p_ptt, sb_info->sb_phys, qed_int_sb_setup()
596 struct qed_ptt *p_ptt, qed_int_sb_init()
623 qed_int_sb_setup(p_hwfn, p_ptt, sb_info); qed_int_sb_init()
662 struct qed_ptt *p_ptt) qed_int_sp_sb_alloc()
687 qed_int_sb_init(p_hwfn, p_ptt, &p_sb->sb_info, p_virt, qed_int_sp_sb_alloc()
696 struct qed_ptt *p_ptt) qed_int_sp_sb_setup()
702 qed_int_sb_setup(p_hwfn, p_ptt, &p_hwfn->p_sp_sb->sb_info); qed_int_sp_sb_setup()
708 qed_int_sb_attn_setup(p_hwfn, p_ptt); qed_int_sp_sb_setup()
759 struct qed_ptt *p_ptt, qed_int_igu_enable_int()
783 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, igu_pf_conf); qed_int_igu_enable_int()
786 int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, qed_int_igu_enable() argument
793 qed_wr(p_hwfn, p_ptt, qed_int_igu_enable()
797 qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0xfff); qed_int_igu_enable()
798 qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0xfff); qed_int_igu_enable()
804 qed_wr(p_hwfn, p_ptt, MISC_REG_AEU_MASK_ATTN_IGU, 0xff); qed_int_igu_enable()
814 qed_int_igu_enable_int(p_hwfn, p_ptt, int_mode); qed_int_igu_enable()
821 struct qed_ptt *p_ptt) qed_int_igu_disable_int()
825 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0); qed_int_igu_disable_int()
830 struct qed_ptt *p_ptt, qed_int_igu_cleanup_sb()
854 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_32LSB_DATA, data); qed_int_igu_cleanup_sb()
858 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_CTRL, cmd_ctrl); qed_int_igu_cleanup_sb()
871 val = qed_rd(p_hwfn, p_ptt, sb_bit_addr); qed_int_igu_cleanup_sb()
886 struct qed_ptt *p_ptt, qed_int_igu_init_pure_rt_single()
895 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, sb_id, 1, opaque); qed_int_igu_init_pure_rt_single()
898 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, sb_id, 0, opaque); qed_int_igu_init_pure_rt_single()
902 qed_wr(p_hwfn, p_ptt, qed_int_igu_init_pure_rt_single()
907 struct qed_ptt *p_ptt, qed_int_igu_init_pure_rt()
916 val = qed_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION); qed_int_igu_init_pure_rt()
919 qed_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val); qed_int_igu_init_pure_rt()
926 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, sb_id, qed_int_igu_init_pure_rt()
934 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, sb_id, qed_int_igu_init_pure_rt()
941 struct qed_ptt *p_ptt) qed_int_igu_read_cam()
966 val = qed_rd(p_hwfn, p_ptt, qed_int_igu_read_cam()
1088 struct qed_ptt *p_ptt) qed_int_alloc()
1097 rc = qed_int_sp_sb_alloc(p_hwfn, p_ptt); qed_int_alloc()
1102 rc = qed_int_sb_attn_alloc(p_hwfn, p_ptt); qed_int_alloc()
1118 struct qed_ptt *p_ptt) qed_int_setup()
1120 qed_int_sp_sb_setup(p_hwfn, p_ptt); qed_int_setup()
359 qed_int_sb_attn_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_sb_attn_setup() argument
376 qed_int_sb_attn_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, void *sb_virt_addr, dma_addr_t sb_phy_addr) qed_int_sb_attn_init() argument
393 qed_int_sb_attn_alloc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_sb_attn_alloc() argument
468 qed_int_cau_conf_sb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, dma_addr_t sb_phys, u16 igu_sb_id, u16 vf_number, u8 vf_valid) qed_int_cau_conf_sb() argument
525 qed_int_cau_conf_pi(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u16 igu_sb_id, u32 pi_index, enum qed_coalescing_fsm coalescing_fsm, u8 timeset) qed_int_cau_conf_pi() argument
557 qed_int_sb_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_sb_info *sb_info) qed_int_sb_setup() argument
595 qed_int_sb_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_sb_info *sb_info, void *sb_virt_addr, dma_addr_t sb_phy_addr, u16 sb_id) qed_int_sb_init() argument
661 qed_int_sp_sb_alloc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_sp_sb_alloc() argument
695 qed_int_sp_sb_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_sp_sb_setup() argument
758 qed_int_igu_enable_int(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, enum qed_int_mode int_mode) qed_int_igu_enable_int() argument
820 qed_int_igu_disable_int(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_igu_disable_int() argument
829 qed_int_igu_cleanup_sb(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 sb_id, bool cleanup_set, u16 opaque_fid ) qed_int_igu_cleanup_sb() argument
885 qed_int_igu_init_pure_rt_single(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 sb_id, u16 opaque, bool b_set) qed_int_igu_init_pure_rt_single() argument
906 qed_int_igu_init_pure_rt(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool b_set, bool b_slowpath) qed_int_igu_init_pure_rt() argument
940 qed_int_igu_read_cam(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_igu_read_cam() argument
1087 qed_int_alloc(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_alloc() argument
1117 qed_int_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_int_setup() argument
H A Dqed_init_fw_funcs.c304 struct qed_ptt *p_ptt, qed_tx_pq_map_rt_init()
398 curr_mask = qed_rd(p_hwfn, p_ptt, qed_tx_pq_map_rt_init()
595 struct qed_ptt *p_ptt) qed_poll_on_qm_cmd_ready()
602 reg_val = qed_rd(p_hwfn, p_ptt, QM_REG_SDMCMDREADY); qed_poll_on_qm_cmd_ready()
616 struct qed_ptt *p_ptt, qed_send_qm_cmd()
621 if (!qed_poll_on_qm_cmd_ready(p_hwfn, p_ptt)) qed_send_qm_cmd()
624 qed_wr(p_hwfn, p_ptt, QM_REG_SDMCMDADDR, cmd_addr); qed_send_qm_cmd()
625 qed_wr(p_hwfn, p_ptt, QM_REG_SDMCMDDATALSB, cmd_data_lsb); qed_send_qm_cmd()
626 qed_wr(p_hwfn, p_ptt, QM_REG_SDMCMDDATAMSB, cmd_data_msb); qed_send_qm_cmd()
627 qed_wr(p_hwfn, p_ptt, QM_REG_SDMCMDGO, 1); qed_send_qm_cmd()
628 qed_wr(p_hwfn, p_ptt, QM_REG_SDMCMDGO, 0); qed_send_qm_cmd()
630 return qed_poll_on_qm_cmd_ready(p_hwfn, p_ptt); qed_send_qm_cmd()
684 struct qed_ptt *p_ptt, qed_qm_pf_rt_init()
703 qed_tx_pq_map_rt_init(p_hwfn, p_ptt, p_params, other_mem_size_4kb); qed_qm_pf_rt_init()
724 struct qed_ptt *p_ptt, qed_init_pf_rl()
735 qed_wr(p_hwfn, p_ptt, qed_init_pf_rl()
738 qed_wr(p_hwfn, p_ptt, QM_REG_RLPFINCVAL + pf_id * 4, inc_val); qed_init_pf_rl()
744 struct qed_ptt *p_ptt, qed_init_vport_rl()
755 qed_wr(p_hwfn, p_ptt, qed_init_vport_rl()
758 qed_wr(p_hwfn, p_ptt, QM_REG_RLGLBLINCVAL + vport_id * 4, inc_val); qed_init_vport_rl()
764 struct qed_ptt *p_ptt, qed_send_qm_stop_cmd()
790 if (!qed_send_qm_cmd(p_hwfn, p_ptt, QM_STOP_CMD_ADDR, qed_send_qm_stop_cmd()
302 qed_tx_pq_map_rt_init( struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_qm_pf_rt_init_params *p_params, u32 base_mem_addr_4kb) qed_tx_pq_map_rt_init() argument
594 qed_poll_on_qm_cmd_ready(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) qed_poll_on_qm_cmd_ready() argument
615 qed_send_qm_cmd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u32 cmd_addr, u32 cmd_data_lsb, u32 cmd_data_msb) qed_send_qm_cmd() argument
683 qed_qm_pf_rt_init(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, struct qed_qm_pf_rt_init_params *p_params) qed_qm_pf_rt_init() argument
723 qed_init_pf_rl(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u8 pf_id, u32 pf_rl) qed_init_pf_rl() argument
743 qed_init_vport_rl(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, u8 vport_id, u32 vport_rl) qed_init_vport_rl() argument
763 qed_send_qm_stop_cmd(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, bool is_release_cmd, bool is_tx_pq, u16 start_pq, u16 num_pqs) qed_send_qm_stop_cmd() argument
H A Dqed_init_ops.h29 * @param p_ptt
36 struct qed_ptt *p_ptt,
H A Dqed_dev_api.h155 * @param p_ptt
158 struct qed_ptt *p_ptt);
188 * @param p_ptt
196 struct qed_ptt *p_ptt,
274 * @param p_ptt
280 struct qed_ptt *p_ptt,
H A Dqed_hsi.h1625 struct qed_ptt *p_ptt,
1632 * @param p_ptt - ptt window used for writing the registers
1639 struct qed_ptt *p_ptt,
1647 * @param p_ptt - ptt window used for writing the registers
1655 struct qed_ptt *p_ptt,
1662 * @param p_ptt - ptt window used for writing the registers
1673 struct qed_ptt *p_ptt,

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