Lines Matching refs:p_ptt

360 				  struct qed_ptt *p_ptt)  in qed_int_sb_attn_setup()  argument
370 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_L, in qed_int_sb_attn_setup()
372 qed_wr(p_hwfn, p_ptt, IGU_REG_ATTN_MSG_ADDR_H, in qed_int_sb_attn_setup()
377 struct qed_ptt *p_ptt, in qed_int_sb_attn_init() argument
390 qed_int_sb_attn_setup(p_hwfn, p_ptt); in qed_int_sb_attn_init()
394 struct qed_ptt *p_ptt) in qed_int_sb_attn_alloc() argument
421 qed_int_sb_attn_init(p_hwfn, p_ptt, p_virt, p_phys); in qed_int_sb_attn_alloc()
469 struct qed_ptt *p_ptt, in qed_int_cau_conf_sb() argument
483 qed_wr(p_hwfn, p_ptt, val, lower_32_bits(sb_phys)); in qed_int_cau_conf_sb()
484 qed_wr(p_hwfn, p_ptt, val + sizeof(u32), in qed_int_cau_conf_sb()
488 qed_wr(p_hwfn, p_ptt, val, sb_entry.data); in qed_int_cau_conf_sb()
489 qed_wr(p_hwfn, p_ptt, val + sizeof(u32), sb_entry.params); in qed_int_cau_conf_sb()
509 qed_int_cau_conf_pi(p_hwfn, p_ptt, igu_sb_id, RX_PI, in qed_int_cau_conf_sb()
517 qed_int_cau_conf_pi(p_hwfn, p_ptt, in qed_int_cau_conf_sb()
526 struct qed_ptt *p_ptt, in qed_int_cau_conf_pi() argument
547 qed_wr(p_hwfn, p_ptt, in qed_int_cau_conf_pi()
558 struct qed_ptt *p_ptt, in qed_int_sb_setup() argument
565 qed_int_cau_conf_sb(p_hwfn, p_ptt, sb_info->sb_phys, in qed_int_sb_setup()
596 struct qed_ptt *p_ptt, in qed_int_sb_init() argument
623 qed_int_sb_setup(p_hwfn, p_ptt, sb_info); in qed_int_sb_init()
662 struct qed_ptt *p_ptt) in qed_int_sp_sb_alloc() argument
687 qed_int_sb_init(p_hwfn, p_ptt, &p_sb->sb_info, p_virt, in qed_int_sp_sb_alloc()
696 struct qed_ptt *p_ptt) in qed_int_sp_sb_setup() argument
702 qed_int_sb_setup(p_hwfn, p_ptt, &p_hwfn->p_sp_sb->sb_info); in qed_int_sp_sb_setup()
708 qed_int_sb_attn_setup(p_hwfn, p_ptt); in qed_int_sp_sb_setup()
759 struct qed_ptt *p_ptt, in qed_int_igu_enable_int() argument
783 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, igu_pf_conf); in qed_int_igu_enable_int()
786 int qed_int_igu_enable(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, in qed_int_igu_enable() argument
793 qed_wr(p_hwfn, p_ptt, in qed_int_igu_enable()
797 qed_wr(p_hwfn, p_ptt, IGU_REG_LEADING_EDGE_LATCH, 0xfff); in qed_int_igu_enable()
798 qed_wr(p_hwfn, p_ptt, IGU_REG_TRAILING_EDGE_LATCH, 0xfff); in qed_int_igu_enable()
804 qed_wr(p_hwfn, p_ptt, MISC_REG_AEU_MASK_ATTN_IGU, 0xff); in qed_int_igu_enable()
814 qed_int_igu_enable_int(p_hwfn, p_ptt, int_mode); in qed_int_igu_enable()
821 struct qed_ptt *p_ptt) in qed_int_igu_disable_int() argument
825 qed_wr(p_hwfn, p_ptt, IGU_REG_PF_CONFIGURATION, 0); in qed_int_igu_disable_int()
830 struct qed_ptt *p_ptt, in qed_int_igu_cleanup_sb() argument
854 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_32LSB_DATA, data); in qed_int_igu_cleanup_sb()
858 qed_wr(p_hwfn, p_ptt, IGU_REG_COMMAND_REG_CTRL, cmd_ctrl); in qed_int_igu_cleanup_sb()
871 val = qed_rd(p_hwfn, p_ptt, sb_bit_addr); in qed_int_igu_cleanup_sb()
886 struct qed_ptt *p_ptt, in qed_int_igu_init_pure_rt_single() argument
895 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, sb_id, 1, opaque); in qed_int_igu_init_pure_rt_single()
898 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, sb_id, 0, opaque); in qed_int_igu_init_pure_rt_single()
902 qed_wr(p_hwfn, p_ptt, in qed_int_igu_init_pure_rt_single()
907 struct qed_ptt *p_ptt, in qed_int_igu_init_pure_rt() argument
916 val = qed_rd(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION); in qed_int_igu_init_pure_rt()
919 qed_wr(p_hwfn, p_ptt, IGU_REG_BLOCK_CONFIGURATION, val); in qed_int_igu_init_pure_rt()
926 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, sb_id, in qed_int_igu_init_pure_rt()
934 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt, sb_id, in qed_int_igu_init_pure_rt()
941 struct qed_ptt *p_ptt) in qed_int_igu_read_cam() argument
966 val = qed_rd(p_hwfn, p_ptt, in qed_int_igu_read_cam()
1088 struct qed_ptt *p_ptt) in qed_int_alloc() argument
1097 rc = qed_int_sp_sb_alloc(p_hwfn, p_ptt); in qed_int_alloc()
1102 rc = qed_int_sb_attn_alloc(p_hwfn, p_ptt); in qed_int_alloc()
1118 struct qed_ptt *p_ptt) in qed_int_setup() argument
1120 qed_int_sp_sb_setup(p_hwfn, p_ptt); in qed_int_setup()