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Searched refs:mthd (Results 1 – 88 of 88) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dshadow.c39 shadow_fetch(struct nvkm_bios *bios, struct shadow *mthd, u32 upto) in shadow_fetch() argument
43 void *data = mthd->data; in shadow_fetch()
45 u32 read = mthd->func->read(data, start, limit - start, bios); in shadow_fetch()
52 shadow_image(struct nvkm_bios *bios, int idx, u32 offset, struct shadow *mthd) in shadow_image() argument
58 if (mthd->func->no_pcir) { in shadow_image()
61 image.size = mthd->func->size(mthd->data); in shadow_image()
64 if (!shadow_fetch(bios, mthd, offset + 0x1000)) { in shadow_image()
78 if (!shadow_fetch(bios, mthd, image.size)) { in shadow_image()
85 if (!mthd->func->ignore_checksum && in shadow_image()
89 if (mthd->func->rw) in shadow_image()
[all …]
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dchannv50.c43 for (i = 0; list->data[i].mthd; i++) { in nv50_disp_mthd_list()
47 u32 mthd = list->data[i].mthd + (list->mthd * inst); in nv50_disp_mthd_list() local
58 mthd, prev, mods, name ? " // " : "", in nv50_disp_mthd_list()
69 const struct nv50_disp_chan_mthd *mthd = chan->mthd; in nv50_disp_chan_mthd() local
76 for (i = 0; (list = mthd->data[i].mthd) != NULL; i++) { in nv50_disp_chan_mthd()
77 u32 base = chan->head * mthd->addr; in nv50_disp_chan_mthd()
78 for (j = 0; j < mthd->data[i].nr; j++, base += list->addr) { in nv50_disp_chan_mthd()
79 const char *cname = mthd->name; in nv50_disp_chan_mthd()
83 if (mthd->addr) { in nv50_disp_chan_mthd()
85 mthd->name, chan->chid); in nv50_disp_chan_mthd()
[all …]
Dcorenv50.c35 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_core_new() argument
56 return nv50_disp_dmac_new_(func, mthd, root, chid, 0, in nv50_disp_core_new()
62 .mthd = 0x0000,
75 .mthd = 0x0080,
87 .mthd = 0x0040,
97 .mthd = 0x0040,
107 .mthd = 0x0400,
240 .mthd = &nv50_disp_core_chan_mthd,
Dcoregf119.c35 .mthd = 0x0000,
48 .mthd = 0x0020,
61 .mthd = 0x0020,
74 .mthd = 0x0020,
87 .mthd = 0x0300,
242 .mthd = &gf119_disp_core_chan_mthd,
Dbasenv50.c34 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_base_new() argument
59 return nv50_disp_dmac_new_(func, mthd, root, chid + head, in nv50_disp_base_new()
65 .mthd = 0x0000,
90 .mthd = 0x0400,
121 .mthd = &nv50_disp_base_chan_mthd,
Dchannv50.h8 const struct nv50_disp_chan_mthd *mthd; member
46 u32 mthd; member
49 u32 mthd; member
62 const struct nv50_disp_mthd_list *mthd; member
97 const struct nv50_disp_chan_mthd *mthd; member
Dovlynv50.c34 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_ovly_new() argument
59 return nv50_disp_dmac_new_(func, mthd, root, chid + head, in nv50_disp_ovly_new()
65 .mthd = 0x0000,
109 .mthd = &nv50_disp_ovly_chan_mthd,
Dbasegf119.c31 .mthd = 0x0000,
81 .mthd = 0x0020,
112 .mthd = &gf119_disp_base_chan_mthd,
Dcoreg84.c31 .mthd = 0x0080,
43 .mthd = 0x0400,
115 .mthd = &g84_disp_core_chan_mthd,
Drootnv50.c69 nv50_disp_root_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nv50_disp_root_mthd_() argument
83 if (mthd != NV50_DISP_MTHD) in nv50_disp_root_mthd_()
90 mthd = args->v0.method; in nv50_disp_root_mthd_()
98 mthd = args->v1.method; in nv50_disp_root_mthd_()
120 switch (mthd) { in nv50_disp_root_mthd_()
127 switch (mthd * !!outp) { in nv50_disp_root_mthd_()
197 return sclass->ctor(sclass->func, sclass->mthd, root, sclass->chid, in nv50_disp_root_dmac_new_()
207 return sclass->ctor(sclass->func, sclass->mthd, root, sclass->chid, in nv50_disp_root_pioc_new_()
265 .mthd = nv50_disp_root_mthd_,
Drootnv04.c82 nv04_disp_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nv04_disp_mthd() argument
94 mthd = args->v0.method; in nv04_disp_mthd()
102 switch (mthd) { in nv04_disp_mthd()
114 .mthd = nv04_disp_mthd,
Dovlygk104.c31 .mthd = 0x0000,
101 .mthd = &gk104_disp_ovly_chan_mthd,
Dovlygf119.c31 .mthd = 0x0000,
99 .mthd = &gf119_disp_ovly_chan_mthd,
Dovlyg84.c31 .mthd = 0x0000,
75 .mthd = &g84_disp_ovly_chan_mthd,
Dovlygt200.c31 .mthd = 0x0000,
78 .mthd = &gt200_disp_ovly_chan_mthd,
Dbaseg84.c31 .mthd = 0x0000,
78 .mthd = &g84_disp_base_chan_mthd,
Dcoregk104.c31 .mthd = 0x0300,
130 .mthd = &gk104_disp_core_chan_mthd,
Dcoreg94.c31 .mthd = 0x0040,
61 .mthd = &g94_disp_core_chan_mthd,
Doimmnv50.c34 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_oimm_new() argument
56 return nv50_disp_chan_new_(func, mthd, root, chid + head, in nv50_disp_oimm_new()
Dcursnv50.c34 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_curs_new() argument
56 return nv50_disp_chan_new_(func, mthd, root, chid + head, in nv50_disp_curs_new()
Dcoregt200.c36 .mthd = &g84_disp_core_chan_mthd,
Dbasegk104.c36 .mthd = &gf119_disp_base_chan_mthd,
Dbasegt215.c36 .mthd = &g84_disp_base_chan_mthd,
Dbasegk110.c36 .mthd = &gf119_disp_base_chan_mthd,
Dcoregm204.c36 .mthd = &gk104_disp_core_chan_mthd,
Dcoregm107.c36 .mthd = &gk104_disp_core_chan_mthd,
Dcoregt215.c36 .mthd = &g94_disp_core_chan_mthd,
Dovlygt215.c36 .mthd = &g84_disp_ovly_chan_mthd,
Dcoregk110.c36 .mthd = &gk104_disp_core_chan_mthd,
Dbasegt200.c36 .mthd = &g84_disp_base_chan_mthd,
Ddmacnv50.c135 const struct nv50_disp_chan_mthd *mthd, in nv50_disp_dmac_new_() argument
151 ret = nv50_disp_chan_ctor(&nv50_disp_dmac_func_, mthd, root, in nv50_disp_dmac_new_()
Dgf119.c426 u32 mthd = nvkm_rd32(device, 0x6101f0 + (chid * 12)); in gf119_disp_intr_error() local
431 chid, (mthd & 0x0000ffc), data, mthd, unkn); in gf119_disp_intr_error()
434 switch (mthd & 0xffc) { in gf119_disp_intr_error()
Ddmacnv50.h39 const struct nv50_disp_chan_mthd *mthd; member
Dnv50.c201 u32 mthd = (addr & 0x00000ffc); in nv50_disp_intr_error() local
210 chid, mthd, data); in nv50_disp_intr_error()
213 switch (mthd) { in nv50_disp_intr_error()
/linux-4.4.14/drivers/gpu/drm/nouveau/
Dnouveau_dma.h111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NV04() argument
113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd); in BEGIN_NV04()
117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NI04() argument
119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd); in BEGIN_NI04()
123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NVC0() argument
125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_NVC0()
129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size) in BEGIN_NIC0() argument
131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_NIC0()
135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) in BEGIN_IMC0() argument
137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); in BEGIN_IMC0()
Dnouveau_bo.c1120 }, *mthd = _methods; in nouveau_bo_move_init() local
1127 if (mthd->engine) in nouveau_bo_move_init()
1135 mthd->oclass | (mthd->engine << 16), in nouveau_bo_move_init()
1136 mthd->oclass, NULL, 0, in nouveau_bo_move_init()
1139 ret = mthd->init(chan, drm->ttm.copy.handle); in nouveau_bo_move_init()
1145 drm->ttm.move = mthd->exec; in nouveau_bo_move_init()
1147 name = mthd->name; in nouveau_bo_move_init()
1150 } while ((++mthd)->exec); in nouveau_bo_move_init()
Dnv50_display.c1739 struct nv50_disp_mthd_v1 mthd; in nv50_audio_mode_set() member
1744 .base.mthd.version = 1, in nv50_audio_mode_set()
1745 .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, in nv50_audio_mode_set()
1746 .base.mthd.hasht = nv_encoder->dcb->hasht, in nv50_audio_mode_set()
1747 .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) | in nv50_audio_mode_set()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sw/
Dnvsw.c30 nvkm_nvsw_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_nvsw_mthd_() argument
33 if (nvsw->func->mthd) in nvkm_nvsw_mthd_()
34 return nvsw->func->mthd(nvsw, mthd, data, size); in nvkm_nvsw_mthd_()
39 nvkm_nvsw_ntfy_(struct nvkm_object *object, u32 mthd, in nvkm_nvsw_ntfy_() argument
43 switch (mthd) { in nvkm_nvsw_ntfy_()
55 .mthd = nvkm_nvsw_mthd_,
Dnv04.c59 nv04_nvsw_mthd(struct nvkm_nvsw *nvsw, u32 mthd, void *data, u32 size) in nv04_nvsw_mthd() argument
61 switch (mthd) { in nv04_nvsw_mthd()
72 .mthd = nv04_nvsw_mthd,
87 nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) in nv04_sw_chan_mthd() argument
91 switch (mthd) { in nv04_sw_chan_mthd()
104 .mthd = nv04_sw_chan_mthd,
Dchan.c33 nvkm_sw_chan_mthd(struct nvkm_sw_chan *chan, int subc, u32 mthd, u32 data) in nvkm_sw_chan_mthd() argument
35 switch (mthd) { in nvkm_sw_chan_mthd()
42 if (chan->func->mthd) in nvkm_sw_chan_mthd()
43 return chan->func->mthd(chan, subc, mthd, data); in nvkm_sw_chan_mthd()
Dchan.h19 bool (*mthd)(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data); member
25 bool nvkm_sw_chan_mthd(struct nvkm_sw_chan *, int subc, u32 mthd, u32 data);
Dnvsw.h13 int (*mthd)(struct nvkm_nvsw *, u32 mthd, void *data, u32 size); member
Dgf100.c57 gf100_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) in gf100_sw_chan_mthd() argument
62 switch (mthd) { in gf100_sw_chan_mthd()
101 .mthd = gf100_sw_chan_mthd,
Dnv50.c62 nv50_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data) in nv50_sw_chan_mthd() argument
67 switch (mthd) { in nv50_sw_chan_mthd()
96 .mthd = nv50_sw_chan_mthd,
Dbase.c30 nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data) in nvkm_sw_mthd() argument
39 handled = nvkm_sw_chan_mthd(chan, subc, mthd, data); in nvkm_sw_mthd()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dnv04.c758 nv03_gr_mthd_gdi(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv03_gr_mthd_gdi() argument
761 switch (mthd) { in nv03_gr_mthd_gdi()
774 nv04_gr_mthd_gdi(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_gdi() argument
777 switch (mthd) { in nv04_gr_mthd_gdi()
791 nv01_gr_mthd_blit(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv01_gr_mthd_blit() argument
794 switch (mthd) { in nv01_gr_mthd_blit()
810 nv04_gr_mthd_blit(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_blit() argument
813 switch (mthd) { in nv04_gr_mthd_blit()
829 nv04_gr_mthd_iifc(struct nvkm_device *device, u32 inst, u32 mthd, u32 data) in nv04_gr_mthd_iifc() argument
832 switch (mthd) { in nv04_gr_mthd_iifc()
[all …]
Dnv10.c431 nv17_gr_mthd_lma_window(struct nv10_gr_chan *chan, u32 mthd, u32 data) in nv17_gr_mthd_lma_window() argument
440 chan->lma_window[(mthd - 0x1638) / 4] = data; in nv17_gr_mthd_lma_window()
442 if (mthd != 0x1644) in nv17_gr_mthd_lma_window()
504 nv17_gr_mthd_lma_enable(struct nv10_gr_chan *chan, u32 mthd, u32 data) in nv17_gr_mthd_lma_enable() argument
516 nv17_gr_mthd_celcius(struct nv10_gr_chan *chan, u32 mthd, u32 data) in nv17_gr_mthd_celcius() argument
519 switch (mthd) { in nv17_gr_mthd_celcius()
526 func(chan, mthd, data); in nv17_gr_mthd_celcius()
531 nv10_gr_mthd(struct nv10_gr_chan *chan, u8 class, u32 mthd, u32 data) in nv10_gr_mthd() argument
539 return func(chan, mthd, data); in nv10_gr_mthd()
1092 u32 mthd = (addr & 0x00001ffc); in nv10_gr_intr() local
[all …]
Dnv50.c422 u32 mthd = (addr & 0x00001ffc); in nv50_gr_trap_handler() local
434 chid, inst, name, subc, class, mthd, in nv50_gr_trap_handler()
450 u32 mthd = (addr & 0x00001ffc); in nv50_gr_trap_handler() local
460 subc, class, mthd, data, addr); in nv50_gr_trap_handler()
628 u32 mthd = (addr & 0x00001ffc); in nv50_gr_intr() local
667 subc, class, mthd, data); in nv50_gr_intr()
Dctxgf117.c254 gf100_gr_mthd(gr, grctx->mthd); in gf117_grctx_generate_main()
268 .mthd = gf119_grctx_pack_mthd,
Dctxgk110b.c82 .mthd = gk110_grctx_pack_mthd,
Dctxgf104.c91 .mthd = gf100_grctx_pack_mthd,
Dctxgm206.c62 .mthd = gm204_grctx_pack_mthd,
Dctxgf110.c342 .mthd = gf110_grctx_pack_mthd,
Dctxgm204.c1021 gf100_gr_mthd(gr, grctx->mthd); in gm204_grctx_generate_main()
1037 .mthd = gm204_grctx_pack_mthd,
Dgf100.c214 gf100_fermi_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in gf100_fermi_mthd() argument
216 switch (mthd) { in gf100_fermi_mthd()
229 .mthd = gf100_fermi_mthd,
240 gf100_gr_mthd_sw(struct nvkm_device *device, u16 class, u32 mthd, u32 data) in gf100_gr_mthd_sw() argument
245 switch (mthd) { in gf100_gr_mthd_sw()
1149 u32 mthd = (addr & 0x00003ffc); in gf100_gr_ctxctl_isr() local
1154 subc, class, mthd, data); in gf100_gr_ctxctl_isr()
1188 u32 mthd = (addr & 0x00003ffc); in gf100_gr_intr() local
1217 if (!gf100_gr_mthd_sw(device, class, mthd, data)) { in gf100_gr_intr()
1221 class, mthd, data); in gf100_gr_intr()
[all …]
Dctxgf119.c510 .mthd = gf119_grctx_pack_mthd,
Dctxgk208.c543 .mthd = gk110_grctx_pack_mthd,
Dctxgk110.c821 .mthd = gk110_grctx_pack_mthd,
Dctxgk104.c990 gf100_gr_mthd(gr, grctx->mthd); in gk104_grctx_generate_main()
1007 .mthd = gk104_grctx_pack_mthd,
Dctxgm107.c991 gf100_gr_mthd(gr, grctx->mthd); in gm107_grctx_generate_main()
1009 .mthd = gm107_grctx_pack_mthd,
Dctxgf108.c788 .mthd = gf108_grctx_pack_mthd,
Dnv40.c244 u32 mthd = (addr & 0x00001ffc); in nv40_gr_intr() local
280 subc, class, mthd, data); in nv40_gr_intr()
Dnv20.c191 u32 mthd = (addr & 0x00001ffc); in nv20_gr_intr() local
212 subc, class, mthd, data); in nv20_gr_intr()
Dctxgf100.h35 const struct gf100_gr_pack *mthd; member
Dctxgf100.c1265 gf100_gr_mthd(gr, grctx->mthd); in gf100_grctx_generate_main()
1395 .mthd = gf100_grctx_pack_mthd,
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
Dmemx.c10 u32 mthd; member
22 if (memx->c.mthd) { in memx_out()
23 nvkm_wr32(device, 0x10a1c4, (memx->c.size << 16) | memx->c.mthd); in memx_out()
26 memx->c.mthd = 0; in memx_out()
32 memx_cmd(struct nvkm_memx *memx, u32 mthd, u32 size, u32 data[]) in memx_cmd() argument
35 (memx->c.mthd && memx->c.mthd != mthd)) in memx_cmd()
39 memx->c.mthd = mthd; in memx_cmd()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
Dnv31.c125 nv31_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) in nv31_mpeg_mthd_dma() argument
138 if (mthd == 0x0190) { in nv31_mpeg_mthd_dma()
145 if (mthd == 0x01a0) { in nv31_mpeg_mthd_dma()
164 nv31_mpeg_mthd(struct nv31_mpeg *mpeg, u32 mthd, u32 data) in nv31_mpeg_mthd() argument
167 switch (mthd) { in nv31_mpeg_mthd()
171 return mpeg->func->mthd_dma(device, mthd, data); in nv31_mpeg_mthd()
186 u32 mthd = nvkm_rd32(device, 0x00b234); in nv31_mpeg_intr() local
195 if (type == 0x00000020 && mthd == 0x0000) { in nv31_mpeg_intr()
201 if (!nv31_mpeg_mthd(mpeg, mthd, data)) in nv31_mpeg_intr()
213 "unknown", stat, type, mthd, data); in nv31_mpeg_intr()
Dnv44.c129 nv44_mpeg_mthd(struct nvkm_device *device, u32 mthd, u32 data) in nv44_mpeg_mthd() argument
131 switch (mthd) { in nv44_mpeg_mthd()
135 return nv40_mpeg_mthd_dma(device, mthd, data); in nv44_mpeg_mthd()
153 u32 mthd = nvkm_rd32(device, 0x00b234); in nv44_mpeg_intr() local
169 if (type == 0x00000020 && mthd == 0x0000) { in nv44_mpeg_intr()
175 if (!nv44_mpeg_mthd(subdev->device, mthd, data)) in nv44_mpeg_intr()
187 stat, type, mthd, data); in nv44_mpeg_intr()
Dnv40.c31 nv40_mpeg_mthd_dma(struct nvkm_device *device, u32 mthd, u32 data) in nv40_mpeg_mthd_dma() argument
45 if (mthd == 0x0190) { in nv40_mpeg_mthd_dma()
51 if (mthd == 0x01a0) { in nv40_mpeg_mthd_dma()
Dnv50.c66 u32 mthd = nvkm_rd32(device, 0x00b234); in nv50_mpeg_intr() local
72 if (type == 0x00000020 && mthd == 0x0000) { in nv50_mpeg_intr()
80 stat, type, mthd, data); in nv50_mpeg_intr()
Dnv31.h17 bool (*mthd_dma)(struct nvkm_device *, u32 mthd, u32 data);
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/
Dobject.h28 int (*mthd)(struct nvkm_object *, u32 mthd, void *data, u32 size); member
29 int (*ntfy)(struct nvkm_object *, u32 mthd, struct nvkm_event **);
53 int nvkm_object_mthd(struct nvkm_object *, u32 mthd, void *data, u32 size);
54 int nvkm_object_ntfy(struct nvkm_object *, u32 mthd, struct nvkm_event **);
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv04.c112 const int mthd = (addr & 0x00001ffc); in nv04_fifo_swmthd() local
117 switch (mthd) { in nv04_fifo_swmthd()
125 handled = nvkm_sw_mthd(sw, chid, subc, mthd, data); in nv04_fifo_swmthd()
142 u32 mthd, data; in nv04_fifo_cache_error() local
153 mthd = nvkm_rd32(device, NV04_PFIFO_CACHE1_METHOD(ptr)); in nv04_fifo_cache_error()
156 mthd = nvkm_rd32(device, NV40_PFIFO_CACHE1_METHOD(ptr)); in nv04_fifo_cache_error()
161 !nv04_fifo_swmthd(device, chid, mthd, data)) { in nv04_fifo_cache_error()
166 (mthd >> 13) & 7, mthd & 0x1ffc, data); in nv04_fifo_cache_error()
Dgf100.c368 u32 mthd = (addr & 0x00003ffc); in gf100_fifo_intr_pbdma() local
376 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) in gf100_fifo_intr_pbdma()
388 subc, mthd, data); in gf100_fifo_intr_pbdma()
Dgk104.c460 u32 mthd = (addr & 0x00003ffc); in gk104_fifo_intr_pbdma_0() local
468 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) in gk104_fifo_intr_pbdma_0()
481 subc, mthd, data); in gk104_fifo_intr_pbdma_0()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvif/
Dobject.c140 nvif_object_mthd(struct nvif_object *object, u32 mthd, void *data, u32 size) in nvif_object_mthd() argument
144 struct nvif_ioctl_mthd_v0 mthd; in nvif_object_mthd() member
157 args->mthd.version = 0; in nvif_object_mthd()
158 args->mthd.method = mthd; in nvif_object_mthd()
160 memcpy(args->mthd.data, data, size); in nvif_object_mthd()
162 memcpy(data, args->mthd.data, size); in nvif_object_mthd()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/core/
Doproxy.c27 nvkm_oproxy_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_oproxy_mthd() argument
29 return nvkm_object_mthd(nvkm_oproxy(object)->object, mthd, data, size); in nvkm_oproxy_mthd()
33 nvkm_oproxy_ntfy(struct nvkm_object *object, u32 mthd, in nvkm_oproxy_ntfy() argument
36 return nvkm_object_ntfy(nvkm_oproxy(object)->object, mthd, pevent); in nvkm_oproxy_ntfy()
171 .mthd = nvkm_oproxy_mthd,
Dobject.c29 nvkm_object_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_object_mthd() argument
31 if (likely(object->func->mthd)) in nvkm_object_mthd()
32 return object->func->mthd(object, mthd, data, size); in nvkm_object_mthd()
37 nvkm_object_ntfy(struct nvkm_object *object, u32 mthd, in nvkm_object_ntfy() argument
41 return object->func->ntfy(object, mthd, pevent); in nvkm_object_ntfy()
Dclient.c167 nvkm_client_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_client_mthd() argument
169 switch (mthd) { in nvkm_client_mthd()
204 .mthd = nvkm_client_mthd,
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sec/
Dg98.c49 u32 mthd = (addr & 0x07ff) << 2; in g98_sec_intr() local
60 subc, mthd, data); in g98_sec_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/ce/
Dgt215.c50 u32 mthd = (addr & 0x07ff) << 2; in gt215_ce_intr() local
61 subc, mthd, data); in gt215_ce_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/cipher/
Dg84.c87 u32 mthd = nvkm_rd32(device, 0x102190); in g84_cipher_intr() local
100 mthd, data); in g84_cipher_intr()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dctrl.c169 nvkm_control_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_control_mthd() argument
172 switch (mthd) { in nvkm_control_mthd()
187 .mthd = nvkm_control_mthd,
Duser.c140 nvkm_udevice_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_udevice_mthd() argument
143 switch (mthd) { in nvkm_udevice_mthd()
304 .mthd = nvkm_udevice_mthd,
319 .mthd = nvkm_udevice_mthd,
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/engine/
Dsw.h12 bool nvkm_sw_mthd(struct nvkm_sw *sw, int chid, int subc, u32 mthd, u32 data);
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/pm/
Dbase.c291 nvkm_perfdom_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_perfdom_mthd() argument
294 switch (mthd) { in nvkm_perfdom_mthd()
360 .mthd = nvkm_perfdom_mthd,
586 nvkm_perfmon_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) in nvkm_perfmon_mthd() argument
589 switch (mthd) { in nvkm_perfmon_mthd()
639 .mthd = nvkm_perfmon_mthd,
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc73 // mthd 0x0000, NAME
76 // mthd 0x0100, NOP
79 // mthd 0x0140, PM_TRIGGER
83 // mthd 0x0180-0x018c, DMA_
90 // mthd 0x0200-0x0218, SRC_TILE
99 // mthd 0x0220-0x0238, DST_TILE
108 // mthd 0x0300-0x0304, EXEC, WRCACHE_FLUSH
112 // mthd 0x030c-0x0340, various stuff
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s211 // mthd 0 and 0x100 [NAME, NOP]: ignore
229 // mthd 0x140: PM_TRIGGER
237 // mthd 0x180...: DMA_*