Searched refs:metag_in32 (Results 1 – 15 of 15) sorted by relevance
26 unsigned int config2 = metag_in32(METAC_CORE_CONFIG2); in get_dcache_size()36 unsigned int config2 = metag_in32(METAC_CORE_CONFIG2); in get_icache_size()46 unsigned int cpart = metag_in32(SYSC_DCPART(hard_processor_id())); in get_global_dcache_size()53 unsigned int cpart = metag_in32(SYSC_ICPART(hard_processor_id())); in get_global_icache_size()64 isEnabled = (cache == DCACHE ? metag_in32(MMCU_DCACHE_CTRL_ADDR) & 0x1 : in get_thread_cache_size()65 metag_in32(MMCU_ICACHE_CTRL_ADDR) & 0x1); in get_thread_cache_size()78 (metag_in32(SYSC_DCPART(thread_id)) >> offset) & 0xF : in get_thread_cache_size()79 (metag_in32(SYSC_ICPART(thread_id)) >> offset) & 0xF); in get_thread_cache_size()
55 while (!(metag_in32(TXUXXRXRQ) & TXUXXRXRQ_DREADY_BIT)) in core_reg_write()66 while (!(metag_in32(TXUXXRXRQ) & TXUXXRXRQ_DREADY_BIT)) in core_reg_write()91 val = metag_in32(cu_reg); in core_reg_read()98 while (!(metag_in32(TXUXXRXRQ) & TXUXXRXRQ_DREADY_BIT)) in core_reg_read()107 while (!(metag_in32(TXUXXRXRQ) & TXUXXRXRQ_DREADY_BIT)) in core_reg_read()111 val = metag_in32(TXUXXRXDT); in core_reg_read()
184 dcpart_this = metag_in32(SYSC_DCPART(this_thread)); in setup_smp_cache()185 dcpart_old = metag_in32(SYSC_DCPART(thread)); in setup_smp_cache()197 icpart_new = metag_in32(SYSC_ICPART(this_thread)); in setup_smp_cache()198 icpart_old = metag_in32(SYSC_ICPART(thread)); in setup_smp_cache()
19 _metag_da_present = (metag_in32(T0VECINT_BHALT) == 1); in metag_da_probe()
29 return (metag_in32(EXPAND_TIMER_DIV) + 1) * 1000000; in get_core_freq_default()
440 int coreid = metag_in32(METAC_CORE_ID); in get_cpu_capabilities()
104 while (metag_in32(SYSC_L2C_INIT) == SYSC_L2C_INIT_IN_PROGRESS) in _meta_l2c_init()115 while (metag_in32(SYSC_L2C_PURGE) == SYSC_L2C_PURGE_IN_PROGRESS) in _meta_l2c_purge()124 enable = metag_in32(SYSC_L2C_ENABLE); in _meta_l2c_enable()137 enable = metag_in32(SYSC_L2C_ENABLE); in _meta_l2c_pf_enable()148 return metag_in32(SYSC_L2C_ENABLE) & SYSC_L2C_ENABLE_ENABLE_BIT; in _meta_l2c_is_enabled()154 return metag_in32(SYSC_L2C_ENABLE) & SYSC_L2C_ENABLE_PFENABLE_BIT; in _meta_l2c_pf_is_enabled()
124 #define metag_in32(addr) __raw_readl((volatile void __iomem *)(addr)) macro
185 if (metag_in32(stat_addr) & bit) in meta_intc_ack_irq()276 metag_out32(metag_in32(mask_addr) & ~bit, mask_addr); in meta_intc_mask_irq()299 metag_out32(metag_in32(mask_addr) | bit, mask_addr); in meta_intc_unmask_irq()356 if (metag_in32(stat_addr) & bit) { in meta_intc_unmask_edge_irq_nomask()358 while (!(metag_in32(stat_addr) & bit)) in meta_intc_unmask_edge_irq_nomask()388 if (metag_in32(stat_addr) & bit) in meta_intc_unmask_level_irq_nomask()423 level = metag_in32(level_addr); in meta_intc_irq_set_type()462 status = metag_in32(stat_addr) & priv->unmasked[bank]; in meta_intc_irq_demux()576 if (metag_in32(level_addr) & bit) in meta_intc_map()649 context->vectors[hw] = metag_in32(vec_addr); in meta_intc_suspend()[all …]
127 if (metag_in32(HWSTATMETA) & bit) in metag_internal_irq_ack()181 if (metag_in32(HWSTATMETA) & bit) { in metag_internal_irq_unmask()183 while (!(metag_in32(HWSTATMETA) & bit)) in metag_internal_irq_unmask()231 status = metag_in32(HWSTATMETA) & priv->unmasked; in metag_internal_irq_demux()
61 base_phys = metag_in32(MMCU_TABLE_PHYS_ADDR); in __get_mmu_base()100 pgtable_phys = metag_in32(pgd_entry_addr(virt)) & MMCU_ENTRY_ADDR_BITS; in pgtable_entry_addr()113 return metag_in32(pgd_entry_addr(vaddr)); in mmu_read_first_level_page()118 return metag_in32(pgtable_entry_addr(vaddr)); in mmu_read_second_level_page()
125 int coreid = metag_in32(METAC_CORE_ID); in metag_cache_probe()126 int config = metag_in32(METAC_CORE_CONFIG2); in metag_cache_probe()219 part = metag_in32(SYSC_DCPART0 + in metag_phys_data_cache_flush()286 if ((metag_in32(SYSC_CACHE_MMU_CONFIG) & SYSC_CMMUCFG_DC_ON_BIT) == 0) in metag_data_cache_flush_all()298 if ((metag_in32(SYSC_CACHE_MMU_CONFIG) & SYSC_CMMUCFG_DC_ON_BIT) == 0) in metag_data_cache_flush()362 part = metag_in32(SYSC_ICPART0 + in metag_phys_code_cache_flush()457 if ((metag_in32(SYSC_CACHE_MMU_CONFIG) & SYSC_CMMUCFG_IC_ON_BIT) == 0) in metag_code_cache_flush_all()472 if ((metag_in32(SYSC_CACHE_MMU_CONFIG) & SYSC_CMMUCFG_IC_ON_BIT) == 0) in metag_code_cache_flush()
30 phys0 = metag_in32(mmu_phys0_addr(cpu)); in mmu_read_first_level_page()69 stride += (metag_in32(mmu_phys1_addr(cpu)) & 0x7fffc); in mmu_get_base()98 phys0 = metag_in32(phys0_addr); in repriv_mmu_tables()
658 tmp |= metag_in32(PERF_COUNT(idx)) & 0x00ffffff; in metag_pmu_enable_counter()698 tmp = metag_in32(PERF_COUNT(idx)); in metag_pmu_disable_counter()714 tmp = metag_in32(PERF_COUNT(idx)) & 0x00ffffff; in metag_pmu_read_counter()739 tmp = metag_in32(PERF_COUNT(idx)) & 0xff000000; in metag_pmu_write_counter()768 counter = metag_in32(PERF_COUNT(idx)); in metag_pmu_counter_overflow()785 (metag_in32(PERF_COUNT(idx)) & 0x00ffffff); in metag_pmu_counter_overflow()
165 hwtimer_freq = get_coreclock() / (metag_in32(EXPAND_TIMER_DIV) + 1); in metag_generic_timer_init()