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Searched refs:mdiv (Results 1 – 25 of 25) sorted by relevance

/linux-4.4.14/drivers/clk/st/
Dclkgen-fsyn.c39 unsigned long mdiv; member
46 { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 312.5 Khz */
47 { .mdiv = 0x17, .pe = 0x25ed, .sdiv = 0x1, .nsdiv = 0 }, /* 27 MHz */
48 { .mdiv = 0x1a, .pe = 0x7b36, .sdiv = 0x2, .nsdiv = 1 }, /* 36.87 MHz */
49 { .mdiv = 0x13, .pe = 0x0, .sdiv = 0x2, .nsdiv = 1 }, /* 48 MHz */
50 { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x1, .nsdiv = 1 }, /* 108 MHz */
54 { .mdiv = 0x1f, .pe = 0x0, .sdiv = 0x7, .nsdiv = 0 }, /* 625 Khz */
55 { .mdiv = 0x13, .pe = 0x777c, .sdiv = 0x4, .nsdiv = 1 }, /* 25.175 MHz */
56 { .mdiv = 0x19, .pe = 0x4d35, .sdiv = 0x2, .nsdiv = 0 }, /* 25.200 MHz */
57 { .mdiv = 0x11, .pe = 0x1c72, .sdiv = 0x4, .nsdiv = 1 }, /* 27.000 MHz */
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Dclkgen-pll.c58 struct clkgen_field mdiv; member
84 .mdiv = CLKGEN_FIELD(0x0, C65_MDIV_PLL1600_MASK, 0),
93 .mdiv = CLKGEN_FIELD(0x0, C65_MDIV_PLL800_MASK, 0),
317 unsigned long mdiv; member
417 unsigned long mdiv, ndiv, pdiv; in recalc_stm_pll800c65() local
425 mdiv = CLKGEN_READ(pll, mdiv); in recalc_stm_pll800c65()
428 if (!mdiv) in recalc_stm_pll800c65()
429 mdiv++; /* mdiv=0 or 1 => MDIV=1 */ in recalc_stm_pll800c65()
432 rate = (unsigned long)div64_u64(res, mdiv * (1 << pdiv)); in recalc_stm_pll800c65()
444 unsigned long mdiv, ndiv; in recalc_stm_pll1600c65() local
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/linux-4.4.14/drivers/clk/bcm/
Dclk-ns2.c62 .mdiv = REG_VAL(0x18, 0, 8),
68 .mdiv = REG_VAL(0x18, 8, 8),
74 .mdiv = REG_VAL(0x14, 0, 8),
80 .mdiv = REG_VAL(0x14, 8, 8),
86 .mdiv = REG_VAL(0x14, 16, 8),
92 .mdiv = REG_VAL(0x14, 24, 8),
124 .mdiv = REG_VAL(0x18, 0, 8),
130 .mdiv = REG_VAL(0x18, 8, 8),
136 .mdiv = REG_VAL(0x14, 0, 8),
142 .mdiv = REG_VAL(0x14, 8, 8),
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Dclk-cygnus.c76 .mdiv = REG_VAL(0x20, 0, 8),
82 .mdiv = REG_VAL(0x20, 10, 8),
88 .mdiv = REG_VAL(0x20, 20, 8),
94 .mdiv = REG_VAL(0x24, 0, 8),
100 .mdiv = REG_VAL(0x24, 10, 8),
106 .mdiv = REG_VAL(0x24, 20, 8),
134 .mdiv = REG_VAL(0x8, 0, 8),
140 .mdiv = REG_VAL(0x8, 10, 8),
146 .mdiv = REG_VAL(0x8, 20, 8),
152 .mdiv = REG_VAL(0xc, 0, 8),
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Dclk-iproc-armpll.c117 int mdiv; in __get_mdiv() local
125 mdiv = 1; in __get_mdiv()
130 mdiv = val & IPROC_CLK_PLLARMC_MDIV_MASK; in __get_mdiv()
131 if (mdiv == 0) in __get_mdiv()
132 mdiv = 256; in __get_mdiv()
137 mdiv = val & IPROC_CLK_PLLARMCTL5_H_MDIV_MASK; in __get_mdiv()
138 if (mdiv == 0) in __get_mdiv()
139 mdiv = 256; in __get_mdiv()
143 mdiv = -EFAULT; in __get_mdiv()
146 return mdiv; in __get_mdiv()
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Dclk-nsp.c61 .mdiv = REG_VAL(0x18, 16, 8),
67 .mdiv = REG_VAL(0x18, 8, 8),
73 .mdiv = REG_VAL(0x18, 0, 8),
79 .mdiv = REG_VAL(0x1c, 16, 8),
85 .mdiv = REG_VAL(0x1c, 8, 8),
91 .mdiv = REG_VAL(0x1c, 0, 8),
118 .mdiv = REG_VAL(0x8, 24, 8),
124 .mdiv = REG_VAL(0x8, 16, 8),
130 .mdiv = REG_VAL(0x8, 8, 8),
Dclk-iproc-pll.c498 unsigned int mdiv; in iproc_clk_recalc_rate() local
503 val = readl(pll->control_base + ctrl->mdiv.offset); in iproc_clk_recalc_rate()
504 mdiv = (val >> ctrl->mdiv.shift) & bit_mask(ctrl->mdiv.width); in iproc_clk_recalc_rate()
505 if (mdiv == 0) in iproc_clk_recalc_rate()
506 mdiv = 256; in iproc_clk_recalc_rate()
508 clk->rate = parent_rate / mdiv; in iproc_clk_recalc_rate()
550 val = readl(pll->control_base + ctrl->mdiv.offset); in iproc_clk_set_rate()
552 val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); in iproc_clk_set_rate()
554 val &= ~(bit_mask(ctrl->mdiv.width) << ctrl->mdiv.shift); in iproc_clk_set_rate()
555 val |= div << ctrl->mdiv.shift; in iproc_clk_set_rate()
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Dclk-iproc.h171 struct iproc_clk_reg_op mdiv; member
/linux-4.4.14/drivers/clk/samsung/
Dclk-pll.c79 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local
83 mdiv = (pll_con >> PLL2126_MDIV_SHIFT) & PLL2126_MDIV_MASK; in samsung_pll2126_recalc_rate()
87 fvco *= (mdiv + 8); in samsung_pll2126_recalc_rate()
112 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local
116 mdiv = (pll_con >> PLL3000_MDIV_SHIFT) & PLL3000_MDIV_MASK; in samsung_pll3000_recalc_rate()
120 fvco *= (2 * (mdiv + 8)); in samsung_pll3000_recalc_rate()
149 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local
153 mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK; in samsung_pll35xx_recalc_rate()
157 fvco *= mdiv; in samsung_pll35xx_recalc_rate()
171 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
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Dclk-pll.h45 .mdiv = (_m), \
53 .mdiv = (_m), \
62 .mdiv = (_m), \
71 .mdiv = (_m), \
81 .mdiv = (_m), \
95 unsigned int mdiv; member
/linux-4.4.14/arch/arm/mach-s3c24xx/include/mach/
Dregs-s3c2443-clock.h154 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_mpll() local
157 mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; in s3c2443_get_mpll()
161 mdiv &= S3C2443_PLLCON_MDIVMASK; in s3c2443_get_mpll()
165 fvco = (uint64_t)baseclk * (2 * (mdiv + 8)); in s3c2443_get_mpll()
174 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_epll() local
177 mdiv = pllval >> S3C2443_PLLCON_MDIVSHIFT; in s3c2443_get_epll()
181 mdiv &= S3C2443_PLLCON_MDIVMASK; in s3c2443_get_epll()
185 fvco = (uint64_t)baseclk * (mdiv + 8); in s3c2443_get_epll()
/linux-4.4.14/drivers/gpu/drm/sti/
Dsti_hdmi_tx3g0c55phy.c139 u32 mdiv, ndiv, pdiv, val; in enable_pll_rejection() local
168 mdiv = 30; in enable_pll_rejection()
172 mdiv = 30; in enable_pll_rejection()
184 (mdiv << REJECTION_PLL_HDMI_MDIV_SHIFT) | in enable_pll_rejection()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk104.c35 u32 mdiv; member
320 info->mdiv |= 0x80000000; in calc_clk()
321 info->mdiv |= div1D; in calc_clk()
327 info->mdiv |= 0x80000000; in calc_clk()
328 info->mdiv |= div1P << 8; in calc_clk()
410 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f00, info->mdiv); in gk104_clk_prog_3()
412 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x0000003f, info->mdiv); in gk104_clk_prog_3()
Dgf100.c35 u32 mdiv; member
299 info->mdiv |= 0x80000000; in calc_clk()
300 info->mdiv |= div1D; in calc_clk()
306 info->mdiv |= 0x80000000; in calc_clk()
307 info->mdiv |= div1P << 8; in calc_clk()
398 nvkm_mask(device, 0x137250 + (idx * 0x04), 0x00003f3f, info->mdiv); in gf100_clk_prog_4()
Dbase.c278 lo /= clock->mdiv; in nvkm_pstate_info()
279 hi /= clock->mdiv; in nvkm_pstate_info()
/linux-4.4.14/drivers/media/dvb-frontends/
Dhorus3a.c180 u8 mdiv = 0; in horus3a_set_params() local
198 mdiv = 1; in horus3a_set_params()
201 mdiv = 0; in horus3a_set_params()
324 data[4] = (u8)(mdiv << 7); in horus3a_set_params()
Dstb0899_drv.c583 u8 mdiv = 0; in stb0899_set_mclk() local
586 mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1; in stb0899_set_mclk()
587 dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv); in stb0899_set_mclk()
589 stb0899_write_reg(state, STB0899_NCOARSE, mdiv); in stb0899_set_mclk()
/linux-4.4.14/arch/mips/netlogic/xlp/
Dnlm_hal.c311 u32 mdiv, fdiv, pll_out_freq_den, reg_select, ref_div, pic_div; in nlm_xlp2_get_pic_frequency() local
407 mdiv = ctrl_val2 & 0xff; in nlm_xlp2_get_pic_frequency()
431 pll_out_freq_num = ((ref_clk >> 1) * (6 + mdiv)) + fdiv; in nlm_xlp2_get_pic_frequency()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dctrl.c125 args->v0.min = lo / domain->mdiv; in nvkm_control_mthd_pstate_attr()
126 args->v0.max = hi / domain->mdiv; in nvkm_control_mthd_pstate_attr()
/linux-4.4.14/drivers/iio/frequency/
Dadf4350.c135 u16 mdiv, r_cnt = 0; in adf4350_set_freq() local
143 mdiv = 75; in adf4350_set_freq()
146 mdiv = 23; in adf4350_set_freq()
182 } while (mdiv > st->r0_int); in adf4350_set_freq()
/linux-4.4.14/drivers/i2c/busses/
Di2c-octeon.c447 int thp = 0x18, mdiv = 2, ndiv = 0, delta_hz = 1000000; in octeon_i2c_setclock() local
475 mdiv = mdiv_idx; in octeon_i2c_setclock()
482 octeon_i2c_write_sw(i2c, SW_TWSI_EOP_TWSI_CLKCTL, (mdiv << 3) | ndiv); in octeon_i2c_setclock()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/
Dclk.h70 int mdiv; member
/linux-4.4.14/drivers/clk/nxp/
Dclk-lpc18xx-cgu.c353 u32 ctrl, mdiv, msel, npdiv; in lpc18xx_pll0_recalc_rate() local
356 mdiv = clk_readl(pll->reg + LPC18XX_CGU_PLL0USB_MDIV); in lpc18xx_pll0_recalc_rate()
367 msel = lpc18xx_pll0_mdec2msel(mdiv & LPC18XX_PLL0_MDIV_MDEC_MASK); in lpc18xx_pll0_recalc_rate()
/linux-4.4.14/drivers/video/fbdev/savage/
Dsavagefb_driver.c417 long freq_max, unsigned int *mdiv, in SavageCalcClock() argument
459 *mdiv = best_m - 2; in SavageCalcClock()
464 long freq_max, unsigned char *mdiv, in common_calc_clock() argument
500 *mdiv = best_m - 2; in common_calc_clock()
/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_display.c7331 u32 mdiv; in vlv_prepare_pll() local
7361 mdiv = ((bestm1 << DPIO_M1DIV_SHIFT) | (bestm2 & DPIO_M2DIV_MASK)); in vlv_prepare_pll()
7362 mdiv |= ((bestp1 << DPIO_P1_SHIFT) | (bestp2 << DPIO_P2_SHIFT)); in vlv_prepare_pll()
7363 mdiv |= ((bestn << DPIO_N_SHIFT)); in vlv_prepare_pll()
7364 mdiv |= (1 << DPIO_K_SHIFT); in vlv_prepare_pll()
7371 mdiv |= (DPIO_POST_DIV_HDMIDP << DPIO_POST_DIV_SHIFT); in vlv_prepare_pll()
7372 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW3(pipe), mdiv); in vlv_prepare_pll()
7374 mdiv |= DPIO_ENABLE_CALIBRATION; in vlv_prepare_pll()
7375 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW3(pipe), mdiv); in vlv_prepare_pll()
8010 u32 mdiv; in vlv_crtc_clock_get() local
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