Home
last modified time | relevance | path

Searched refs:mailbox (Results 1 – 115 of 115) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/mellanox/mlx4/
Dfw_qos.c87 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_PRIO2TC() local
93 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_PRIO2TC()
94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
103 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, in mlx4_SET_PORT_PRIO2TC()
106 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_SET_PORT_PRIO2TC()
114 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_SCHEDULER() local
120 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_SCHEDULER()
121 if (IS_ERR(mailbox)) in mlx4_SET_PORT_SCHEDULER()
[all …]
Dcq.c140 static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_CQ() argument
143 return mlx4_cmd(dev, mailbox->dma, cq_num, 0, in mlx4_SW2HW_CQ()
148 static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_MODIFY_CQ() argument
151 return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ, in mlx4_MODIFY_CQ()
155 static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_CQ() argument
158 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, in mlx4_HW2SW_CQ()
159 cq_num, mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ, in mlx4_HW2SW_CQ()
166 struct mlx4_cmd_mailbox *mailbox; in mlx4_cq_modify() local
170 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_cq_modify()
171 if (IS_ERR(mailbox)) in mlx4_cq_modify()
[all …]
Dsrq.c67 static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_SRQ() argument
70 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, in mlx4_SW2HW_SRQ()
75 static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_SRQ() argument
78 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, in mlx4_HW2SW_SRQ()
79 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ, in mlx4_HW2SW_SRQ()
89 static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_QUERY_SRQ() argument
92 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ, in mlx4_QUERY_SRQ()
169 struct mlx4_cmd_mailbox *mailbox; in mlx4_srq_alloc() local
184 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_srq_alloc()
185 if (IS_ERR(mailbox)) { in mlx4_srq_alloc()
[all …]
Dmcg.c55 struct mlx4_cmd_mailbox *mailbox, in mlx4_QP_FLOW_STEERING_ATTACH() argument
62 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, size, 0, in mlx4_QP_FLOW_STEERING_ATTACH()
84 struct mlx4_cmd_mailbox *mailbox) in mlx4_READ_ENTRY() argument
86 return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, in mlx4_READ_ENTRY()
91 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_ENTRY() argument
93 return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, in mlx4_WRITE_ENTRY()
98 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_PROMISC() argument
103 return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, in mlx4_WRITE_PROMISC()
108 static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_GID_HASH() argument
114 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, in mlx4_GID_HASH()
[all …]
Dfw.c170 struct mlx4_cmd_mailbox *mailbox; in mlx4_MOD_STAT_CFG() local
179 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_MOD_STAT_CFG()
180 if (IS_ERR(mailbox)) in mlx4_MOD_STAT_CFG()
181 return PTR_ERR(mailbox); in mlx4_MOD_STAT_CFG()
182 inbox = mailbox->buf; in mlx4_MOD_STAT_CFG()
187 err = mlx4_cmd(dev, mailbox->dma, 0, 0, MLX4_CMD_MOD_STAT_CFG, in mlx4_MOD_STAT_CFG()
190 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_MOD_STAT_CFG()
196 struct mlx4_cmd_mailbox *mailbox; in mlx4_QUERY_FUNC() local
211 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_QUERY_FUNC()
212 if (IS_ERR(mailbox)) in mlx4_QUERY_FUNC()
[all …]
Dport.c122 struct mlx4_cmd_mailbox *mailbox; in mlx4_set_port_mac_table() local
126 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_set_port_mac_table()
127 if (IS_ERR(mailbox)) in mlx4_set_port_mac_table()
128 return PTR_ERR(mailbox); in mlx4_set_port_mac_table()
130 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); in mlx4_set_port_mac_table()
134 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, in mlx4_set_port_mac_table()
138 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_set_port_mac_table()
339 struct mlx4_cmd_mailbox *mailbox; in mlx4_set_port_vlan_table() local
343 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_set_port_vlan_table()
344 if (IS_ERR(mailbox)) in mlx4_set_port_vlan_table()
[all …]
Den_port.c46 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_VLAN_FLTR() local
54 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_VLAN_FLTR()
55 if (IS_ERR(mailbox)) in mlx4_SET_VLAN_FLTR()
56 return PTR_ERR(mailbox); in mlx4_SET_VLAN_FLTR()
58 filter = mailbox->buf; in mlx4_SET_VLAN_FLTR()
66 err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR, in mlx4_SET_VLAN_FLTR()
68 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_SET_VLAN_FLTR()
77 struct mlx4_cmd_mailbox *mailbox; in mlx4_en_QUERY_PORT() local
80 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); in mlx4_en_QUERY_PORT()
81 if (IS_ERR(mailbox)) in mlx4_en_QUERY_PORT()
[all …]
Dmr.c279 static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_MPT() argument
282 return mlx4_cmd(dev, mailbox->dma, mpt_index, in mlx4_SW2HW_MPT()
287 static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_MPT() argument
290 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, in mlx4_HW2SW_MPT()
291 !mailbox, MLX4_CMD_HW2SW_MPT, in mlx4_HW2SW_MPT()
301 struct mlx4_cmd_mailbox *mailbox = NULL; in mlx4_mr_hw_get_mpt() local
320 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_mr_hw_get_mpt()
321 if (IS_ERR(mailbox)) in mlx4_mr_hw_get_mpt()
322 return PTR_ERR(mailbox); in mlx4_mr_hw_get_mpt()
324 err = mlx4_cmd_box(dev, 0, mailbox->dma, key, in mlx4_mr_hw_get_mpt()
[all …]
Dqp.c134 struct mlx4_cmd_mailbox *mailbox; in __mlx4_qp_modify() local
159 mailbox = mlx4_alloc_cmd_mailbox(dev); in __mlx4_qp_modify()
160 if (IS_ERR(mailbox)) in __mlx4_qp_modify()
161 return PTR_ERR(mailbox); in __mlx4_qp_modify()
170 *(__be32 *) mailbox->buf = cpu_to_be32(optpar); in __mlx4_qp_modify()
171 memcpy(mailbox->buf + 8, context, sizeof *context); in __mlx4_qp_modify()
173 ((struct mlx4_qp_context *) (mailbox->buf + 8))->local_qpn = in __mlx4_qp_modify()
176 ret = mlx4_cmd(dev, mailbox->dma, in __mlx4_qp_modify()
198 mlx4_free_cmd_mailbox(dev, mailbox); in __mlx4_qp_modify()
419 struct mlx4_cmd_mailbox *mailbox; in mlx4_update_qp() local
[all …]
Dcmd.c2634 struct mlx4_cmd_mailbox *mailbox; in mlx4_alloc_cmd_mailbox() local
2636 mailbox = kmalloc(sizeof *mailbox, GFP_KERNEL); in mlx4_alloc_cmd_mailbox()
2637 if (!mailbox) in mlx4_alloc_cmd_mailbox()
2640 mailbox->buf = pci_pool_alloc(mlx4_priv(dev)->cmd.pool, GFP_KERNEL, in mlx4_alloc_cmd_mailbox()
2641 &mailbox->dma); in mlx4_alloc_cmd_mailbox()
2642 if (!mailbox->buf) { in mlx4_alloc_cmd_mailbox()
2643 kfree(mailbox); in mlx4_alloc_cmd_mailbox()
2647 memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); in mlx4_alloc_cmd_mailbox()
2649 return mailbox; in mlx4_alloc_cmd_mailbox()
2654 struct mlx4_cmd_mailbox *mailbox) in mlx4_free_cmd_mailbox() argument
[all …]
Deq.c893 static int mlx4_SW2HW_EQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_EQ() argument
896 return mlx4_cmd(dev, mailbox->dma, eq_num, 0, in mlx4_SW2HW_EQ()
956 struct mlx4_cmd_mailbox *mailbox; in mlx4_create_eq() local
984 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_create_eq()
985 if (IS_ERR(mailbox)) in mlx4_create_eq()
987 eq_context = mailbox->buf; in mlx4_create_eq()
1031 err = mlx4_SW2HW_EQ(dev, mailbox, eq->eqn); in mlx4_create_eq()
1038 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_create_eq()
1063 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_create_eq()
Dresource_tracker.c3262 struct mlx4_cmd_mailbox *mailbox; in mlx4_GEN_EQE() local
3294 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_GEN_EQE()
3295 if (IS_ERR(mailbox)) { in mlx4_GEN_EQE()
3296 err = PTR_ERR(mailbox); in mlx4_GEN_EQE()
3305 memcpy(mailbox->buf, (u8 *) eqe, 28); in mlx4_GEN_EQE()
3309 err = mlx4_cmd(dev, mailbox->dma, in_modifier, 0, in mlx4_GEN_EQE()
3315 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_GEN_EQE()
5046 struct mlx4_cmd_mailbox *mailbox; in mlx4_vf_immed_vlan_work_handler() local
5081 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_vf_immed_vlan_work_handler()
5082 if (IS_ERR(mailbox)) in mlx4_vf_immed_vlan_work_handler()
[all …]
/linux-4.4.14/drivers/infiniband/hw/mthca/
Dmthca_mcg.c67 struct mthca_mailbox *mailbox; in find_mgm() local
72 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in find_mgm()
73 if (IS_ERR(mailbox)) in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
79 err = mthca_MGID_HASH(dev, mailbox, hash); in find_mgm()
116 mthca_free_mailbox(dev, mailbox); in find_mgm()
123 struct mthca_mailbox *mailbox; in mthca_multicast_attach() local
131 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_multicast_attach()
132 if (IS_ERR(mailbox)) in mthca_multicast_attach()
133 return PTR_ERR(mailbox); in mthca_multicast_attach()
[all …]
Dmthca_cmd.c610 struct mthca_mailbox *mailbox; in mthca_alloc_mailbox() local
612 mailbox = kmalloc(sizeof *mailbox, gfp_mask); in mthca_alloc_mailbox()
613 if (!mailbox) in mthca_alloc_mailbox()
616 mailbox->buf = pci_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma); in mthca_alloc_mailbox()
617 if (!mailbox->buf) { in mthca_alloc_mailbox()
618 kfree(mailbox); in mthca_alloc_mailbox()
622 return mailbox; in mthca_alloc_mailbox()
625 void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox) in mthca_free_mailbox() argument
627 if (!mailbox) in mthca_free_mailbox()
630 pci_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma); in mthca_free_mailbox()
[all …]
Dmthca_cmd.h253 void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox);
283 int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
285 int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
287 int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
292 int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
294 int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
296 int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
298 int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
301 int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
303 int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
[all …]
Dmthca_srq.c202 struct mthca_mailbox *mailbox; in mthca_alloc_srq() local
248 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_alloc_srq()
249 if (IS_ERR(mailbox)) { in mthca_alloc_srq()
250 err = PTR_ERR(mailbox); in mthca_alloc_srq()
264 mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf); in mthca_alloc_srq()
266 mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf); in mthca_alloc_srq()
268 err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn); in mthca_alloc_srq()
284 mthca_free_mailbox(dev, mailbox); in mthca_alloc_srq()
295 err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn); in mthca_alloc_srq()
304 mthca_free_mailbox(dev, mailbox); in mthca_alloc_srq()
[all …]
Dmthca_mr.c257 struct mthca_mailbox *mailbox; in __mthca_write_mtt() local
262 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in __mthca_write_mtt()
263 if (IS_ERR(mailbox)) in __mthca_write_mtt()
264 return PTR_ERR(mailbox); in __mthca_write_mtt()
265 mtt_entry = mailbox->buf; in __mthca_write_mtt()
283 err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1); in __mthca_write_mtt()
295 mthca_free_mailbox(dev, mailbox); in __mthca_write_mtt()
432 struct mthca_mailbox *mailbox; in mthca_mr_alloc() local
452 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_mr_alloc()
453 if (IS_ERR(mailbox)) { in mthca_mr_alloc()
[all …]
Dmthca_eq.c473 struct mthca_mailbox *mailbox; in mthca_create_eq() local
494 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_create_eq()
495 if (IS_ERR(mailbox)) in mthca_create_eq()
497 eq_context = mailbox->buf; in mthca_create_eq()
545 err = mthca_SW2HW_EQ(dev, mailbox, eq->eqn); in mthca_create_eq()
552 mthca_free_mailbox(dev, mailbox); in mthca_create_eq()
578 mthca_free_mailbox(dev, mailbox); in mthca_create_eq()
591 struct mthca_mailbox *mailbox; in mthca_free_eq() local
597 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_free_eq()
598 if (IS_ERR(mailbox)) in mthca_free_eq()
[all …]
Dmthca_cq.c780 struct mthca_mailbox *mailbox; in mthca_init_cq() local
813 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_init_cq()
814 if (IS_ERR(mailbox)) in mthca_init_cq()
817 cq_context = mailbox->buf; in mthca_init_cq()
850 err = mthca_SW2HW_CQ(dev, mailbox, cq->cqn); in mthca_init_cq()
867 mthca_free_mailbox(dev, mailbox); in mthca_init_cq()
876 mthca_free_mailbox(dev, mailbox); in mthca_init_cq()
909 struct mthca_mailbox *mailbox; in mthca_free_cq() local
912 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_free_cq()
913 if (IS_ERR(mailbox)) { in mthca_free_cq()
[all …]
Dmthca_qp.c430 struct mthca_mailbox *mailbox = NULL; in mthca_query_qp() local
442 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_query_qp()
443 if (IS_ERR(mailbox)) { in mthca_query_qp()
444 err = PTR_ERR(mailbox); in mthca_query_qp()
448 err = mthca_QUERY_QP(dev, qp->qpn, 0, mailbox); in mthca_query_qp()
454 qp_param = mailbox->buf; in mthca_query_qp()
508 mthca_free_mailbox(dev, mailbox); in mthca_query_qp()
549 struct mthca_mailbox *mailbox; in __mthca_modify_qp() local
555 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in __mthca_modify_qp()
556 if (IS_ERR(mailbox)) { in __mthca_modify_qp()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/mailbox/
Domap-mailbox.txt4 The OMAP mailbox hardware facilitates communication between different processors
5 using a queued mailbox interrupt mechanism. The IP block is external to the
10 Each mailbox IP block has a certain number of h/w fifo queues and output
36 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
37 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
38 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
40 - reg: Contains the mailbox register address range (base
42 - interrupts: Contains the interrupt information for the mailbox
45 - ti,hwmods: Name of the hwmod associated with the mailbox
46 - #mbox-cells: Common mailbox binding property to identify the number
[all …]
Daltera-mailbox.txt5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
17 mbox_tx: mailbox@0x100 {
18 compatible = "altr,mailbox-1.0";
25 mbox_rx: mailbox@0x200 {
26 compatible = "altr,mailbox-1.0";
36 Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
37 of the mboxes property should contain a phandle to the mailbox controller
Dmailbox.txt4 assign appropriate mailbox channel to client drivers.
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
31 mboxes = <&mailbox 0 &mailbox 1>;
Dbrcm,bcm2835-mbox.txt1 Broadcom BCM2835 VideoCore mailbox IPC
9 - #mbox-cells: Specifies the number of cells needed to encode a mailbox
11 mailbox channel implemented by the device.
15 mailbox: mailbox@7e00b800 {
24 mboxes = <&mailbox>;
Dsti-mailbox.txt10 - compatible : Should be "st,stih407-mailbox"
12 - mbox-name : Name of the mailbox
20 - interrupts : Contains the IRQ line for a Rx mailbox
24 mailbox0: mailbox@0 {
25 compatible = "st,stih407-mailbox";
38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
Darm-mhu.txt4 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has
19 - reg: Contains the mailbox register address range (base
28 mhu: mailbox@2b1f0000 {
/linux-4.4.14/drivers/mailbox/
DMakefile3 obj-$(CONFIG_MAILBOX) += mailbox.o
5 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
11 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
15 obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
17 obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
19 obj-$(CONFIG_STI_MBOX) += mailbox-sti.o
DKconfig15 The controller has 3 mailbox channels, the last of which can be
42 Specify the default size of mailbox's kfifo buffers (bytes).
64 Altera mailbox support.
/linux-4.4.14/drivers/net/appletalk/
Dltpc.h20 unsigned char mailbox; member
25 unsigned char mailbox; member
32 unsigned char mailbox; member
38 unsigned char mailbox; member
43 unsigned char mailbox; member
49 unsigned char mailbox; member
Dltpc.c277 unsigned char mailbox; member
332 static unsigned char mailbox[16]; variable
550 qels[0].mailbox = 0; in idle()
575 ltdmacbuf[1] = q->mailbox; in idle()
599 qels[0].mailbox = 0; in idle()
618 if(q->mailbox) { in idle()
622 mailbox[ 0x0f & ltdmabuf[0] ] = ltdmabuf[1]; in idle()
659 qels[i].mailbox = i; /* this should be initted rather */ in do_write()
662 ret = mailbox[i]; in do_write()
683 qels[i].mailbox = i; /* this should be initted rather */ in do_read()
[all …]
/linux-4.4.14/drivers/char/
Dapplicom.c362 struct mailbox tmpmailbox; in ac_write()
368 if (count != sizeof(struct st_ram_io) + sizeof(struct mailbox)) { in ac_write()
372 count, sizeof(struct st_ram_io) + sizeof(struct mailbox)); in ac_write()
382 sizeof(struct mailbox))) in ac_write()
407 for (c = 0; c < sizeof(struct mailbox);) { in ac_write()
410 for (c++; c % 8 && c < sizeof(struct mailbox); c++) { in ac_write()
464 for (c = 0; c < sizeof(struct mailbox); c++) in ac_write()
480 struct st_ram_io *st_loc, struct mailbox *mailbox) in do_ac_read() argument
483 unsigned char *to = (unsigned char *)mailbox; in do_ac_read()
495 for (c = 0; c < sizeof(struct mailbox); c++) in do_ac_read()
[all …]
Dapplicom.h33 struct mailbox{ struct
/linux-4.4.14/drivers/crypto/qat/qat_common/
Dadf_admin.c157 void __iomem *mailbox = admin->mailbox_addr; in adf_put_admin_msg_sync() local
163 if (ADF_CSR_RD(mailbox, mb_offset) == 1) { in adf_put_admin_msg_sync()
169 ADF_CSR_WR(mailbox, mb_offset, 1); in adf_put_admin_msg_sync()
173 if (ADF_CSR_RD(mailbox, mb_offset) == 0) { in adf_put_admin_msg_sync()
237 void __iomem *mailbox = csr + ADF_DH895XCC_MAILBOX_BASE_OFFSET; in adf_init_admin_comms() local
267 admin->mailbox_addr = mailbox; in adf_init_admin_comms()
/linux-4.4.14/Documentation/devicetree/bindings/arm/bcm/
Draspberrypi,bcm2835-firmware.txt7 (See: ../mailbox/mailbox.txt for more information)
13 mboxes = <&mailbox>;
/linux-4.4.14/Documentation/devicetree/bindings/i2c/
Di2c-xgene-slimpro.txt3 An I2C controller accessed over the "SLIMpro" mailbox.
8 - mboxes : use the label reference for the mailbox as the first parameter.
14 mboxes = <&mailbox 0>;
/linux-4.4.14/Documentation/ABI/testing/
Dsysfs-platform-at916 Value representing the can_id of mailbox 0.
12 contents of mailbox 0 may be send under certain
16 mailbox and load it with an unused identifier.
/linux-4.4.14/Documentation/video4linux/cx2341x/
Dfw-calling.txt6 The preferred calling convention is known as the firmware mailbox. The
36 0 I Driver is using this mailbox.
52 will reset that mailbox.
54 To make an API call, the driver iterates over each mailbox looking for the
62 time set in the timeout register, the firmware will reset that mailbox.
66 firmware which notification mailbox to use. The firmware signals the host via
Dfw-encoder-api.txt489 bit 27 of the interrupt mask. Uses mailbox 10.
503 bit 27 or 18 of the interrupt mask. Uses mailbox 9.
588 Mailbox slot, -1 if no mailbox required.
Dfw-decoder-api.txt248 Mailbox slot, -1 if no mailbox required.
/linux-4.4.14/arch/mips/pci/
Dpci-vr41xx.c91 .mailbox = &pci_mailbox,
115 struct pci_mailbox_address *mailbox; in vr41xx_pciu_init() local
237 if (setup->mailbox != NULL) { in vr41xx_pciu_init()
238 mailbox = setup->mailbox; in vr41xx_pciu_init()
239 val = MBADD(mailbox->base_address) | TYPE_32BITSPACE | in vr41xx_pciu_init()
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Darm,scpi.txt11 - mboxes: List of phandle and mailbox channel specifiers
15 processors using these mailboxes for IPC, one for each mailbox
19 See Documentation/devicetree/bindings/mailbox/mailbox.txt
20 for more details about the generic mailbox controller and
116 mailbox: mailbox0@40000000 {
123 mboxes = <&mailbox 0 &mailbox 1>;
/linux-4.4.14/drivers/infiniband/hw/mlx4/
Dmain.c161 struct mlx4_cmd_mailbox *mailbox; in mlx4_ib_update_gids() local
167 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_ib_update_gids()
168 if (IS_ERR(mailbox)) in mlx4_ib_update_gids()
171 gid_tbl = mailbox->buf; in mlx4_ib_update_gids()
176 err = mlx4_cmd(dev, mailbox->dma, in mlx4_ib_update_gids()
181 err += mlx4_cmd(dev, mailbox->dma, in mlx4_ib_update_gids()
186 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_ib_update_gids()
619 struct mlx4_cmd_mailbox *mailbox; in eth_link_query_port() local
623 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev); in eth_link_query_port()
624 if (IS_ERR(mailbox)) in eth_link_query_port()
[all …]
/linux-4.4.14/sound/soc/intel/common/
Dsst-dsp.c363 sst->mailbox.in_base = sst->addr.lpe + inbox_offset; in sst_dsp_mailbox_init()
364 sst->mailbox.out_base = sst->addr.lpe + outbox_offset; in sst_dsp_mailbox_init()
365 sst->mailbox.in_size = inbox_size; in sst_dsp_mailbox_init()
366 sst->mailbox.out_size = outbox_size; in sst_dsp_mailbox_init()
377 memcpy_toio(sst->mailbox.out_base, message, bytes); in sst_dsp_outbox_write()
390 memcpy_fromio(message, sst->mailbox.out_base, bytes); in sst_dsp_outbox_read()
403 memcpy_toio(sst->mailbox.in_base, message, bytes); in sst_dsp_inbox_write()
416 memcpy_fromio(message, sst->mailbox.in_base, bytes); in sst_dsp_inbox_read()
Dsst-dsp-priv.h285 struct sst_mailbox mailbox; member
/linux-4.4.14/arch/arm/boot/dts/
Ddra7.dtsi511 mailbox1: mailbox@4a0f4000 {
512 compatible = "ti,omap4-mailbox";
524 mailbox2: mailbox@4883a000 {
525 compatible = "ti,omap4-mailbox";
538 mailbox3: mailbox@4883c000 {
539 compatible = "ti,omap4-mailbox";
552 mailbox4: mailbox@4883e000 {
553 compatible = "ti,omap4-mailbox";
566 mailbox5: mailbox@48840000 {
567 compatible = "ti,omap4-mailbox";
[all …]
Domap2420.dtsi172 mailbox: mailbox@48094000 { label
173 compatible = "ti,omap2-mailbox";
177 ti,hwmods = "mailbox";
Domap2430.dtsi260 mailbox: mailbox@48094000 { label
261 compatible = "ti,omap2-mailbox";
264 ti,hwmods = "mailbox";
Dbcm2835-rpi.dtsi21 mboxes = <&mailbox>;
Ddm816x.dtsi216 mailbox: mailbox@480c8000 { label
217 compatible = "ti,omap4-mailbox";
220 ti,hwmods = "mailbox";
Dbcm2835.dtsi81 mailbox: mailbox@7e00b800 { label
Dam3517.dtsi81 &mailbox {
Dam33xx.dtsi161 mboxes = <&mailbox &mbox_wkupm3>;
393 mailbox: mailbox@480C8000 { label
394 compatible = "ti,omap4-mailbox";
397 ti,hwmods = "mailbox";
Domap3.dtsi347 mailbox: mailbox@48094000 { label
348 compatible = "ti,omap3-mailbox";
349 ti,hwmods = "mailbox";
Dam4372.dtsi171 mboxes = <&mailbox &mbox_wkupm3>;
243 mailbox: mailbox@480C8000 { label
244 compatible = "ti,omap4-mailbox";
247 ti,hwmods = "mailbox";
Domap4.dtsi715 mailbox: mailbox@4a0f4000 { label
716 compatible = "ti,omap4-mailbox";
719 ti,hwmods = "mailbox";
Domap5.dtsi705 mailbox: mailbox@4a0f4000 { label
706 compatible = "ti,omap4-mailbox";
709 ti,hwmods = "mailbox";
/linux-4.4.14/drivers/irqchip/
Dirq-bcm2836.c206 unsigned int mailbox = 0; in bcm2836_arm_irqchip_cpu_notify() local
209 bcm2836_arm_irqchip_unmask_per_cpu_irq(int_reg, mailbox, cpu); in bcm2836_arm_irqchip_cpu_notify()
211 bcm2836_arm_irqchip_mask_per_cpu_irq(int_reg, mailbox, cpu); in bcm2836_arm_irqchip_cpu_notify()
/linux-4.4.14/sound/soc/intel/atom/sst/
Dsst_pci.c82 ctx->mailbox = pcim_iomap(pci, 2, pci_resource_len(pci, 2)); in sst_platform_get_resources()
83 if (!ctx->mailbox) { in sst_platform_get_resources()
87 dev_dbg(ctx->dev, "SRAM Ptr %p\n", ctx->mailbox); in sst_platform_get_resources()
Dsst_drv_interface.c280 ((void *)(ctx->mailbox + ctx->tstamp) in sst_cdev_ack()
288 addr = ((void *)(ctx->mailbox + ctx->tstamp)) + in sst_cdev_ack()
375 ((void *)(ctx->mailbox + ctx->tstamp) in sst_cdev_tstamp()
563 ((void *)(ctx->mailbox + ctx->tstamp) in sst_read_timestamp()
Dsst_acpi.c194 ctx->mailbox = devm_ioremap_nocache(ctx->dev, ctx->mailbox_add, in sst_platform_get_resources()
196 if (!ctx->mailbox) { in sst_platform_get_resources()
Dsst.c101 drv->mailbox + drv->mailbox_recv_offset, size); in intel_sst_interrupt_mrfld()
486 memcpy32_fromio(fw_save->sram, ctx->mailbox, SST_MAILBOX_SIZE); in intel_sst_suspend()
522 memcpy32_toio(ctx->mailbox, fw_save->sram, SST_MAILBOX_SIZE); in intel_sst_resume()
Dsst_ipc.c174 memcpy_toio(sst_drv_ctx->mailbox + SST_MAILBOX_SEND, in sst_post_message_mrfld()
Dsst.h389 void __iomem *mailbox; member
/linux-4.4.14/drivers/media/pci/cx88/
Dcx88-blackbird.c322 memory_read(dev->core, dev->mailbox - 4, &value); in blackbird_mbox_func()
328 memory_read(dev->core, dev->mailbox, &flag); in blackbird_mbox_func()
335 memory_write(dev->core, dev->mailbox, flag); in blackbird_mbox_func()
338 memory_write(dev->core, dev->mailbox + 1, command); /* command code */ in blackbird_mbox_func()
339 memory_write(dev->core, dev->mailbox + 3, IVTV_API_STD_TIMEOUT); /* timeout */ in blackbird_mbox_func()
341 memory_write(dev->core, dev->mailbox + 4 + i, data[i]); in blackbird_mbox_func()
345 memory_write(dev->core, dev->mailbox + 4 + i, 0); in blackbird_mbox_func()
348 memory_write(dev->core, dev->mailbox, flag); in blackbird_mbox_func()
353 memory_read(dev->core, dev->mailbox, &flag); in blackbird_mbox_func()
365 memory_read(dev->core, dev->mailbox + 4 + i, data + i); in blackbird_mbox_func()
[all …]
Dcx88.h567 u32 mailbox; member
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx5/core/
Dcmd.c915 struct mlx5_cmd_mailbox *mailbox; in alloc_cmd_box() local
917 mailbox = kmalloc(sizeof(*mailbox), flags); in alloc_cmd_box()
918 if (!mailbox) in alloc_cmd_box()
921 mailbox->buf = pci_pool_alloc(dev->cmd.pool, flags, in alloc_cmd_box()
922 &mailbox->dma); in alloc_cmd_box()
923 if (!mailbox->buf) { in alloc_cmd_box()
925 kfree(mailbox); in alloc_cmd_box()
928 memset(mailbox->buf, 0, sizeof(struct mlx5_cmd_prot_block)); in alloc_cmd_box()
929 mailbox->next = NULL; in alloc_cmd_box()
931 return mailbox; in alloc_cmd_box()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dhi6220-clock.txt30 - mboxes: use the label reference for the mailbox as the first parameter, the
45 mboxes = <&mailbox 1>;
/linux-4.4.14/drivers/scsi/
Dqla1280.c3419 uint16_t mailbox[MAILBOX_REGISTER_COUNT]; in qla1280_isr() local
3431 mailbox[5] = RD_REG_WORD(&reg->mailbox5); in qla1280_isr()
3435 mailbox[0] = RD_REG_WORD_dmasync(&reg->semaphore); in qla1280_isr()
3437 if (mailbox[0] & BIT_0) { in qla1280_isr()
3441 wptr = &mailbox[0]; in qla1280_isr()
3445 if (mailbox[0] != MBA_SCSI_COMPLETION) { in qla1280_isr()
3460 mailbox[0]); in qla1280_isr()
3463 switch (mailbox[0]) { in qla1280_isr()
3470 index = mailbox[2] << 16 | mailbox[1]; in qla1280_isr()
3500 index = mailbox[6] & BIT_0; in qla1280_isr()
[all …]
Daha1542.h53 struct mailbox { struct
Daha1542.c61 struct mailbox mb[2 * AHA1542_MAILBOXES];
246 struct mailbox *mb = aha1542->mb; in aha1542_interrupt()
379 struct mailbox *mb = aha1542->mb; in aha1542_queuecommand()
494 struct mailbox *mb = aha1542->mb; in setup_mailboxes()
797 struct mailbox *mb = aha1542->mb; in aha1542_dev_reset()
Dpmcraid.h476 unsigned long mailbox; member
685 void __iomem *mailbox; /* Iomapped mailbox register */ member
Dipr.c108 .mailbox = 0x0042C,
133 .mailbox = 0x0052C,
158 .mailbox = 0x00044,
8300 unsigned long mailbox; in ipr_get_unit_check_buffer() local
8306 mailbox = readl(ioa_cfg->ioa_mailbox); in ipr_get_unit_check_buffer()
8308 if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) { in ipr_get_unit_check_buffer()
8314 rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt, in ipr_get_unit_check_buffer()
10051 ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs; in ipr_probe_ioa()
Dwd7000.c235 typedef volatile struct mailbox { struct
Dpmcraid.c113 .mailbox = 0x7FC30,
5226 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; in pmcraid_init_instance()
Dipr.h1400 u32 mailbox; member
/linux-4.4.14/arch/mips/include/asm/vr41xx/
Dpci.h74 struct pci_mailbox_address *mailbox; member
/linux-4.4.14/drivers/media/pci/ivtv/
DMakefile4 ivtv-mailbox.o ivtv-queue.o ivtv-streams.o ivtv-udma.o \
/linux-4.4.14/drivers/media/pci/cx18/
DMakefile3 cx18-mailbox.o cx18-vbi.o cx18-audio.o cx18-video.o cx18-irq.o \
/linux-4.4.14/drivers/scsi/qla4xxx/
Dql4_dbg.c46 (uint8_t) offsetof(struct isp_reg, mailbox[i]), i, in qla4xxx_dump_registers()
47 readw(&ha->reg->mailbox[i])); in qla4xxx_dump_registers()
Dql4_init.c704 writel(jiffies, &ha->reg->mailbox[7]); in qla4xxx_start_firmware_from_flash()
709 writel(2, &ha->reg->mailbox[6]); in qla4xxx_start_firmware_from_flash()
710 readl(&ha->reg->mailbox[6]); in qla4xxx_start_firmware_from_flash()
726 mbox_status = readw(&ha->reg->mailbox[0]); in qla4xxx_start_firmware_from_flash()
820 mbox_status = readw(&ha->reg->mailbox[0]); in qla4xxx_start_firmware()
Dql4_isr.c672 mailbox_out = &ha->reg->mailbox[0]; in qla4xxx_isr_decode_mailbox()
1086 readl(&ha->reg->mailbox[0])); in qla4xxx_interrupt_service_routine()
Dql4_mbx.c22 writel(mbx_cmd[i], &ha->reg->mailbox[i]); in qla4xxx_queue_mbox_cmd()
25 writel(mbx_cmd[0], &ha->reg->mailbox[0]); in qla4xxx_queue_mbox_cmd()
26 readl(&ha->reg->mailbox[0]); in qla4xxx_queue_mbox_cmd()
Dql4_fw.h105 __le32 mailbox[MBOX_REG_COUNT]; member
/linux-4.4.14/drivers/tty/
Dcyclades.c121 u32 mailbox; member
3423 const char *name, const u32 mailbox, void __iomem *base, in __cyz_load_fw() argument
3464 if (c->mailbox == mailbox && c->function == 0) /* 0 is normal */ in __cyz_load_fw()
3480 if (c->mailbox == mailbox && c->function == 0) in __cyz_load_fw()
3507 u32 mailbox, status, nchan; in cyz_load_fw() local
3536 mailbox = readl(&ctl_addr->mail_box_0); in cyz_load_fw()
3538 if (mailbox == 0 || __cyz_fpga_loaded(ctl_addr)) { in cyz_load_fw()
3548 if (mailbox != 0) { in cyz_load_fw()
3550 retval = __cyz_load_fw(fw, "Cyclom-Z", mailbox, NULL, in cyz_load_fw()
3570 if (mailbox != 0) { in cyz_load_fw()
[all …]
/linux-4.4.14/arch/arm64/boot/dts/arm/
Djuno-base.dtsi20 mailbox: mhu@2b1f0000 { label
80 mboxes = <&mailbox 1>;
/linux-4.4.14/Documentation/target/
Dtcmu-design.txt93 (mailbox); a lockless producer/consumer circular buffer for commands
113 The mailbox is always at the start of the shared memory region, and
122 of the memory region, to account for the mailbox size.
133 mailbox.cmd_head by the size of the command, modulo cmdr_size, and
135 completed, userspace updates mailbox.cmd_tail in the same way and
162 mailbox.cmd_tail by entry.hdr.length (mod cmdr_size) and signals the
/linux-4.4.14/Documentation/
Dmailbox.txt103 /* ASync mailbox is listed second in 'mboxes' property */
110 /* Sync mailbox is listed first in 'mboxes' property */
Dbus-virt-phys-mapping.txt88 * this is the hardware "mailbox" we use to communicate with
91 struct mailbox {
D00-INDEX302 mailbox.txt
303 - How to write drivers for the common mailbox framework (IPC).
Drpmsg.txt40 physical memory, gpio banks, dma controllers, i2c bus, gptimers, mailbox
DDMA-API-HOWTO.txt331 - SCSI adapter mailbox command data structures.
/linux-4.4.14/Documentation/filesystems/
Dspufs.txt71 The first SPU to CPU communication mailbox. This file is read-only and
85 The second SPU to CPU communication mailbox. This file is similar to
86 the first mailbox file, but can be read in blocking I/O mode, and the
98 block until the SPU writes to its interrupt mailbox channel.
108 The CPU to SPU communation mailbox. It is write-only and can be written
109 in units of 32 bits. If the mailbox is full, write() will block and
119 reads from its PPE mailbox channel. When data has been read success-
Dmandatory-locking.txt37 troublesome) is access to a user's mailbox. The mail user agent and the mail
38 transfer agent must guard against updating the mailbox at the same time, and
39 prevent reading the mailbox while it is being updated.
/linux-4.4.14/include/linux/mlx4/
Dcmd.h303 void mlx4_free_cmd_mailbox(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox);
/linux-4.4.14/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_hw.c501 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_poll_process_aen()
843 flush_workqueue(ahw->mailbox->work_q); in qlcnic_83xx_poll_for_mbx_completion()
850 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_issue_cmd()
1016 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_83xx_process_aen()
2346 mbx = adapter->ahw->mailbox; in qlcnic_83xx_handle_aen()
3849 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_flush_mbx_queue()
3870 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_83xx_check_mbx_status()
3898 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_dequeue_mbx_cmd()
3947 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_detach_mailbox_work()
3963 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_enqueue_mbx_cmd()
[all …]
Dqlcnic_sriov_common.c306 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_sriov_post_bc_msg()
1370 struct qlcnic_mailbox *mbx = ahw->mailbox; in __qlcnic_sriov_issue_cmd()
1662 qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox); in qlcnic_sriov_vf_reinit_driver()
1753 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_sriov_vf_handle_context_reset()
1839 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_sriov_vf_idc_need_quiescent_state()
1856 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_sriov_vf_idc_init_reset_state()
Dqlcnic_83xx_init.c617 qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox); in qlcnic_83xx_idc_reattach_driver()
822 struct qlcnic_mailbox *mbx = ahw->mailbox; in qlcnic_83xx_idc_ready_state()
900 struct qlcnic_mailbox *mbx = adapter->ahw->mailbox; in qlcnic_83xx_idc_need_reset_state()
2557 qlcnic_83xx_free_mailbox(ahw->mailbox); in qlcnic_83xx_init()
2558 ahw->mailbox = NULL; in qlcnic_83xx_init()
Dqlcnic.h535 struct qlcnic_mailbox *mailbox; member
Dqlcnic_main.c2763 qlcnic_83xx_free_mailbox(ahw->mailbox); in qlcnic_remove()
/linux-4.4.14/Documentation/rapidio/
Dtsi721.txt14 RapidIO messaging support uses dedicated messaging channels for each mailbox.
/linux-4.4.14/Documentation/devicetree/bindings/usb/
Domap-usb.txt25 mailbox
/linux-4.4.14/drivers/
DMakefile147 obj-$(CONFIG_MAILBOX) += mailbox/
DKconfig145 source "drivers/mailbox/Kconfig"
/linux-4.4.14/scripts/
Dget_maintainer.pl2247 my $mailbox = "(?:$addr_spec|$phrase$route_addr)";
2249 my $group = "$phrase:$rfc822_lwsp*(?:$mailbox(?:,\\s*$mailbox)*)?;\\s*";
2250 my $address = "(?:$mailbox|$group)";
/linux-4.4.14/Documentation/devicetree/bindings/phy/
Dti-phy.txt7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
/linux-4.4.14/drivers/phy/
DKconfig127 the mailbox. The mailbox is present only in omap4 and the register to
/linux-4.4.14/drivers/scsi/qla2xxx/
Dqla_target.c5411 uint16_t *mailbox) in qlt_async_event() argument
5454 le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), in qlt_async_event()
5455 le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); in qlt_async_event()
5471 le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), in qlt_async_event()
5472 le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); in qlt_async_event()
5480 le16_to_cpu(mailbox[0]), le16_to_cpu(mailbox[1]), in qlt_async_event()
5481 le16_to_cpu(mailbox[2]), le16_to_cpu(mailbox[3])); in qlt_async_event()
5483 login_code = le16_to_cpu(mailbox[2]); in qlt_async_event()
/linux-4.4.14/Documentation/scsi/
DChangeLog.megaraid439 i. When copying the mailbox packets, copy only first 14 bytes (for 32-bit
456 iv. In megaraid_mbox_product_info, clear the mailbox contents completely
469 addresses in application mailbox and passthru structures.
499 iv. Remove yield() while mailbox handshake in synchronous commands
DChangeLog.lpfc209 mailbox command to support HBAs with 256 bytes of SLIM.
254 * Defined default mailbox completion routine and removed code in
265 * Fixed memory leaks in mailbox error paths.
676 * Fix for timeout of READ_LA or READ_SPARAM mailbox command
1828 * Removed memory pool for mailbox buffers and use kmalloc/kfree
DChangeLog.1992-19971087 * aha1542.c: Reset mailbox status after a bus device reset.
/linux-4.4.14/sound/pci/mixart/
Dmixart.c1208 …u32 mailbox = 100 * readl_be( MIXART_MEM( chip->mgr, MIXART_PSEUDOREG_PERF_MAILBX_LOAD_OFFSET)) … in snd_mixart_proc_read() local
1213 snd_iprintf(buffer, "\tmailbox : %d\n", mailbox); in snd_mixart_proc_read()
/linux-4.4.14/Documentation/development-process/
D2.Process399 mailbox. One must be able to ignore the stream for sustained periods of
/linux-4.4.14/drivers/net/wan/
Dfarsync.c301 u16 mailbox[4]; /* Diagnostics mailbox. Not used */ member
/linux-4.4.14/drivers/i2c/busses/
DKconfig1175 to SLIMpro (On chip coprocessor) mailbox mechanism.
/linux-4.4.14/
DMAINTAINERS584 F: drivers/mailbox/mailbox-altera.c
6674 F: drivers/mailbox/