| /linux-4.4.14/drivers/net/wireless/iwlwifi/dvm/ |
| H A D | led.c | 71 iwl_write32(priv->trans, CSR_LED_REG, CSR_LED_REG_TURN_ON); iwlagn_led_enable()
109 iwl_write32(priv->trans, CSR_LED_REG, iwl_send_led_cmd()
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| H A D | tt.c | 178 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR, iwl_tt_check_exit_ct_kill()
182 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET, iwl_tt_check_exit_ct_kill()
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| H A D | devices.c | 508 iwl_write32(priv->trans, CSR_GP_DRIVER_REG, iwl6000_nic_config()
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| H A D | rx.c | 581 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET, iwlagn_rx_card_state_notif()
588 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR, iwlagn_rx_card_state_notif()
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| H A D | main.c | 348 iwl_write32(priv->trans, HBUS_TARG_MEM_RADDR, ptr); iwl_print_cont_event_trace()
596 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR, iwl_rf_kill_ct_config()
1632 iwl_write32(trans, HBUS_TARG_MEM_RADDR, ptr); iwl_print_event_log()
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| H A D | mac80211.c | 393 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_SET, iwlagn_mac_suspend()
479 iwl_write32(priv->trans, CSR_UCODE_DRV_GP1_CLR, iwlagn_mac_resume()
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| /linux-4.4.14/drivers/net/wireless/iwlwifi/mvm/ |
| H A D | led.c | 72 iwl_write32(mvm->trans, CSR_LED_REG, CSR_LED_REG_TURN_ON); iwl_mvm_led_enable()
78 iwl_write32(mvm->trans, CSR_LED_REG, CSR_LED_REG_TURN_OFF); iwl_mvm_led_disable()
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| /linux-4.4.14/drivers/net/wireless/iwlwifi/ |
| H A D | iwl-io.c | 46 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val) iwl_write32() function
51 IWL_EXPORT_SYMBOL(iwl_write32); variable
98 iwl_write32(trans, reg, value); iwl_write_direct32()
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| H A D | iwl-eeprom-read.c | 200 iwl_write32(trans, CSR_GP_CNTRL, iwl_init_otp_access()
236 iwl_write32(trans, CSR_EEPROM_REG, iwl_read_otp_word()
403 iwl_write32(trans, CSR_EEPROM_GP, iwl_read_eeprom()
431 iwl_write32(trans, CSR_EEPROM_REG, iwl_read_eeprom()
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| H A D | iwl-io.h | 36 void iwl_write32(struct iwl_trans *trans, u32 ofs, u32 val);
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| H A D | iwl-csr.h | 75 * Use iwl_write32() and iwl_read32() family to access these registers;
96 /* 2nd byte of CSR_INT_COALESCING, not accessible via iwl_write32()! */
438 * Use iwl_write32()/iwl_read32() family to access these registers. The MAC HW
470 * Do not use iwl_write32()/iwl_read32() family to access these registers;
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| /linux-4.4.14/drivers/net/wireless/iwlwifi/pcie/ |
| H A D | internal.h | 462 iwl_write32(trans, CSR_INT_MASK, 0x00000000); iwl_disable_interrupts()
466 iwl_write32(trans, CSR_INT, 0xffffffff); iwl_disable_interrupts()
467 iwl_write32(trans, CSR_FH_INT_STATUS, 0xffffffff); iwl_disable_interrupts()
478 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); iwl_enable_interrupts()
487 iwl_write32(trans, CSR_INT_MASK, trans_pcie->inta_mask); iwl_enable_rfkill_int()
552 iwl_write32(trans, reg, v); __iwl_trans_pcie_set_bits_mask()
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| H A D | trans.c | 173 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG, iwl_trans_pcie_read_shr()
180 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_DATA_REG, val); iwl_trans_pcie_write_shr()
181 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG, iwl_trans_pcie_write_shr()
893 iwl_write32(trans, addr, val); iwl_pcie_apply_destination()
987 iwl_write32(trans, CSR_RESET, 0); iwl_pcie_load_given_ucode()
1062 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); iwl_trans_pcie_start_fw()
1071 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); iwl_trans_pcie_start_fw()
1072 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, iwl_trans_pcie_start_fw()
1076 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); iwl_trans_pcie_start_fw()
1080 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); iwl_trans_pcie_start_fw()
1081 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); iwl_trans_pcie_start_fw()
1150 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); _iwl_trans_pcie_stop_device()
1336 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); _iwl_trans_pcie_start_hw()
1547 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); iwl_trans_pcie_grab_nic_access()
1604 iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr); iwl_trans_pcie_read_mem()
1622 iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr); iwl_trans_pcie_write_mem()
1624 iwl_write32(trans, HBUS_TARG_MEM_WDAT, iwl_trans_pcie_write_mem()
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| H A D | rx.c | 204 iwl_write32(trans, FH_RSCSR_CHNL0_WPTR, rxq->write_actual); iwl_pcie_rxq_inc_wr_ptr()
1264 iwl_write32(trans, CSR_INT, inta | ~trans_pcie->inta_mask); iwl_pcie_irq_handler()
1367 iwl_write32(trans, CSR_FH_INT_STATUS, iwl_pcie_irq_handler()
1372 iwl_write32(trans, iwl_pcie_irq_handler()
1410 iwl_write32(trans, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK); iwl_pcie_irq_handler()
1515 iwl_write32(trans, CSR_DRAM_INT_TBL_REG, val); iwl_pcie_reset_ict()
1518 iwl_write32(trans, CSR_INT, trans_pcie->inta_mask); iwl_pcie_reset_ict()
1545 iwl_write32(trans, CSR_INT_MASK, 0x00000000); iwl_pcie_isr()
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| H A D | tx.c | 321 iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8)); iwl_pcie_txq_inc_wr_ptr()
750 iwl_write32(trans, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0); iwl_pcie_tx_stop_fh()
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