Lines Matching refs:iwl_write32
173 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG, in iwl_trans_pcie_read_shr()
180 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_DATA_REG, val); in iwl_trans_pcie_write_shr()
181 iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG, in iwl_trans_pcie_write_shr()
893 iwl_write32(trans, addr, val); in iwl_pcie_apply_destination()
987 iwl_write32(trans, CSR_RESET, 0); in iwl_pcie_load_given_ucode()
1062 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_start_fw()
1071 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwl_trans_pcie_start_fw()
1072 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, in iwl_trans_pcie_start_fw()
1076 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_start_fw()
1080 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwl_trans_pcie_start_fw()
1081 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwl_trans_pcie_start_fw()
1150 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); in _iwl_trans_pcie_stop_device()
1336 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); in _iwl_trans_pcie_start_hw()
1547 iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI); in iwl_trans_pcie_grab_nic_access()
1604 iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr); in iwl_trans_pcie_read_mem()
1622 iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr); in iwl_trans_pcie_write_mem()
1624 iwl_write32(trans, HBUS_TARG_MEM_WDAT, in iwl_trans_pcie_write_mem()