| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | tonga_ih.c | 60 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_enable_interrupts() local
62 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in tonga_ih_enable_interrupts()
63 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in tonga_ih_enable_interrupts()
64 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_enable_interrupts()
77 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in tonga_ih_disable_interrupts() local
79 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in tonga_ih_disable_interrupts()
80 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in tonga_ih_disable_interrupts()
81 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in tonga_ih_disable_interrupts()
104 u32 interrupt_cntl, ih_rb_cntl, ih_doorbell_rtpr; in tonga_ih_irq_init() local
128 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_irq_init()
[all …]
|
| D | cz_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_enable_interrupts() local
64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts()
66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cz_ih_disable_interrupts() local
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts()
84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cz_ih_disable_interrupts()
108 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cz_ih_irq_init() local
129 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init()
130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init()
[all …]
|
| D | iceland_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_enable_interrupts() local
64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts()
66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in iceland_ih_disable_interrupts() local
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts()
84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in iceland_ih_disable_interrupts()
108 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in iceland_ih_irq_init() local
129 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init()
130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init()
[all …]
|
| D | cik_ih.c | 61 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_enable_interrupts() local
64 ih_rb_cntl |= IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_enable_interrupts()
66 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_enable_interrupts()
79 u32 ih_rb_cntl = RREG32(mmIH_RB_CNTL); in cik_ih_disable_interrupts() local
82 ih_rb_cntl &= ~IH_RB_CNTL__RB_ENABLE_MASK; in cik_ih_disable_interrupts()
84 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_disable_interrupts()
108 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_ih_irq_init() local
128 ih_rb_cntl = (IH_RB_CNTL__WPTR_OVERFLOW_ENABLE_MASK | in cik_ih_irq_init()
132 ih_rb_cntl |= IH_RB_CNTL__WPTR_WRITEBACK_ENABLE_MASK; in cik_ih_irq_init()
139 WREG32(mmIH_RB_CNTL, ih_rb_cntl); in cik_ih_irq_init()
|
| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | r600.c | 3547 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_enable_interrupts() local
3550 ih_rb_cntl |= IH_RB_ENABLE; in r600_enable_interrupts()
3552 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_enable_interrupts()
3558 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_disable_interrupts() local
3561 ih_rb_cntl &= ~IH_RB_ENABLE; in r600_disable_interrupts()
3563 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_disable_interrupts()
3629 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in r600_irq_init() local
3664 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in r600_irq_init()
3669 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in r600_irq_init()
3675 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_irq_init()
|
| D | si.c | 5910 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_enable_interrupts() local
5913 ih_rb_cntl |= IH_RB_ENABLE; in si_enable_interrupts()
5915 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_enable_interrupts()
5921 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_disable_interrupts() local
5924 ih_rb_cntl &= ~IH_RB_ENABLE; in si_disable_interrupts()
5926 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_disable_interrupts()
5998 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in si_irq_init() local
6030 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in si_irq_init()
6035 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in si_irq_init()
6041 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_irq_init()
|
| D | cik.c | 7260 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_enable_interrupts() local
7263 ih_rb_cntl |= IH_RB_ENABLE; in cik_enable_interrupts()
7265 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_enable_interrupts()
7278 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_disable_interrupts() local
7281 ih_rb_cntl &= ~IH_RB_ENABLE; in cik_disable_interrupts()
7283 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_disable_interrupts()
7384 u32 interrupt_cntl, ih_cntl, ih_rb_cntl; in cik_irq_init() local
7416 ih_rb_cntl = (IH_WPTR_OVERFLOW_ENABLE | in cik_irq_init()
7421 ih_rb_cntl |= IH_WPTR_WRITEBACK_ENABLE; in cik_irq_init()
7427 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_irq_init()
|