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Searched refs:i915_gem_obj_ggtt_offset (Results 1 – 20 of 20) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Di915_gem_fence.c98 val = (uint64_t)((i915_gem_obj_ggtt_offset(obj) + size - 4096) & in i965_write_fence_reg()
100 val |= i915_gem_obj_ggtt_offset(obj) & 0xfffff000; in i965_write_fence_reg()
128 WARN((i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK) || in i915_write_fence_reg()
130 (i915_gem_obj_ggtt_offset(obj) & (size - 1)), in i915_write_fence_reg()
132 i915_gem_obj_ggtt_offset(obj), obj->map_and_fenceable, size); in i915_write_fence_reg()
143 val = i915_gem_obj_ggtt_offset(obj); in i915_write_fence_reg()
166 WARN((i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK) || in i830_write_fence_reg()
168 (i915_gem_obj_ggtt_offset(obj) & (size - 1)), in i830_write_fence_reg()
170 i915_gem_obj_ggtt_offset(obj), size); in i830_write_fence_reg()
175 val = i915_gem_obj_ggtt_offset(obj); in i830_write_fence_reg()
Di915_guc_submission.c423 lrc->ring_lcra = i915_gem_obj_ggtt_offset(obj) + in guc_init_ctx_desc()
430 lrc->ring_begin = i915_gem_obj_ggtt_offset(obj); in guc_init_ctx_desc()
447 i915_gem_obj_ggtt_offset(client->client_obj); in guc_init_ctx_desc()
452 i915_gem_obj_ggtt_offset(client->client_obj); in guc_init_ctx_desc()
455 i915_gem_obj_ggtt_offset(client->client_obj); in guc_init_ctx_desc()
583 reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(rb_obj); in lr_context_update()
848 offset = i915_gem_obj_ggtt_offset(obj) >> PAGE_SHIFT; /* in pages */ in guc_create_log()
947 data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state); in intel_guc_suspend()
972 data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state); in intel_guc_resume()
Di915_gem_tiling.c129 if (i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK) in i915_gem_object_fence_ok()
132 if (i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK) in i915_gem_object_fence_ok()
140 if (i915_gem_obj_ggtt_offset(obj) & (size - 1)) in i915_gem_object_fence_ok()
Dintel_overlay.c200 i915_gem_obj_ggtt_offset(overlay->reg_bo)); in intel_overlay_map_regs()
798 iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_Y, &regs->OBUF_0Y); in intel_overlay_do_put_image()
812 iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_U, &regs->OBUF_0U); in intel_overlay_do_put_image()
813 iowrite32(i915_gem_obj_ggtt_offset(new_bo) + params->offset_V, &regs->OBUF_0V); in intel_overlay_do_put_image()
1414 overlay->flip_addr = i915_gem_obj_ggtt_offset(reg_bo); in intel_setup_overlay()
1492 i915_gem_obj_ggtt_offset(overlay->reg_bo)); in intel_overlay_map_regs_atomic()
1525 error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); in intel_overlay_capture_error_state()
Dintel_ringbuffer.h57 (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
62 (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
Dintel_guc_loader.c170 u32 pgs = i915_gem_obj_ggtt_offset(dev_priv->guc.ctx_pool_obj); in set_guc_init_params()
254 offset = i915_gem_obj_ggtt_offset(fw_obj); in guc_ucode_xfer_dma()
Dintel_fbdev.c245 info->fix.smem_start = dev->mode_config.fb_base + i915_gem_obj_ggtt_offset(obj); in intelfb_create()
249 ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj), in intelfb_create()
274 i915_gem_obj_ggtt_offset(obj), obj); in intelfb_create()
Di915_gem_render_state.c68 so->ggtt_offset = i915_gem_obj_ggtt_offset(so->obj); in render_state_init()
Dintel_ringbuffer.c618 I915_WRITE_START(ring, i915_gem_obj_ggtt_offset(obj)); in init_ring_common()
633 I915_READ_START(ring) == i915_gem_obj_ggtt_offset(obj) && in init_ring_common()
640 I915_READ_START(ring), (unsigned long)i915_gem_obj_ggtt_offset(obj)); in init_ring_common()
697 ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(ring->scratch.obj); in intel_init_pipe_control()
1991 ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(obj); in init_status_page()
2043 i915_gem_obj_ggtt_offset(obj), ringbuf->size); in intel_pin_and_map_ringbuffer_obj()
2778 ring->scratch.gtt_offset = i915_gem_obj_ggtt_offset(obj); in intel_init_render_ring_buffer()
Dintel_sprite.c463 I915_WRITE(SPSURF(pipe, plane), i915_gem_obj_ggtt_offset(obj) + in vlv_update_plane()
604 i915_gem_obj_ggtt_offset(obj) + sprsurf_offset); in ivb_update_plane()
733 i915_gem_obj_ggtt_offset(obj) + dvssurf_offset); in ilk_update_plane()
Dintel_lrc.c275 u32 lrca = i915_gem_obj_ggtt_offset(ctx_obj) + in intel_execlists_ctx_id()
297 uint64_t lrca = i915_gem_obj_ggtt_offset(ctx_obj) + in intel_lr_context_descriptor()
374 reg_state[CTX_RING_BUFFER_START+1] = i915_gem_obj_ggtt_offset(rb_obj); in execlists_update_context()
2309 uint32_t ggtt_offset = i915_gem_obj_ggtt_offset(wa_ctx->obj); in populate_lr_context()
2431 ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(default_ctx_obj) in lrc_setup_hardware_status_page()
Di915_gem_context.c569 intel_ring_emit(ring, i915_gem_obj_ggtt_offset(req->ctx->legacy_hw_ctx.rcs_state) | in mi_set_context()
Di915_gpu_error.c629 reloc_offset = i915_gem_obj_ggtt_offset(src); in i915_error_object_create()
971 if ((error->ccid & PAGE_MASK) == i915_gem_obj_ggtt_offset(obj)) { in i915_gem_record_active_context()
Di915_gem_execbuffer.c309 offset = i915_gem_obj_ggtt_offset(obj); in relocate_entry_gtt()
1548 params->batch_obj_vm_offset = i915_gem_obj_ggtt_offset(batch_obj); in i915_gem_do_execbuffer()
Dintel_fbc.c224 I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT_VALID); in ilk_fbc_enable()
Di915_drv.h3042 i915_gem_obj_ggtt_offset(struct drm_i915_gem_object *o) in i915_gem_obj_ggtt_offset() function
Dintel_display.c2643 if (i915_gem_obj_ggtt_offset(obj) == plane_config->base) { in intel_find_initial_plane_obj()
2807 i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset); in i9xx_update_primary_plane()
2811 I915_WRITE(DSPADDR(plane), i915_gem_obj_ggtt_offset(obj) + linear_offset); in i9xx_update_primary_plane()
2909 i915_gem_obj_ggtt_offset(obj) + intel_crtc->dspaddr_offset); in ironlake_update_primary_plane()
13822 addr = i915_gem_obj_ggtt_offset(obj); in intel_commit_cursor_plane()
Di915_gem_gtt.c2670 i915_gem_obj_ggtt_offset(obj), obj->base.size); in i915_gem_setup_global_gtt()
Di915_gem.c789 offset = i915_gem_obj_ggtt_offset(obj) + args->offset; in i915_gem_gtt_pwrite_fast()
Di915_debugfs.c1992 ggtt_offset = i915_gem_obj_ggtt_offset(ctx_obj); in i915_dump_lrc_obj()