Searched refs:halt_status (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/drivers/usb/dwc2/
H A Dhcd_intr.c395 * Gets the actual length of a transfer after the transfer halts. halt_status
398 * For IN transfers where halt_status is DWC2_HC_XFER_COMPLETE, *short_read
406 enum dwc2_halt_status halt_status, dwc2_get_actual_xfer_length()
413 if (halt_status == DWC2_HC_XFER_COMPLETE) { dwc2_get_actual_xfer_length()
537 * halt_status. Completes the Isochronous URB if all the URB frames have been
546 enum dwc2_halt_status halt_status) dwc2_update_isoc_urb_state()
556 switch (halt_status) { dwc2_update_isoc_urb_state()
560 chan, chnum, qtd, halt_status, NULL); dwc2_update_isoc_urb_state()
594 chan, chnum, qtd, halt_status, NULL); dwc2_update_isoc_urb_state()
621 dev_err(hsotg->dev, "Unhandled halt_status (%d)\n", dwc2_update_isoc_urb_state()
622 halt_status); dwc2_update_isoc_urb_state()
632 halt_status = DWC2_HC_XFER_URB_COMPLETE; dwc2_update_isoc_urb_state()
634 halt_status = DWC2_HC_XFER_COMPLETE; dwc2_update_isoc_urb_state()
637 return halt_status; dwc2_update_isoc_urb_state()
689 * @halt_status: Reason the channel is being released. This status
698 enum dwc2_halt_status halt_status) dwc2_release_channel()
705 dev_vdbg(hsotg->dev, " %s: channel %d, halt_status %d\n", dwc2_release_channel()
706 __func__, chan->hc_num, halt_status); dwc2_release_channel()
708 switch (halt_status) { dwc2_release_channel()
796 enum dwc2_halt_status halt_status) dwc2_halt_channel()
804 dwc2_release_channel(hsotg, chan, qtd, halt_status); dwc2_halt_channel()
809 dwc2_hc_halt(hsotg, chan, halt_status); dwc2_halt_channel()
857 enum dwc2_halt_status halt_status) dwc2_complete_non_periodic_xfer()
889 dwc2_halt_channel(hsotg, chan, qtd, halt_status); dwc2_complete_non_periodic_xfer()
895 dwc2_release_channel(hsotg, chan, qtd, halt_status); dwc2_complete_non_periodic_xfer()
907 enum dwc2_halt_status halt_status) dwc2_complete_periodic_xfer()
915 dwc2_release_channel(hsotg, chan, qtd, halt_status); dwc2_complete_periodic_xfer()
918 dwc2_halt_channel(hsotg, chan, qtd, halt_status); dwc2_complete_periodic_xfer()
980 enum dwc2_halt_status halt_status = DWC2_HC_XFER_COMPLETE; dwc2_hc_xfercomp_intr() local
995 dwc2_hcd_complete_xfer_ddma(hsotg, chan, chnum, halt_status); dwc2_hc_xfercomp_intr()
1026 halt_status = DWC2_HC_XFER_COMPLETE; dwc2_hc_xfercomp_intr()
1039 halt_status = DWC2_HC_XFER_COMPLETE; dwc2_hc_xfercomp_intr()
1046 halt_status = DWC2_HC_XFER_URB_COMPLETE; dwc2_hc_xfercomp_intr()
1051 halt_status); dwc2_hc_xfercomp_intr()
1059 halt_status = DWC2_HC_XFER_URB_COMPLETE; dwc2_hc_xfercomp_intr()
1061 halt_status = DWC2_HC_XFER_COMPLETE; dwc2_hc_xfercomp_intr()
1066 halt_status); dwc2_hc_xfercomp_intr()
1079 halt_status = DWC2_HC_XFER_URB_COMPLETE; dwc2_hc_xfercomp_intr()
1081 halt_status = DWC2_HC_XFER_COMPLETE; dwc2_hc_xfercomp_intr()
1086 halt_status); dwc2_hc_xfercomp_intr()
1092 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, dwc2_hc_xfercomp_intr()
1095 halt_status); dwc2_hc_xfercomp_intr()
1161 enum dwc2_halt_status halt_status) dwc2_update_urb_state_abn()
1164 qtd, halt_status, NULL); dwc2_update_urb_state_abn()
1474 enum dwc2_halt_status halt_status; dwc2_hc_babble_intr() local
1476 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, chnum, dwc2_hc_babble_intr()
1478 dwc2_halt_channel(hsotg, chan, qtd, halt_status); dwc2_hc_babble_intr()
1634 enum dwc2_halt_status halt_status; dwc2_hc_xacterr_intr() local
1636 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, dwc2_hc_xacterr_intr()
1638 dwc2_halt_channel(hsotg, chan, qtd, halt_status); dwc2_hc_xacterr_intr()
1655 enum dwc2_halt_status halt_status; dwc2_hc_frmovrun_intr() local
1671 halt_status = dwc2_update_isoc_urb_state(hsotg, chan, chnum, dwc2_hc_frmovrun_intr()
1673 dwc2_halt_channel(hsotg, chan, qtd, halt_status); dwc2_hc_frmovrun_intr()
1719 if (chan->halt_status == DWC2_HC_XFER_NO_HALT_STATUS) { dwc2_halt_status_ok()
1729 "%s: chan->halt_status DWC2_HC_XFER_NO_HALT_STATUS,\n", dwc2_halt_status_ok()
1757 dwc2_halt_channel(hsotg, chan, qtd, chan->halt_status); dwc2_halt_status_ok()
1793 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE || dwc2_hc_chhltd_intr_dma()
1794 (chan->halt_status == DWC2_HC_XFER_AHB_ERR && dwc2_hc_chhltd_intr_dma()
1798 chan->halt_status); dwc2_hc_chhltd_intr_dma()
1807 chan->halt_status); dwc2_hc_chhltd_intr_dma()
1948 dwc2_release_channel(hsotg, chan, qtd, chan->halt_status); dwc2_hc_chhltd_intr()
2004 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) { dwc2_hc_n_intr()
2012 chan->halt_status); dwc2_hc_n_intr()
2015 chan->halt_status); dwc2_hc_n_intr()
2029 chan->halt_status = DWC2_HC_XFER_NO_HALT_STATUS; dwc2_hc_n_intr()
403 dwc2_get_actual_xfer_length(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status, int *short_read) dwc2_get_actual_xfer_length() argument
543 dwc2_update_isoc_urb_state( struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_update_isoc_urb_state() argument
695 dwc2_release_channel(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_release_channel() argument
794 dwc2_halt_channel(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_halt_channel() argument
854 dwc2_complete_non_periodic_xfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_complete_non_periodic_xfer() argument
904 dwc2_complete_periodic_xfer(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_complete_periodic_xfer() argument
1157 dwc2_update_urb_state_abn(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_hcd_urb *urb, struct dwc2_qtd *qtd, enum dwc2_halt_status halt_status) dwc2_update_urb_state_abn() argument
H A Dhcd_ddma.c846 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) dwc2_cmpl_host_isoc_dma_desc()
862 enum dwc2_halt_status halt_status) dwc2_complete_isoc_xfer_ddma()
873 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) { dwc2_complete_isoc_xfer_ddma()
879 if (halt_status == DWC2_HC_XFER_AHB_ERR || dwc2_complete_isoc_xfer_ddma()
880 halt_status == DWC2_HC_XFER_BABBLE_ERR) { dwc2_complete_isoc_xfer_ddma()
890 int err = halt_status == DWC2_HC_XFER_AHB_ERR ? dwc2_complete_isoc_xfer_ddma()
936 enum dwc2_halt_status halt_status, dwc2_update_non_isoc_urb_state_ddma()
948 if (halt_status == DWC2_HC_XFER_AHB_ERR) { dwc2_update_non_isoc_urb_state_ddma()
955 switch (halt_status) { dwc2_update_non_isoc_urb_state_ddma()
971 __func__, halt_status); dwc2_update_non_isoc_urb_state_ddma()
1018 enum dwc2_halt_status halt_status, dwc2_process_non_isoc_desc()
1038 halt_status, n_bytes, dwc2_process_non_isoc_desc()
1083 enum dwc2_halt_status halt_status) dwc2_complete_non_isoc_xfer_ddma()
1091 if (chan->halt_status == DWC2_HC_XFER_URB_DEQUEUE) { dwc2_complete_non_isoc_xfer_ddma()
1105 desc_num, halt_status, dwc2_complete_non_isoc_xfer_ddma()
1119 if (halt_status == DWC2_HC_XFER_STALL) dwc2_complete_non_isoc_xfer_ddma()
1125 if (halt_status == DWC2_HC_XFER_COMPLETE) { dwc2_complete_non_isoc_xfer_ddma()
1145 * @halt_status: Reason the channel is being halted or just XferComplete
1156 enum dwc2_halt_status halt_status) dwc2_hcd_complete_xfer_ddma()
1163 dwc2_complete_isoc_xfer_ddma(hsotg, chan, halt_status); dwc2_hcd_complete_xfer_ddma()
1166 if (halt_status != DWC2_HC_XFER_COMPLETE || dwc2_hcd_complete_xfer_ddma()
1169 if (halt_status == DWC2_HC_XFER_COMPLETE) dwc2_hcd_complete_xfer_ddma()
1170 dwc2_hc_halt(hsotg, chan, halt_status); dwc2_hcd_complete_xfer_ddma()
1189 halt_status); dwc2_hcd_complete_xfer_ddma()
860 dwc2_complete_isoc_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, enum dwc2_halt_status halt_status) dwc2_complete_isoc_xfer_ddma() argument
932 dwc2_update_non_isoc_urb_state_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, struct dwc2_qtd *qtd, struct dwc2_hcd_dma_desc *dma_desc, enum dwc2_halt_status halt_status, u32 n_bytes, int *xfer_done) dwc2_update_non_isoc_urb_state_ddma() argument
1014 dwc2_process_non_isoc_desc(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, struct dwc2_qtd *qtd, int desc_num, enum dwc2_halt_status halt_status, int *xfer_done) dwc2_process_non_isoc_desc() argument
1080 dwc2_complete_non_isoc_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, enum dwc2_halt_status halt_status) dwc2_complete_non_isoc_xfer_ddma() argument
1154 dwc2_hcd_complete_xfer_ddma(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, int chnum, enum dwc2_halt_status halt_status) dwc2_hcd_complete_xfer_ddma() argument
H A Dcore.c1387 * @halt_status: Reason for halting the channel
1411 enum dwc2_halt_status halt_status) dwc2_hc_halt()
1417 if (halt_status == DWC2_HC_XFER_NO_HALT_STATUS) dwc2_hc_halt()
1418 dev_err(hsotg->dev, "!!! halt_status = %d !!!\n", halt_status); dwc2_hc_halt()
1420 if (halt_status == DWC2_HC_XFER_URB_DEQUEUE || dwc2_hc_halt()
1421 halt_status == DWC2_HC_XFER_AHB_ERR) { dwc2_hc_halt()
1445 chan->halt_status = halt_status; dwc2_hc_halt()
1520 chan->halt_status = halt_status; dwc2_hc_halt()
1542 dev_vdbg(hsotg->dev, " halt_status: %d\n", dwc2_hc_halt()
1543 chan->halt_status); dwc2_hc_halt()
1410 dwc2_hc_halt(struct dwc2_hsotg *hsotg, struct dwc2_host_chan *chan, enum dwc2_halt_status halt_status) dwc2_hc_halt() argument
H A Dhcd.h105 * @halt_status: Reason for halting the host channel
157 enum dwc2_halt_status halt_status; member in struct:dwc2_host_chan
493 enum dwc2_halt_status halt_status);
H A Dhcd.c99 dev_dbg(hsotg->dev, " halt_status: %d\n", chan->halt_status); dwc2_dump_channel_info()
807 chan->halt_status = DWC2_HC_XFER_NO_HALT_STATUS; dwc2_assign_and_init_hc()
1022 dwc2_hc_halt(hsotg, chan, chan->halt_status); dwc2_queue_transaction()
1971 dev_dbg(hsotg->dev, " halt_status: %d\n", chan->halt_status); dwc2_hcd_dump_state()
H A Dcore.h878 enum dwc2_halt_status halt_status);
/linux-4.4.14/drivers/scsi/qla2xxx/
H A Dqla_nx2.c2111 uint32_t dev_state, halt_status; qla8044_watchdog() local
2148 halt_status = qla8044_rd_direct(vha, qla8044_watchdog()
2150 if (halt_status & qla8044_watchdog()
2157 } else if (halt_status & qla8044_watchdog()
H A Dqla_nx.c3358 uint32_t dev_state, halt_status; qla82xx_watchdog() local
3392 halt_status = qla82xx_rd_32(ha, qla82xx_watchdog()
3399 " PEG_NET_4_PC: 0x%x.\n", halt_status, qla82xx_watchdog()
3411 if (((halt_status & 0x1fffff00) >> 8) == 0x67) qla82xx_watchdog()
3416 if (halt_status & HALT_STATUS_UNRECOVERABLE) { qla82xx_watchdog()
/linux-4.4.14/drivers/net/ethernet/agere/
H A Det131x.h289 * 17: halt_status
/linux-4.4.14/drivers/scsi/qla4xxx/
H A Dql4_os.c4346 uint32_t halt_status; qla4_8xxx_process_fw_error() local
4349 halt_status = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_HALT_STATUS1); qla4_8xxx_process_fw_error()
4358 if (QLA82XX_FWERROR_CODE(halt_status) == 0x67) qla4_8xxx_process_fw_error()
4361 if (halt_status & HALT_STATUS_UNRECOVERABLE) qla4_8xxx_process_fw_error()
4364 if (halt_status & QLA83XX_HALT_STATUS_FW_RESET) qla4_8xxx_process_fw_error()
4367 else if (halt_status & QLA83XX_HALT_STATUS_UNRECOVERABLE) qla4_8xxx_process_fw_error()

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