Searched refs:dsaf_write_dev (Results 1 – 7 of 7) sorted by relevance
/linux-4.4.14/drivers/net/ethernet/hisilicon/hns/ |
D | hns_dsaf_rcb.c | 84 dsaf_write_dev(q, RCB_RING_PREFETCH_EN_REG, 0); in hns_rcb_reset_ring_hw() 86 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1); in hns_rcb_reset_ring_hw() 93 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0); in hns_rcb_reset_ring_hw() 95 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 1); in hns_rcb_reset_ring_hw() 103 dsaf_write_dev(q, RCB_RING_T0_BE_RST, 0); in hns_rcb_reset_ring_hw() 125 dsaf_write_dev(q, RCB_RING_INTMSK_TXWL_REG, int_mask_en); in hns_rcb_int_ctrl_hw() 126 dsaf_write_dev(q, RCB_RING_INTMSK_TX_OVERTIME_REG, in hns_rcb_int_ctrl_hw() 131 dsaf_write_dev(q, RCB_RING_INTMSK_RXWL_REG, int_mask_en); in hns_rcb_int_ctrl_hw() 132 dsaf_write_dev(q, RCB_RING_INTMSK_RX_OVERTIME_REG, in hns_rcb_int_ctrl_hw() 142 dsaf_write_dev(q, RCB_RING_INTSTS_TX_RING_REG, clr); in hns_rcb_int_clr_hw() [all …]
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D | hns_dsaf_main.c | 291 dsaf_write_dev(dsaf_dev, in hns_dsaf_sbm_cfg() 358 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg0); in hns_dsaf_sbm_bp_wl_cfg() 366 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg1); in hns_dsaf_sbm_bp_wl_cfg() 374 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg2); in hns_dsaf_sbm_bp_wl_cfg() 384 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg3); in hns_dsaf_sbm_bp_wl_cfg() 395 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg3); in hns_dsaf_sbm_bp_wl_cfg() 406 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg2); in hns_dsaf_sbm_bp_wl_cfg() 417 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg2); in hns_dsaf_sbm_bp_wl_cfg() 448 dsaf_write_dev( in hns_dsaf_voq_bp_all_thrd_cfg() 463 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG, in hns_dsaf_tbl_tcam_data_cfg() [all …]
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D | hns_dsaf_xgmac.c | 177 dsaf_write_dev(drv, XGMAC_PMA_FEC_CONTROL_REG, origin); in hns_xgmac_pma_fec_enable() 186 dsaf_write_dev(drv, XGMAC_INT_STATUS_REG, clr_vlue); in hns_xgmac_exc_irq_en() 187 dsaf_write_dev(drv, XGMAC_INT_ENABLE_REG, msk_vlue); in hns_xgmac_exc_irq_en() 226 dsaf_write_dev(drv, XGMAC_MAC_CONTROL_REG, origin); in hns_xgmac_config_pad_and_crc() 241 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_CTRL_REG, origin); in hns_xgmac_pausefrm_cfg() 251 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG, low_val); in hns_xgmac_set_pausefrm_mac_addr() 252 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG, high_val); in hns_xgmac_set_pausefrm_mac_addr() 282 dsaf_write_dev(drv, XGMAC_MAC_PAUSE_TIME_REG, enable); in hns_xgmac_set_tx_auto_pause_frames() 306 dsaf_write_dev(drv, XGMAC_MAC_MAX_PKT_SIZE_REG, newval); in hns_xgmac_config_max_frame_length()
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D | hns_dsaf_gmac.c | 167 dsaf_write_dev(drv, GMAC_TX_LOOP_PKT_PRI_REG, tx_loop_pkt_pri); in hns_gmac_tx_loop_pkt_dis() 235 dsaf_write_dev(drv, GMAC_PAUSE_EN_REG, pause_en); in hns_gmac_pause_frm_cfg() 285 dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl); in hns_gmac_adjust_link() 410 dsaf_write_dev(drv, GMAC_STATION_ADDR_LOW_2_REG, low_val); in hns_gmac_set_mac_addr() 411 dsaf_write_dev(drv, GMAC_STATION_ADDR_HIGH_2_REG, high_val); in hns_gmac_set_mac_addr() 441 dsaf_write_dev(drv, GMAC_TRANSMIT_CONTROL_REG, tx_ctrl); in hns_gmac_config_pad_and_crc()
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D | hns_dsaf_ppe.c | 169 dsaf_write_dev(ppe_common, PPE_COM_CFG_QID_MODE_REG, qid_mod); in hns_ppe_set_qid() 181 dsaf_write_dev(ppe_cb, PPE_CFG_XGE_MODE_REG, mode); in hns_ppe_set_port_mode() 261 dsaf_write_dev(ppe_cb, PPE_RINT_REG, clr_vlue); in hns_ppe_exc_irq_en() 264 dsaf_write_dev(ppe_cb, PPE_INTEN_REG, msk_vlue & vld_msk); in hns_ppe_exc_irq_en()
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D | hns_dsaf_main.h | 356 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); in hns_dsaf_tbl_tcam_load_pul() 358 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul); in hns_dsaf_tbl_tcam_load_pul()
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D | hns_dsaf_reg.h | 908 #define dsaf_write_dev(a, reg, value) \ macro
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