Searched refs:dev_cap (Results 1 – 7 of 7) sorted by relevance
629 int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) in mlx4_QUERY_DEV_CAP() argument730 dev_cap->flags2 = 0; in mlx4_QUERY_DEV_CAP()742 dev_cap->reserved_qps = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()744 dev_cap->max_qps = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()746 dev_cap->reserved_srqs = 1 << (field >> 4); in mlx4_QUERY_DEV_CAP()748 dev_cap->max_srqs = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()750 dev_cap->max_cq_sz = 1 << field; in mlx4_QUERY_DEV_CAP()752 dev_cap->reserved_cqs = 1 << (field & 0xf); in mlx4_QUERY_DEV_CAP()754 dev_cap->max_cqs = 1 << (field & 0x1f); in mlx4_QUERY_DEV_CAP()756 dev_cap->max_mpts = 1 << (field & 0x3f); in mlx4_QUERY_DEV_CAP()[all …]
71 struct mlx4_dev_cap *dev_cap, in mlx4_make_profile() argument110 profile[MLX4_RES_QP].size = dev_cap->qpc_entry_sz; in mlx4_make_profile()111 profile[MLX4_RES_RDMARC].size = dev_cap->rdmarc_entry_sz; in mlx4_make_profile()112 profile[MLX4_RES_ALTC].size = dev_cap->altc_entry_sz; in mlx4_make_profile()113 profile[MLX4_RES_AUXC].size = dev_cap->aux_entry_sz; in mlx4_make_profile()114 profile[MLX4_RES_SRQ].size = dev_cap->srq_entry_sz; in mlx4_make_profile()115 profile[MLX4_RES_CQ].size = dev_cap->cqc_entry_sz; in mlx4_make_profile()116 profile[MLX4_RES_EQ].size = dev_cap->eqc_entry_sz; in mlx4_make_profile()117 profile[MLX4_RES_DMPT].size = dev_cap->dmpt_entry_sz; in mlx4_make_profile()118 profile[MLX4_RES_CMPT].size = dev_cap->cmpt_entry_sz; in mlx4_make_profile()[all …]
207 static int mlx4_query_func(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap) in mlx4_query_func() argument218 dev_cap->max_eqs = func.max_eq; in mlx4_query_func()219 dev_cap->reserved_eqs = func.rsvd_eqs; in mlx4_query_func()220 dev_cap->reserved_uars = func.rsvd_uars; in mlx4_query_func()228 struct mlx4_caps *dev_cap = &dev->caps; in mlx4_enable_cqe_eqe_stride() local231 if (!(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_EQE_STRIDE) || in mlx4_enable_cqe_eqe_stride()232 !(dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_CQE_STRIDE)) in mlx4_enable_cqe_eqe_stride()238 if (!(dev_cap->flags & MLX4_DEV_CAP_FLAG_64B_EQE) || in mlx4_enable_cqe_eqe_stride()239 !(dev_cap->flags & MLX4_DEV_CAP_FLAG_64B_CQE)) { in mlx4_enable_cqe_eqe_stride()240 dev_cap->flags2 &= ~MLX4_DEV_CAP_FLAG2_CQE_STRIDE; in mlx4_enable_cqe_eqe_stride()[all …]
231 void mlx4_dev_cap_dump(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);232 int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap);
1036 struct mlx4_dev_cap *dev_cap,
192 u8 dev_cap; member
50 #define MLX4_IS_LEGACY_EQ_MODE(dev_cap) ((dev_cap).num_comp_vectors < \ argument51 (dev_cap).num_ports * MIN_MSIX_P_PORT)