629 int mlx4_QUERY_DEV_CAP(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)  in mlx4_QUERY_DEV_CAP()  argument
730 	dev_cap->flags2 = 0;  in mlx4_QUERY_DEV_CAP()
742 	dev_cap->reserved_qps = 1 << (field & 0xf);  in mlx4_QUERY_DEV_CAP()
744 	dev_cap->max_qps = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
746 	dev_cap->reserved_srqs = 1 << (field >> 4);  in mlx4_QUERY_DEV_CAP()
748 	dev_cap->max_srqs = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
750 	dev_cap->max_cq_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
752 	dev_cap->reserved_cqs = 1 << (field & 0xf);  in mlx4_QUERY_DEV_CAP()
754 	dev_cap->max_cqs = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
756 	dev_cap->max_mpts = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
758 	dev_cap->reserved_eqs = 1 << (field & 0xf);  in mlx4_QUERY_DEV_CAP()
760 	dev_cap->max_eqs = 1 << (field & 0xf);  in mlx4_QUERY_DEV_CAP()
762 	dev_cap->reserved_mtts = 1 << (field >> 4);  in mlx4_QUERY_DEV_CAP()
764 	dev_cap->max_mrw_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
766 	dev_cap->reserved_mrws = 1 << (field & 0xf);  in mlx4_QUERY_DEV_CAP()
768 	dev_cap->max_mtt_seg = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
770 	dev_cap->num_sys_eqs = size & 0xfff;  in mlx4_QUERY_DEV_CAP()
772 	dev_cap->max_requester_per_qp = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
774 	dev_cap->max_responder_per_qp = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
778 		dev_cap->max_gso_sz = 0;  in mlx4_QUERY_DEV_CAP()
780 		dev_cap->max_gso_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
784 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS_XOR;  in mlx4_QUERY_DEV_CAP()
786 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS_TOP;  in mlx4_QUERY_DEV_CAP()
789 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RSS;  in mlx4_QUERY_DEV_CAP()
790 		dev_cap->max_rss_tbl_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
792 		dev_cap->max_rss_tbl_sz = 0;  in mlx4_QUERY_DEV_CAP()
794 	dev_cap->max_rdma_global = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
796 	dev_cap->local_ca_ack_delay = field & 0x1f;  in mlx4_QUERY_DEV_CAP()
798 	dev_cap->num_ports = field & 0xf;  in mlx4_QUERY_DEV_CAP()
800 	dev_cap->max_msg_sz = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
803 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN;  in mlx4_QUERY_DEV_CAP()
806 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FS_EN;  in mlx4_QUERY_DEV_CAP()
807 	dev_cap->fs_log_max_ucast_qp_range_size = field & 0x1f;  in mlx4_QUERY_DEV_CAP()
810 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PORT_BEACON;  in mlx4_QUERY_DEV_CAP()
813 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_DMFS_IPOIB;  in mlx4_QUERY_DEV_CAP()
815 	dev_cap->fs_max_num_qp_per_entry = field;  in mlx4_QUERY_DEV_CAP()
818 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QCN;  in mlx4_QUERY_DEV_CAP()
820 	dev_cap->stat_rate_support = stat_rate;  in mlx4_QUERY_DEV_CAP()
823 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_TS;  in mlx4_QUERY_DEV_CAP()
826 	dev_cap->flags = flags | (u64)ext_flags << 32;  in mlx4_QUERY_DEV_CAP()
828 	dev_cap->reserved_uars = field >> 4;  in mlx4_QUERY_DEV_CAP()
830 	dev_cap->uar_size = 1 << ((field & 0x3f) + 20);  in mlx4_QUERY_DEV_CAP()
832 	dev_cap->min_page_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
837 		dev_cap->bf_reg_size = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
839 		if ((1 << (field & 0x3f)) > (PAGE_SIZE / dev_cap->bf_reg_size))  in mlx4_QUERY_DEV_CAP()
841 		dev_cap->bf_regs_per_page = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
843 		dev_cap->bf_reg_size = 0;  in mlx4_QUERY_DEV_CAP()
847 	dev_cap->max_sq_sg = field;  in mlx4_QUERY_DEV_CAP()
849 	dev_cap->max_sq_desc_sz = size;  in mlx4_QUERY_DEV_CAP()
852 	dev_cap->max_qp_per_mcg = 1 << field;  in mlx4_QUERY_DEV_CAP()
854 	dev_cap->reserved_mgms = field & 0xf;  in mlx4_QUERY_DEV_CAP()
856 	dev_cap->max_mcgs = 1 << field;  in mlx4_QUERY_DEV_CAP()
858 	dev_cap->reserved_pds = field >> 4;  in mlx4_QUERY_DEV_CAP()
860 	dev_cap->max_pds = 1 << (field & 0x3f);  in mlx4_QUERY_DEV_CAP()
862 	dev_cap->reserved_xrcds = field >> 4;  in mlx4_QUERY_DEV_CAP()
864 	dev_cap->max_xrcds = 1 << (field & 0x1f);  in mlx4_QUERY_DEV_CAP()
867 	dev_cap->rdmarc_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
869 	dev_cap->qpc_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
871 	dev_cap->aux_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
873 	dev_cap->altc_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
875 	dev_cap->eqc_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
877 	dev_cap->cqc_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
879 	dev_cap->srq_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
881 	dev_cap->cmpt_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
883 	dev_cap->mtt_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
885 	dev_cap->dmpt_entry_sz = size;  in mlx4_QUERY_DEV_CAP()
888 	dev_cap->max_srq_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
890 	dev_cap->max_qp_sz = 1 << field;  in mlx4_QUERY_DEV_CAP()
892 	dev_cap->resize_srq = field & 1;  in mlx4_QUERY_DEV_CAP()
894 	dev_cap->max_rq_sg = field;  in mlx4_QUERY_DEV_CAP()
896 	dev_cap->max_rq_desc_sz = size;  in mlx4_QUERY_DEV_CAP()
899 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QOS_VPP;  in mlx4_QUERY_DEV_CAP()
901 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETH_PROT_CTRL;  in mlx4_QUERY_DEV_CAP()
903 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_CQE_STRIDE;  in mlx4_QUERY_DEV_CAP()
905 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_EQE_STRIDE;  in mlx4_QUERY_DEV_CAP()
906 	MLX4_GET(dev_cap->bmme_flags, outbox,  in mlx4_QUERY_DEV_CAP()
908 	if (dev_cap->bmme_flags & MLX4_FLAG_PORT_REMAP)  in mlx4_QUERY_DEV_CAP()
909 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PORT_REMAP;  in mlx4_QUERY_DEV_CAP()
912 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_CONFIG_DEV;  in mlx4_QUERY_DEV_CAP()
914 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_IGNORE_FCS;  in mlx4_QUERY_DEV_CAP()
917 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_PHV_EN;  in mlx4_QUERY_DEV_CAP()
919 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN;  in mlx4_QUERY_DEV_CAP()
921 	MLX4_GET(dev_cap->reserved_lkey, outbox,  in mlx4_QUERY_DEV_CAP()
925 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETH_BACKPL_AN_REP;  in mlx4_QUERY_DEV_CAP()
927 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_RECOVERABLE_ERROR_EVENT;  in mlx4_QUERY_DEV_CAP()
930 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN;  in mlx4_QUERY_DEV_CAP()
933 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_VXLAN_OFFLOADS;  in mlx4_QUERY_DEV_CAP()
935 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_ETS_CFG;  in mlx4_QUERY_DEV_CAP()
936 	MLX4_GET(dev_cap->max_icm_sz, outbox,  in mlx4_QUERY_DEV_CAP()
938 	if (dev_cap->flags & MLX4_DEV_CAP_FLAG_COUNTERS)  in mlx4_QUERY_DEV_CAP()
939 		MLX4_GET(dev_cap->max_counters, outbox,  in mlx4_QUERY_DEV_CAP()
945 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_MAD_DEMUX;  in mlx4_QUERY_DEV_CAP()
947 	MLX4_GET(dev_cap->dmfs_high_rate_qpn_base, outbox,  in mlx4_QUERY_DEV_CAP()
949 	dev_cap->dmfs_high_rate_qpn_base &= MGM_QPN_MASK;  in mlx4_QUERY_DEV_CAP()
950 	MLX4_GET(dev_cap->dmfs_high_rate_qpn_range, outbox,  in mlx4_QUERY_DEV_CAP()
952 	dev_cap->dmfs_high_rate_qpn_range &= MGM_QPN_MASK;  in mlx4_QUERY_DEV_CAP()
955 	dev_cap->rl_caps.num_rates = size;  in mlx4_QUERY_DEV_CAP()
956 	if (dev_cap->rl_caps.num_rates) {  in mlx4_QUERY_DEV_CAP()
957 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT;  in mlx4_QUERY_DEV_CAP()
959 		dev_cap->rl_caps.max_val  = size & 0xfff;  in mlx4_QUERY_DEV_CAP()
960 		dev_cap->rl_caps.max_unit = size >> 14;  in mlx4_QUERY_DEV_CAP()
962 		dev_cap->rl_caps.min_val  = size & 0xfff;  in mlx4_QUERY_DEV_CAP()
963 		dev_cap->rl_caps.min_unit = size >> 14;  in mlx4_QUERY_DEV_CAP()
968 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_UPDATE_QP;  in mlx4_QUERY_DEV_CAP()
970 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_UPDATE_QP_SRC_CHECK_LB;  in mlx4_QUERY_DEV_CAP()
972 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_LB_SRC_CHK;  in mlx4_QUERY_DEV_CAP()
974 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_VLAN_CONTROL;  in mlx4_QUERY_DEV_CAP()
976 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_FSM;  in mlx4_QUERY_DEV_CAP()
978 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_80_VFS;  in mlx4_QUERY_DEV_CAP()
980 	for (i = 1; i <= dev_cap->num_ports; i++) {  in mlx4_QUERY_DEV_CAP()
981 		err = mlx4_QUERY_PORT(dev, i, dev_cap->port_cap + i);  in mlx4_QUERY_DEV_CAP()
991 	if (dev_cap->num_sys_eqs == 0)  in mlx4_QUERY_DEV_CAP()
992 		dev_cap->reserved_eqs = max(dev_cap->reserved_uars * 4,  in mlx4_QUERY_DEV_CAP()
993 					    dev_cap->reserved_eqs);  in mlx4_QUERY_DEV_CAP()
995 		dev_cap->flags2 |= MLX4_DEV_CAP_FLAG2_SYS_EQS;  in mlx4_QUERY_DEV_CAP()
1002 void mlx4_dev_cap_dump(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)  in mlx4_dev_cap_dump()  argument
1004 	if (dev_cap->bf_reg_size > 0)  in mlx4_dev_cap_dump()
1006 			 dev_cap->bf_reg_size, dev_cap->bf_regs_per_page);  in mlx4_dev_cap_dump()
1011 		 dev_cap->bmme_flags, dev_cap->reserved_lkey);  in mlx4_dev_cap_dump()
1013 		 (unsigned long long) dev_cap->max_icm_sz >> 20);  in mlx4_dev_cap_dump()
1015 		 dev_cap->max_qps, dev_cap->reserved_qps, dev_cap->qpc_entry_sz);  in mlx4_dev_cap_dump()
1017 		 dev_cap->max_srqs, dev_cap->reserved_srqs, dev_cap->srq_entry_sz);  in mlx4_dev_cap_dump()
1019 		 dev_cap->max_cqs, dev_cap->reserved_cqs, dev_cap->cqc_entry_sz);  in mlx4_dev_cap_dump()
1021 		 dev_cap->num_sys_eqs, dev_cap->max_eqs, dev_cap->reserved_eqs,  in mlx4_dev_cap_dump()
1022 		 dev_cap->eqc_entry_sz);  in mlx4_dev_cap_dump()
1024 		 dev_cap->reserved_mrws, dev_cap->reserved_mtts);  in mlx4_dev_cap_dump()
1026 		 dev_cap->max_pds, dev_cap->reserved_pds, dev_cap->reserved_uars);  in mlx4_dev_cap_dump()
1028 		 dev_cap->max_pds, dev_cap->reserved_mgms);  in mlx4_dev_cap_dump()
1030 		 dev_cap->max_cq_sz, dev_cap->max_qp_sz, dev_cap->max_srq_sz);  in mlx4_dev_cap_dump()
1032 		 dev_cap->local_ca_ack_delay, 128 << dev_cap->port_cap[1].ib_mtu,  in mlx4_dev_cap_dump()
1033 		 dev_cap->port_cap[1].max_port_width);  in mlx4_dev_cap_dump()
1035 		 dev_cap->max_sq_desc_sz, dev_cap->max_sq_sg);  in mlx4_dev_cap_dump()
1037 		 dev_cap->max_rq_desc_sz, dev_cap->max_rq_sg);  in mlx4_dev_cap_dump()
1038 	mlx4_dbg(dev, "Max GSO size: %d\n", dev_cap->max_gso_sz);  in mlx4_dev_cap_dump()
1039 	mlx4_dbg(dev, "Max counters: %d\n", dev_cap->max_counters);  in mlx4_dev_cap_dump()
1040 	mlx4_dbg(dev, "Max RSS Table size: %d\n", dev_cap->max_rss_tbl_sz);  in mlx4_dev_cap_dump()
1042 		 dev_cap->dmfs_high_rate_qpn_base);  in mlx4_dev_cap_dump()
1044 		 dev_cap->dmfs_high_rate_qpn_range);  in mlx4_dev_cap_dump()
1046 	if (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT) {  in mlx4_dev_cap_dump()
1047 		struct mlx4_rate_limit_caps *rl_caps = &dev_cap->rl_caps;  in mlx4_dev_cap_dump()
1054 	dump_dev_cap_flags(dev, dev_cap->flags);  in mlx4_dev_cap_dump()
1055 	dump_dev_cap_flags2(dev, dev_cap->flags2);  in mlx4_dev_cap_dump()