Searched refs:current_sclk (Results 1 – 21 of 21) sorted by relevance
201 if (sclk < rdev->pm.current_sclk) in radeon_set_power_state()218 if (sclk != rdev->pm.current_sclk) { in radeon_set_power_state()222 rdev->pm.current_sclk = sclk; in radeon_set_power_state()1229 rdev->pm.current_sclk = rdev->pm.default_sclk; in radeon_pm_resume_old()1297 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_old()1363 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_pm_init_dpm()1871 seq_printf(m, "current engine clock: %u0 kHz\n", rdev->pm.current_sclk); in radeon_debugfs_pm_info()
1404 u32 current_sclk; in trinity_patch_thermal_state() local1409 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()1412 current_sclk = pi->boot_pl.sclk; in trinity_patch_thermal_state()1417 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()1418 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1050 u32 current_sclk; in sumo_patch_thermal_state() local1055 current_sclk = current_ps->levels[current_index].sclk; in sumo_patch_thermal_state()1058 current_sclk = pi->boot_pl.sclk; in sumo_patch_thermal_state()1063 if (ps->levels[0].sclk > current_sclk) in sumo_patch_thermal_state()1064 ps->levels[0].sclk = current_sclk; in sumo_patch_thermal_state()
340 rdev->pm.current_sclk = rdev->clock.default_sclk; in radeon_get_clock_info()
564 *value = rdev->pm.current_sclk / 100; in radeon_info_ioctl()
238 u32 sclk = rdev->pm.current_sclk; in radeon_get_i2c_prescale()
293 selected_sclk = rdev->pm.current_sclk; in rs690_crtc_bandwidth_compute()
708 u32 sclk = rdev->pm.current_sclk; in radeon_update_bandwidth_info()
976 selected_sclk = rdev->pm.current_sclk; in rv515_crtc_bandwidth_compute()
2284 wm_high.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()2311 wm_low.sclk = rdev->pm.current_sclk * 10; in evergreen_program_watermarks()
2286 wm_high.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()2313 wm_low.sclk = rdev->pm.current_sclk * 10; in dce6_program_watermarks()
1630 u32 current_sclk; member
9559 wm_high.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()9599 wm_low.sclk = rdev->pm.current_sclk * 10; in dce8_program_watermarks()
1210 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()1249 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v8_0_program_watermarks()
696 adev->pm.current_sclk = adev->clock.default_sclk; in amdgpu_atombios_get_clock_info()
1255 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()1294 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v11_0_program_watermarks()
1267 wm_high.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()1306 wm_low.sclk = adev->pm.current_sclk * 10; in dce_v10_0_program_watermarks()
625 adev->pm.current_sclk = adev->clock.default_sclk; in cz_dpm_sw_init()
1642 u32 current_sclk; member
3035 adev->pm.current_sclk = adev->clock.default_sclk; in kv_dpm_sw_init()
6221 adev->pm.current_sclk = adev->clock.default_sclk; in ci_dpm_sw_init()