Searched refs:cpg_mode (Results 1 – 4 of 4) sorted by relevance
91 static u32 cpg_mode __initdata;151 config = &cpg_clk_configs[CPG_CLK_CONFIG_INDEX(cpg_mode)]; in r8a7779_cpg_clocks_init()152 plla_mult = cpg_plla_mult[CPG_PLLA_MULT_INDEX(cpg_mode)]; in r8a7779_cpg_clocks_init()179 cpg_mode = mode; in r8a7779_clocks_init()
41 unsigned cpg_mode = 0; /* hardcoded to EXTAL for now */ in rz_cpg_register_clock() local42 const char *parent_name = of_clk_get_parent_name(np, cpg_mode); in rz_cpg_register_clock()44 mult = cpg_mode ? (32 / 4) : 30; in rz_cpg_register_clock()
62 static u32 cpg_mode __initdata;75 switch (cpg_mode & (BIT(2) | BIT(1))) { in r8a7740_cpg_register_clock()93 if (cpg_mode & BIT(1)) in r8a7740_cpg_register_clock()154 if (of_property_read_u32(np, "renesas,mode", &cpg_mode)) in r8a7740_cpg_clocks_init()
298 static u32 cpg_mode __initdata;331 div = cpg_mode & BIT(18) ? 36 : 24; in rcar_gen2_cpg_register_clock()334 div = (cpg_mode & (BIT(3) | BIT(2) | BIT(1))) == BIT(2) in rcar_gen2_cpg_register_clock()400 config = &cpg_pll_configs[CPG_PLL_CONFIG_INDEX(cpg_mode)]; in rcar_gen2_cpg_clocks_init()426 cpg_mode = mode; in rcar_gen2_clocks_init()