| H A D | offb.c | 55 volatile void __iomem *cmap_adr; member in struct:offb_par
134 if (!par->cmap_adr) offb_setcolreg()
139 writeb(regno, par->cmap_adr); offb_setcolreg()
146 out_le32(par->cmap_adr + 0x58, offb_setcolreg()
147 in_le32(par->cmap_adr + 0x58) & ~0x20); offb_setcolreg()
150 out_8(par->cmap_adr + 0xb0, regno); offb_setcolreg()
151 out_le32(par->cmap_adr + 0xb4, offb_setcolreg()
156 out_le32(par->cmap_adr + 0x58, offb_setcolreg()
157 in_le32(par->cmap_adr + 0x58) | 0x20); offb_setcolreg()
159 out_8(par->cmap_adr + 0xb0, regno); offb_setcolreg()
160 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); offb_setcolreg()
164 out_8(par->cmap_adr + 0xb0, regno); offb_setcolreg()
165 out_le32(par->cmap_adr + 0xb4, (red << 16 | green << 8 | blue)); offb_setcolreg()
168 out_le32(((unsigned __iomem *) par->cmap_adr) + regno, offb_setcolreg()
173 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_setcolreg()
174 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); offb_setcolreg()
176 par->cmap_adr + AVIVO_DC_LUT_30_COLOR); offb_setcolreg()
177 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_setcolreg()
178 writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); offb_setcolreg()
180 par->cmap_adr + AVIVO_DC_LUT_30_COLOR); offb_setcolreg()
196 if (!par->cmap_adr) offb_blank()
209 writeb(i, par->cmap_adr); offb_blank()
215 out_le32(par->cmap_adr + 0x58, offb_blank()
216 in_le32(par->cmap_adr + 0x58) & ~0x20); offb_blank()
219 out_8(par->cmap_adr + 0xb0, i); offb_blank()
220 out_le32(par->cmap_adr + 0xb4, 0); offb_blank()
224 out_le32(par->cmap_adr + 0x58, offb_blank()
225 in_le32(par->cmap_adr + 0x58) | 0x20); offb_blank()
227 out_8(par->cmap_adr + 0xb0, i); offb_blank()
228 out_le32(par->cmap_adr + 0xb4, 0); offb_blank()
231 out_8(par->cmap_adr + 0xb0, i); offb_blank()
232 out_le32(par->cmap_adr + 0xb4, 0); offb_blank()
235 out_le32(((unsigned __iomem *) par->cmap_adr) + i, offb_blank()
239 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_blank()
240 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); offb_blank()
241 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); offb_blank()
242 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_blank()
243 writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); offb_blank()
244 writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); offb_blank()
258 writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL); offb_set_par()
259 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE); offb_set_par()
260 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN); offb_set_par()
261 writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED); offb_set_par()
262 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE); offb_set_par()
263 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN); offb_set_par()
264 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED); offb_set_par()
265 writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL); offb_set_par()
266 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE); offb_set_par()
267 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN); offb_set_par()
268 writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED); offb_set_par()
269 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE); offb_set_par()
270 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN); offb_set_par()
271 writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED); offb_set_par()
272 writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_set_par()
273 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); offb_set_par()
274 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); offb_set_par()
275 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); offb_set_par()
276 writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); offb_set_par()
277 writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); offb_set_par()
329 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); offb_init_palette_hacks()
330 if (par->cmap_adr) offb_init_palette_hacks()
334 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); offb_init_palette_hacks()
335 if (par->cmap_adr) offb_init_palette_hacks()
338 par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); offb_init_palette_hacks()
339 if (par->cmap_adr) offb_init_palette_hacks()
342 par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff); offb_init_palette_hacks()
343 if (par->cmap_adr) offb_init_palette_hacks()
347 par->cmap_adr = offb_init_palette_hacks()
349 par->cmap_data = par->cmap_adr + 1; offb_init_palette_hacks()
353 par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000); offb_init_palette_hacks()
354 if (par->cmap_adr) offb_init_palette_hacks()
366 par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000); offb_init_palette_hacks()
367 if (par->cmap_adr) offb_init_palette_hacks()
379 par->cmap_adr = ioremap(io_addr + 0x3c8, 2); offb_init_palette_hacks()
380 if (par->cmap_adr) { offb_init_palette_hacks()
382 par->cmap_data = par->cmap_adr + 1; offb_init_palette_hacks()
528 iounmap(par->cmap_adr); offb_init_fb()
529 par->cmap_adr = NULL; offb_init_fb()
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