Searched refs:clock_type (Results 1 - 31 of 31) sorted by relevance

/linux-4.4.14/drivers/nfc/fdp/
H A Di2c.c235 u8 *clock_type, u32 *clock_freq, fdp_nci_i2c_read_device_properties()
241 r = device_property_read_u8(dev, FDP_DP_CLOCK_TYPE_NAME, clock_type); fdp_nci_i2c_read_device_properties()
244 *clock_type = 0; fdp_nci_i2c_read_device_properties()
281 *clock_type, *clock_freq, *fw_vsc_cfg != NULL ? "yes" : "no"); fdp_nci_i2c_read_device_properties()
290 u8 clock_type; fdp_nci_i2c_probe() local
335 fdp_nci_i2c_read_device_properties(dev, &clock_type, &clock_freq, fdp_nci_i2c_probe()
341 clock_type, clock_freq, fw_vsc_cfg); fdp_nci_i2c_probe()
234 fdp_nci_i2c_read_device_properties(struct device *dev, u8 *clock_type, u32 *clock_freq, u8 **fw_vsc_cfg) fdp_nci_i2c_read_device_properties() argument
H A Dfdp.h34 u8 clock_type, u32 clock_freq, u8 *fw_vsc_cfg);
H A Dfdp.c64 u8 clock_type; member in struct:fdp_nci_info
126 static int fdp_nci_set_clock(struct nci_dev *ndev, u8 clock_type, fdp_nci_set_clock() argument
146 data[8] = clock_type; fdp_nci_set_clock()
586 r = fdp_nci_set_clock(ndev, info->clock_type, info->clock_freq); fdp_nci_post_setup()
743 int tx_tailroom, u8 clock_type, u32 clock_freq, fdp_nci_probe()
760 info->clock_type = clock_type; fdp_nci_probe()
741 fdp_nci_probe(struct fdp_i2c_phy *phy, struct nfc_phy_ops *phy_ops, struct nci_dev **ndevp, int tx_headroom, int tx_tailroom, u8 clock_type, u32 clock_freq, u8 *fw_vsc_cfg) fdp_nci_probe() argument
/linux-4.4.14/include/uapi/linux/hdlc/
H A Dioctl.h41 unsigned int clock_type; /* internal, external, TX-internal etc. */ member in struct:__anon14064
47 unsigned int clock_type; /* internal, external, TX-internal etc. */ member in struct:__anon14065
/linux-4.4.14/tools/testing/selftests/timers/
H A Dinconsistency-check.c105 int consistency_test(int clock_type, unsigned long seconds) consistency_test() argument
113 clock_gettime(clock_type, &list[0]); consistency_test()
125 clock_gettime(clock_type, &list[i]); consistency_test()
/linux-4.4.14/drivers/net/wan/
H A Dc101.c158 switch(port->settings.clock_type) { c101_set_iface()
265 if (new_line.clock_type != CLOCK_EXT && c101_ioctl()
266 new_line.clock_type != CLOCK_TXFROMRX && c101_ioctl()
267 new_line.clock_type != CLOCK_INT && c101_ioctl()
268 new_line.clock_type != CLOCK_TXINT) c101_ioctl()
380 card->settings.clock_type = CLOCK_EXT; c101_run()
H A Dpci200syn.c129 switch(port->settings.clock_type) { pci200_set_iface()
221 if (new_line.clock_type != CLOCK_EXT && pci200_ioctl()
222 new_line.clock_type != CLOCK_TXFROMRX && pci200_ioctl()
223 new_line.clock_type != CLOCK_INT && pci200_ioctl()
224 new_line.clock_type != CLOCK_TXINT) pci200_ioctl()
398 port->settings.clock_type = CLOCK_EXT; pci200_pci_init_one()
H A Dn2.c176 switch(port->settings.clock_type) { n2_set_iface()
283 if (new_line.clock_type != CLOCK_EXT && n2_ioctl()
284 new_line.clock_type != CLOCK_TXFROMRX && n2_ioctl()
285 new_line.clock_type != CLOCK_INT && n2_ioctl()
286 new_line.clock_type != CLOCK_TXINT) n2_ioctl()
473 port->settings.clock_type = CLOCK_EXT; n2_run()
H A Dpc300too.c130 switch(port->settings.clock_type) { pc300_set_iface()
246 if (new_line.clock_type != CLOCK_EXT && pc300_ioctl()
247 new_line.clock_type != CLOCK_TXFROMRX && pc300_ioctl()
248 new_line.clock_type != CLOCK_INT && pc300_ioctl()
249 new_line.clock_type != CLOCK_TXINT) pc300_ioctl()
458 port->settings.clock_type = CLOCK_EXT; pc300_pci_init_one()
H A Dwanxl.c62 unsigned int clock_type; member in struct:port
359 line.clock_type = get_status(port)->clocking; wanxl_ioctl()
377 if (line.clock_type != CLOCK_EXT && wanxl_ioctl()
378 line.clock_type != CLOCK_TXFROMRX) wanxl_ioctl()
384 get_status(port)->clocking = line.clock_type; wanxl_ioctl()
H A Dixp4xx_hss.c266 unsigned int clock_type, clock_rate, loopback; member in struct:port
403 if (port->clock_type == CLOCK_INT) hss_config()
1265 new_line.clock_type = port->clock_type; hss_hdlc_ioctl()
1279 clk = new_line.clock_type; hss_hdlc_ioctl()
1289 port->clock_type = clk; /* Update settings */ hss_hdlc_ioctl()
1355 port->clock_type = CLOCK_EXT; hss_init_one()
H A Dfarsync.c1910 switch (sync.clock_type) { fst_set_iface()
1969 sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == fst_get_iface()
H A Ddscc4.c998 if (settings->loopback && (settings->clock_type != CLOCK_INT)) { dscc4_loopback_check()
/linux-4.4.14/sound/pci/pcxhr/
H A Dpcxhr_mix22.h32 enum pcxhr_clock_type clock_type,
H A Dpcxhr_mix22.c416 enum pcxhr_clock_type clock_type, hr222_get_external_clock()
423 if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) { hr222_get_external_clock()
429 } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) { hr222_get_external_clock()
438 clock_type); hr222_get_external_clock()
444 "get_external_clock(%d) = 0 Hz\n", clock_type); hr222_get_external_clock()
415 hr222_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, int *sample_rate) hr222_get_external_clock() argument
H A Dpcxhr.h210 enum pcxhr_clock_type clock_type,
H A Dpcxhr.c427 enum pcxhr_clock_type clock_type, pcxhr_sub_get_external_clock()
434 switch (clock_type) { pcxhr_sub_get_external_clock()
490 enum pcxhr_clock_type clock_type, pcxhr_get_external_clock()
494 return hr222_get_external_clock(mgr, clock_type, pcxhr_get_external_clock()
497 return pcxhr_sub_get_external_clock(mgr, clock_type, pcxhr_get_external_clock()
426 pcxhr_sub_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, int *sample_rate) pcxhr_sub_get_external_clock() argument
489 pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, int *sample_rate) pcxhr_get_external_clock() argument
/linux-4.4.14/arch/x86/platform/uv/
H A Dbios_uv.c160 s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) uv_bios_freq_base() argument
162 return uv_bios_call(UV_BIOS_FREQ_BASE, clock_type, uv_bios_freq_base()
/linux-4.4.14/arch/arm/mach-ixp4xx/include/mach/
H A Dplatform.h108 int (*set_clock)(int port, unsigned int clock_type);
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.h152 u8 clock_type,
H A Damdgpu_atombios.c932 u8 clock_type, amdgpu_atombios_get_clock_dividers()
960 args.v6_in.ulClock.ulComputeClockFlag = clock_type; amdgpu_atombios_get_clock_dividers()
931 amdgpu_atombios_get_clock_dividers(struct amdgpu_device *adev, u8 clock_type, u32 clock, bool strobe_mode, struct atom_clock_dividers *dividers) amdgpu_atombios_get_clock_dividers() argument
/linux-4.4.14/arch/arm/mach-ixp4xx/
H A Dgoramo_mlr.c132 static int hss_set_clock(int port, unsigned int clock_type) hss_set_clock() argument
136 switch (clock_type) { hss_set_clock()
/linux-4.4.14/arch/mips/cavium-octeon/
H A Docteon-platform.c103 const char *clock_type; octeon2_usb_clocks_start() local
117 "refclk-type", &clock_type); octeon2_usb_clocks_start()
119 if (!i && strcmp("crystal", clock_type) == 0) octeon2_usb_clocks_start()
/linux-4.4.14/drivers/video/fbdev/
H A Dsm501fb.c437 unsigned int clock_type; sm501fb_set_par_common() local
448 clock_type = SM501_CLOCK_V2XCLK; sm501fb_set_par_common()
454 clock_type = SM501_CLOCK_P2XCLK; sm501fb_set_par_common()
461 clock_type = 0; sm501fb_set_par_common()
507 sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type, sm501fb_set_par_common()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_atombios.c2825 u8 clock_type, radeon_atom_get_clock_dividers()
2843 args.v1.ucAction = clock_type; radeon_atom_get_clock_dividers()
2857 args.v2.ucAction = clock_type; radeon_atom_get_clock_dividers()
2872 if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { radeon_atom_get_clock_dividers()
2873 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); radeon_atom_get_clock_dividers()
2891 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); radeon_atom_get_clock_dividers()
2922 args.v6_in.ulClock.ulComputeClockFlag = clock_type; radeon_atom_get_clock_dividers()
2824 radeon_atom_get_clock_dividers(struct radeon_device *rdev, u8 clock_type, u32 clock, bool strobe_mode, struct atom_clock_dividers *dividers) radeon_atom_get_clock_dividers() argument
H A Dradeon.h286 u8 clock_type,
/linux-4.4.14/drivers/tty/
H A Dsynclink_gt.c1647 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; hdlcdev_ioctl()
1648 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; hdlcdev_ioctl()
1649 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; hdlcdev_ioctl()
1650 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; hdlcdev_ioctl()
1651 default: new_line.clock_type = CLOCK_DEFAULT; hdlcdev_ioctl()
1668 switch (new_line.clock_type) hdlcdev_ioctl()
H A Dsynclinkmp.c1763 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; hdlcdev_ioctl()
1764 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; hdlcdev_ioctl()
1765 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; hdlcdev_ioctl()
1766 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; hdlcdev_ioctl()
1767 default: new_line.clock_type = CLOCK_DEFAULT; hdlcdev_ioctl()
1784 switch (new_line.clock_type) hdlcdev_ioctl()
H A Dsynclink.c7859 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; hdlcdev_ioctl()
7860 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; hdlcdev_ioctl()
7861 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; hdlcdev_ioctl()
7862 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; hdlcdev_ioctl()
7863 default: new_line.clock_type = CLOCK_DEFAULT; hdlcdev_ioctl()
7880 switch (new_line.clock_type) hdlcdev_ioctl()
/linux-4.4.14/drivers/char/pcmcia/
H A Dsynclink_cs.c4129 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; hdlcdev_ioctl()
4130 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; hdlcdev_ioctl()
4131 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; hdlcdev_ioctl()
4132 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; hdlcdev_ioctl()
4133 default: new_line.clock_type = CLOCK_DEFAULT; hdlcdev_ioctl()
4150 switch (new_line.clock_type) hdlcdev_ioctl()
/linux-4.4.14/drivers/staging/octeon-usb/
H A Docteon-hcd.c3586 const char *clock_type; octeon_usb_probe() local
3619 "refclk-type", &clock_type); octeon_usb_probe()
3621 if (!i && strcmp("crystal", clock_type) == 0) octeon_usb_probe()

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