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Searched refs:clk_hw_get_name (Results 1 – 31 of 31) sorted by relevance

/linux-4.4.14/drivers/clk/ti/
Dclockdomain.c51 clk_hw_get_name(hw)); in omap2_clkops_enable_clkdm()
57 clk_hw_get_name(hw)); in omap2_clkops_enable_clkdm()
61 __func__, clk_hw_get_name(hw)); in omap2_clkops_enable_clkdm()
67 __func__, clk_hw_get_name(hw), clk->clkdm_name, ret); in omap2_clkops_enable_clkdm()
89 clk_hw_get_name(hw)); in omap2_clkops_disable_clkdm()
95 clk_hw_get_name(hw)); in omap2_clkops_disable_clkdm()
99 __func__, clk_hw_get_name(hw)); in omap2_clkops_disable_clkdm()
Dclkt_dflt.c113 idlest_val, clk_hw_get_name(&clk->hw)); in _omap2_module_wait_ready()
219 __func__, clk_hw_get_name(hw), in omap2_dflt_clk_enable()
227 clk_hw_get_name(hw)); in omap2_dflt_clk_enable()
273 __func__, clk_hw_get_name(hw)); in omap2_dflt_clk_disable()
Ddpll3xxx.c72 clk_name = clk_hw_get_name(&clk->hw); in _omap3_wait_dpll_status()
148 pr_debug("clock: locking DPLL %s\n", clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_lock()
196 clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_bypass()
226 pr_debug("clock: stopping DPLL %s\n", clk_hw_get_name(&clk->hw)); in _omap3_noncore_dpll_stop()
432 __func__, clk_hw_get_name(hw), in omap3_noncore_dpll_enable()
569 clk_hw_get_name(hw), rate); in omap3_noncore_dpll_set_rate()
Dapll.c53 clk_name = clk_hw_get_name(&clk->hw); in dra7_apll_enable()
276 clk_hw_get_name(&clk->hw)); in omap2_apll_enable()
Dclkt_dpll.c305 clk_name = clk_hw_get_name(hw); in omap2_dpll_round_rate()
Ddivider.c112 clk_hw_get_name(hw)); in ti_clk_divider_recalc_rate()
/linux-4.4.14/drivers/clk/ux500/
Dclk-prcmu.c46 clk_hw_get_name(hw)); in clk_prcmu_unprepare()
104 (char *)clk_hw_get_name(hw), in clk_prcmu_opp_prepare()
108 __func__, clk_hw_get_name(hw)); in clk_prcmu_opp_prepare()
117 (char *)clk_hw_get_name(hw)); in clk_prcmu_opp_prepare()
132 clk_hw_get_name(hw)); in clk_prcmu_opp_unprepare()
138 (char *)clk_hw_get_name(hw)); in clk_prcmu_opp_unprepare()
154 __func__, clk_hw_get_name(hw)); in clk_prcmu_opp_volt_prepare()
177 clk_hw_get_name(hw)); in clk_prcmu_opp_volt_unprepare()
Dclk-sysctrl.c55 __func__, clk_hw_get_name(hw)); in clk_sysctrl_unprepare()
/linux-4.4.14/drivers/clk/
Dclk-xgene.c76 pr_debug("%s pll %s\n", clk_hw_get_name(hw), in xgene_clk_pll_is_enabled()
114 pr_debug("%s pll recalc rate %ld parent %ld\n", clk_hw_get_name(hw), in xgene_clk_pll_recalc_rate()
227 pr_debug("%s clock enabled\n", clk_hw_get_name(hw)); in xgene_clk_enable()
236 clk_hw_get_name(hw), &reg, in xgene_clk_enable()
247 clk_hw_get_name(hw), &reg, in xgene_clk_enable()
268 pr_debug("%s clock disabled\n", clk_hw_get_name(hw)); in xgene_clk_disable()
294 pr_debug("%s clock checking\n", clk_hw_get_name(hw)); in xgene_clk_is_enabled()
297 pr_debug("%s clock is %s\n", clk_hw_get_name(hw), in xgene_clk_is_enabled()
320 clk_hw_get_name(hw), in xgene_clk_recalc_rate()
326 clk_hw_get_name(hw), parent_rate, parent_rate); in xgene_clk_recalc_rate()
[all …]
Dclk-si5351.c442 __func__, clk_hw_get_name(hw), in si5351_pll_recalc_rate()
500 __func__, clk_hw_get_name(hw), a, b, c, in si5351_pll_round_rate()
524 __func__, clk_hw_get_name(hw), in si5351_pll_set_rate()
635 __func__, clk_hw_get_name(hw), in si5351_msynth_recalc_rate()
748 __func__, clk_hw_get_name(hw), a, b, c, divby4, in si5351_msynth_round_rate()
780 __func__, clk_hw_get_name(hw), in si5351_msynth_set_rate()
1045 __func__, clk_hw_get_name(hw), (1 << rdiv), in si5351_clkout_round_rate()
1096 __func__, clk_hw_get_name(hw), (1 << rdiv), in si5351_clkout_set_rate()
Dclk-divider.c131 clk_hw_get_name(hw)); in divider_recalc_rate()
Dclk.c281 const char *clk_hw_get_name(const struct clk_hw *hw) in clk_hw_get_name() function
285 EXPORT_SYMBOL_GPL(clk_hw_get_name);
/linux-4.4.14/drivers/clk/berlin/
Dberlin2-pll.c64 pr_warn("%s has zero rfdiv\n", clk_hw_get_name(hw)); in berlin2_pll_recalc_rate()
73 clk_hw_get_name(hw), vcodivsel); in berlin2_pll_recalc_rate()
/linux-4.4.14/drivers/clk/rockchip/
Dclk-pll.c160 clk_hw_get_name(hw)); in rockchip_rk3066_pll_recalc_rate()
247 __func__, clk_hw_get_name(hw), old_rate, drate, prate); in rockchip_rk3066_pll_set_rate()
253 drate, clk_hw_get_name(hw)); in rockchip_rk3066_pll_set_rate()
307 __func__, clk_hw_get_name(hw), drate, rate->nr, cur.nr, in rockchip_rk3066_pll_init()
317 __func__, clk_hw_get_name(hw)); in rockchip_rk3066_pll_init()
Dclk-inverter.c53 __func__, degrees, clk_hw_get_name(hw)); in rockchip_inv_set_phase()
Dclk-mmc-phase.c129 clk_hw_get_name(hw), degrees, delay_num, in rockchip_mmc_set_phase()
/linux-4.4.14/drivers/clk/st/
Dclkgen-fsyn.c516 clk_hw_get_name(hw), __func__); in quadfs_pll_fs660c32_recalc_rate()
561 __func__, clk_hw_get_name(hw), in quadfs_pll_fs660c32_round_rate()
584 __func__, clk_hw_get_name(hw), in quadfs_pll_fs660c32_set_rate()
748 pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); in quadfs_fsynth_enable()
773 pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); in quadfs_fsynth_disable()
790 __func__, clk_hw_get_name(hw), nsb); in quadfs_fsynth_is_enabled()
949 clk_hw_get_name(hw), __func__); in quadfs_recalc_rate()
952 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in quadfs_recalc_rate()
965 __func__, clk_hw_get_name(hw), in quadfs_round_rate()
Dclk-flexgen.c48 pr_debug("%s: flexgen output enabled\n", clk_hw_get_name(hw)); in flexgen_enable()
62 pr_debug("%s: flexgen output disabled\n", clk_hw_get_name(hw)); in flexgen_disable()
Dclkgen-pll.c434 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in recalc_stm_pll800c65()
459 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in recalc_stm_pll1600c65()
542 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in recalc_stm_pll3200c32()
633 pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); in recalc_stm_pll1200c32()
Dclkgen-mux.c143 __func__, clk_hw_get_name(hw)); in clkgena_divmux_get_parent()
/linux-4.4.14/drivers/clk/samsung/
Dclk-pll.c185 drate, clk_hw_get_name(hw)); in samsung_pll35xx_set_rate()
293 drate, clk_hw_get_name(hw)); in samsung_pll36xx_set_rate()
408 drate, clk_hw_get_name(hw)); in samsung_pll45xx_set_rate()
460 __func__, clk_hw_get_name(hw)); in samsung_pll45xx_set_rate()
559 drate, clk_hw_get_name(hw)); in samsung_pll46xx_set_rate()
619 __func__, clk_hw_get_name(hw)); in samsung_pll46xx_set_rate()
777 drate, clk_hw_get_name(hw)); in samsung_s3c2410_pll_set_rate()
1018 drate, clk_hw_get_name(hw)); in samsung_pll2550xx_set_rate()
1116 drate, clk_hw_get_name(hw)); in samsung_pll2650xx_set_rate()
/linux-4.4.14/drivers/clk/qcom/
Dclk-branch.c78 const char *name = clk_hw_get_name(&br->clkr.hw); in clk_branch_wait()
Dclk-rcg2.c83 __func__, clk_hw_get_name(hw)); in clk_rcg2_get_parent()
92 const char *name = clk_hw_get_name(hw); in update_config()
306 const char *name = clk_hw_get_name(hw); in clk_rcg2_shared_force_enable()
Dclk-pll.c197 const char *name = clk_hw_get_name(&pll->clkr.hw); in wait_for_pll()
Dclk-rcg.c62 __func__, clk_hw_get_name(hw)); in clk_rcg_get_parent()
98 __func__, clk_hw_get_name(hw)); in clk_dyn_rcg_get_parent()
/linux-4.4.14/drivers/clk/pistachio/
Dclk-pll.c203 const char *name = clk_hw_get_name(hw); in pll_gf40lp_frac_set_rate()
360 const char *name = clk_hw_get_name(hw); in pll_gf40lp_laint_set_rate()
/linux-4.4.14/drivers/clk/shmobile/
Dclk-div6.c142 __func__, clk_hw_get_name(hw), hw_index); in cpg_div6_clock_get_parent()
/linux-4.4.14/drivers/clk/bcm/
Dclk-bcm2835.c923 clk_hw_get_name(hw)); in bcm2835_pll_on()
963 clk_hw_get_name(hw), rate, in bcm2835_pll_set_rate()
1247 clk_hw_get_name(&clock->hw)); in bcm2835_clock_wait_busy()
/linux-4.4.14/drivers/clk/tegra/
Dclk-pll.c267 clk_hw_get_name(&pll->hw)); in clk_pll_wait_for_lock()
598 __func__, clk_hw_get_name(hw), in clk_pll_set_rate()
608 clk_hw_get_name(hw), rate); in clk_pll_set_rate()
666 clk_hw_get_name(hw)); in clk_pll_recalc_rate()
/linux-4.4.14/include/linux/
Dclk-provider.h647 const char *clk_hw_get_name(const struct clk_hw *hw);
/linux-4.4.14/drivers/clk/mmp/
Dclk-mix.c184 __func__, clk_hw_get_name(&mix->hw)); in _set_rate()