| /linux-4.4.14/drivers/cpufreq/ |
| D | cris-artpec3-cpufreq.c | 25 reg_clkgen_rw_clk_ctrl clk_ctrl; in cris_freq_get_cpu_frequency() local
26 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in cris_freq_get_cpu_frequency()
27 return clk_ctrl.pll ? 200000 : 6000; in cris_freq_get_cpu_frequency()
32 reg_clkgen_rw_clk_ctrl clk_ctrl; in cris_freq_target() local
33 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in cris_freq_target()
40 clk_ctrl.pll = 1; in cris_freq_target()
42 clk_ctrl.pll = 0; in cris_freq_target()
43 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); in cris_freq_target()
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| D | cris-etraxfs-cpufreq.c | 25 reg_config_rw_clk_ctrl clk_ctrl; in cris_freq_get_cpu_frequency() local
26 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); in cris_freq_get_cpu_frequency()
27 return clk_ctrl.pll ? 200000 : 6000; in cris_freq_get_cpu_frequency()
32 reg_config_rw_clk_ctrl clk_ctrl; in cris_freq_target() local
33 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); in cris_freq_target()
40 clk_ctrl.pll = 1; in cris_freq_target()
42 clk_ctrl.pll = 0; in cris_freq_target()
43 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl); in cris_freq_target()
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| /linux-4.4.14/arch/mips/ath79/ |
| D | clock.c | 247 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
314 clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_clocks_init()
316 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
319 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) in ar934x_clocks_init()
321 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) in ar934x_clocks_init()
326 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
329 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) in ar934x_clocks_init()
331 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) in ar934x_clocks_init()
336 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
339 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) in ar934x_clocks_init()
[all …]
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| /linux-4.4.14/arch/cris/arch-v32/mach-a3/ |
| D | dma.c | 23 reg_clkgen_rw_clk_ctrl clk_ctrl; in crisv32_request_dma() local
47 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in crisv32_request_dma()
53 clk_ctrl.dma0_1_eth = 1; in crisv32_request_dma()
57 clk_ctrl.dma2_3_strcop = 1; in crisv32_request_dma()
61 clk_ctrl.dma4_5_iop = 1; in crisv32_request_dma()
65 clk_ctrl.sser_ser_dma6_7 = 1; in crisv32_request_dma()
69 clk_ctrl.dma9_11 = 1; in crisv32_request_dma()
173 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); in crisv32_request_dma()
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| D | pinmux.c | 89 reg_clkgen_rw_clk_ctrl clk_ctrl; in crisv32_pinmux_alloc_fixed() local
99 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in crisv32_pinmux_alloc_fixed()
103 clk_ctrl.eth = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
104 clk_ctrl.dma0_1_eth = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
114 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
119 clk_ctrl.ccd_tg_100 = clk_ctrl.ccd_tg_200 = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
125 clk_ctrl.strdma0_2_video = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
130 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
135 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
140 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; in crisv32_pinmux_alloc_fixed()
[all …]
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| /linux-4.4.14/arch/cris/arch-v32/mach-fs/ |
| D | dma.c | 24 reg_config_rw_clk_ctrl clk_ctrl; in crisv32_request_dma() local
49 clk_ctrl = REG_RD(config, regi_config, rw_clk_ctrl); in crisv32_request_dma()
55 clk_ctrl.dma01_eth0 = 1; in crisv32_request_dma()
59 clk_ctrl.dma23 = 1; in crisv32_request_dma()
63 clk_ctrl.dma45 = 1; in crisv32_request_dma()
67 clk_ctrl.dma67 = 1; in crisv32_request_dma()
71 clk_ctrl.dma89_strcop = 1; in crisv32_request_dma()
218 REG_WR(config, regi_config, rw_clk_ctrl, clk_ctrl); in crisv32_request_dma()
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| /linux-4.4.14/include/linux/platform_data/ |
| D | net-cw1200.h | 21 int (*clk_ctrl)(const struct cw1200_platform_data_spi *pdata, member
38 int (*clk_ctrl)(const struct cw1200_platform_data_sdio *pdata, member
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| /linux-4.4.14/arch/cris/boot/compressed/ |
| D | misc.c | 291 reg_clkgen_rw_clk_ctrl clk_ctrl; in decompress_kernel() local
295 clk_ctrl = REG_RD(clkgen, regi_clkgen, rw_clk_ctrl); in decompress_kernel()
296 clk_ctrl.sser_ser_dma6_7 = regk_clkgen_yes; in decompress_kernel()
297 REG_WR(clkgen, regi_clkgen, rw_clk_ctrl, clk_ctrl); in decompress_kernel()
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| /linux-4.4.14/drivers/net/wireless/cw1200/ |
| D | cw1200_sdio.c | 199 if (pdata->clk_ctrl) in cw1200_sdio_off()
200 pdata->clk_ctrl(pdata, false); in cw1200_sdio_off()
228 if (pdata->clk_ctrl) { in cw1200_sdio_on()
229 if (pdata->clk_ctrl(pdata, true)) { in cw1200_sdio_on()
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| D | cw1200_spi.c | 295 if (pdata->clk_ctrl) in cw1200_spi_off()
296 pdata->clk_ctrl(pdata, false); in cw1200_spi_off()
324 if (pdata->clk_ctrl) { in cw1200_spi_on()
325 if (pdata->clk_ctrl(pdata, true)) { in cw1200_spi_on()
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| /linux-4.4.14/drivers/clk/zynq/ |
| D | clkc.c | 187 const char *clk_name1, void __iomem *clk_ctrl, in zynq_clk_register_periph_clk() argument
204 CLK_SET_RATE_NO_REPARENT, clk_ctrl, 4, 2, 0, lock); in zynq_clk_register_periph_clk()
206 clk = clk_register_divider(NULL, div_name, mux_name, 0, clk_ctrl, 8, 6, in zynq_clk_register_periph_clk()
210 CLK_SET_RATE_PARENT, clk_ctrl, 0, 0, lock); in zynq_clk_register_periph_clk()
213 CLK_SET_RATE_PARENT, clk_ctrl, 1, 0, lock); in zynq_clk_register_periph_clk()
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| /linux-4.4.14/drivers/clk/bcm/ |
| D | clk-iproc.h | 191 const struct iproc_clk_ctrl *clk_ctrl,
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| D | clk-iproc-pll.c | 593 const struct iproc_clk_ctrl *clk_ctrl, in iproc_pll_clk_setup() argument
603 if (WARN_ON(!pll_ctrl) || WARN_ON(!clk_ctrl)) in iproc_pll_clk_setup()
687 iclk->ctrl = &clk_ctrl[i]; in iproc_pll_clk_setup()
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