Lines Matching refs:clk_ctrl
247 u32 pll, out_div, ref_div, nint, nfrac, frac, clk_ctrl, postdiv; in ar934x_clocks_init() local
314 clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_clocks_init()
316 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & in ar934x_clocks_init()
319 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_PLL_BYPASS) in ar934x_clocks_init()
321 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_CPUCLK_FROM_CPUPLL) in ar934x_clocks_init()
326 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_clocks_init()
329 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDR_PLL_BYPASS) in ar934x_clocks_init()
331 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_DDRCLK_FROM_DDRPLL) in ar934x_clocks_init()
336 postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_POST_DIV_SHIFT) & in ar934x_clocks_init()
339 if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHB_PLL_BYPASS) in ar934x_clocks_init()
341 else if (clk_ctrl & AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL) in ar934x_clocks_init()
363 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca955x_clocks_init() local
401 clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); in qca955x_clocks_init()
403 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & in qca955x_clocks_init()
406 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca955x_clocks_init()
408 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPUCLK_FROM_CPUPLL) in qca955x_clocks_init()
413 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in qca955x_clocks_init()
416 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca955x_clocks_init()
418 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDRCLK_FROM_DDRPLL) in qca955x_clocks_init()
423 postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_AHB_POST_DIV_SHIFT) & in qca955x_clocks_init()
426 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca955x_clocks_init()
428 else if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL) in qca955x_clocks_init()