/linux-4.4.14/Documentation/block/ |
D | writeback_cache_control.txt | 9 write back caches. That means the devices signal I/O completion to the 60 devices with volatile caches need to implement the support for these 67 For devices that do not support volatile write caches there is no driver 70 requests that have a payload. For devices with volatile write caches the 71 driver needs to tell the block layer that it supports flushing caches by
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D | 00-INDEX | 28 - Control of volatile write back caches
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D | biodoc.txt | 102 Sophisticated devices with large built-in caches, intelligent i/o scheduling
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/linux-4.4.14/arch/arm/boot/compressed/ |
D | head-xscale.S | 27 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches 29 @ disabling MMU and caches
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/linux-4.4.14/arch/arm/mm/ |
D | proc-arm720.S | 60 mcr p15, 0, r0, c1, c0, 0 @ disable caches 122 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches 150 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
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D | proc-sa110.S | 52 mcr p15, 0, r0, c1, c0, 0 @ disable caches 68 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 165 mcr p15, 0, r10, c7, c7 @ invalidate I,D caches on v4
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D | proc-fa526.S | 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 63 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 142 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm926.S | 67 mcr p15, 0, r0, c1, c0, 0 @ disable caches 83 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 418 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 431 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 439 mov r0, #4 @ disable write-back on caches explicitly
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D | proc-sa1100.S | 60 mcr p15, 0, r0, c1, c0, 0 @ disable caches 76 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 204 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm920.S | 75 mcr p15, 0, r0, c1, c0, 0 @ disable caches 91 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 403 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 416 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-mohawk.S | 57 mcr p15, 0, r0, c1, c0, 0 @ disable caches 75 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 370 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 389 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches
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D | proc-arm740.S | 44 mcr p15, 0, r0, c1, c0, 0 @ disable caches 66 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
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D | proc-arm925.S | 98 mcr p15, 0, r0, c1, c0, 0 @ disable caches 123 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 450 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 457 mov r0, #4 @ disable write-back on caches explicitly
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D | proc-arm922.S | 77 mcr p15, 0, r0, c1, c0, 0 @ disable caches 93 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 394 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm1020e.S | 83 mcr p15, 0, r0, c1, c0, 0 @ disable caches 99 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 429 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm1026.S | 74 mcr p15, 0, r0, c1, c0, 0 @ disable caches 90 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 402 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-arm1022.S | 74 mcr p15, 0, r0, c1, c0, 0 @ disable caches 90 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 413 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-xsc3.S | 95 mcr p15, 0, r0, c1, c0, 0 @ disable caches 116 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB 433 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 453 mcr p15, 0, ip, c7, c7, 0 @ invalidate L1 caches and BTB
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D | proc-arm1020.S | 83 mcr p15, 0, r0, c1, c0, 0 @ disable caches 99 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 447 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-feroceon.S | 88 mcr p15, 0, r0, c1, c0, 0 @ disable caches 104 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches 533 mcr p15, 0, ip, c7, c7, 0 @ invalidate I+D caches 546 mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4
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D | proc-xscale.S | 130 mcr p15, 0, r0, c1, c0, 0 @ disable caches 158 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB 549 mcr p15, 0, ip, c7, c7, 0 @ invalidate I & D caches, BTB 563 mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
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D | pv-fixup-asm.S | 26 bic ip, r8, #CR_M @ disable caches and MMU
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D | proc-v6.S | 45 mcr p15, 0, r0, c1, c0, 0 @ disable caches
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D | proc-arm940.S | 43 mcr p15, 0, r0, c1, c0, 0 @ disable caches
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D | proc-arm946.S | 50 mcr p15, 0, r0, c1, c0, 0 @ disable caches
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D | proc-v7.S | 36 mcr p15, 0, r0, c1, c0, 0 @ disable caches
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D | Kconfig | 103 instruction and data caches. It is used in Altera's 122 different instruction and data caches. It is used in TI's OMAP
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/linux-4.4.14/drivers/staging/android/ |
D | TODO | 19 which want to manage caches themselves and which indicates whether cpu caches
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/linux-4.4.14/Documentation/filesystems/nfs/ |
D | rpc-cache.txt | 8 a wide variety of values to be caches. 10 There are a number of caches that are similar in structure though 12 of common code for managing these caches. 14 Examples of caches that are likely to be needed are: 92 includes it on a list of caches that will be regularly
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D | pnfs.txt | 4 The are several inter-related caches. We have layouts which can
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/linux-4.4.14/drivers/scsi/qla2xxx/ |
D | Kconfig | 25 Upon request, the driver caches the firmware image until
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/linux-4.4.14/drivers/staging/lustre/lustre/obdclass/ |
D | lu_object.c | 1920 int lu_kmem_init(struct lu_kmem_descr *caches) in lu_kmem_init() argument 1923 struct lu_kmem_descr *iter = caches; in lu_kmem_init() 1932 lu_kmem_fini(caches); in lu_kmem_init() 1944 void lu_kmem_fini(struct lu_kmem_descr *caches) in lu_kmem_fini() argument 1946 for (; caches->ckd_cache != NULL; ++caches) { in lu_kmem_fini() 1947 kmem_cache_destroy(*caches->ckd_cache); in lu_kmem_fini() 1948 *caches->ckd_cache = NULL; in lu_kmem_fini()
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/linux-4.4.14/tools/testing/selftests/zram/ |
D | README | 9 use as swap disks, various caches under /var and maybe many more :)
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/linux-4.4.14/fs/coda/ |
D | Kconfig | 11 persistent client caches and write back caching.
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/linux-4.4.14/Documentation/ |
D | percpu-rw-semaphore.txt | 9 is bouncing between L1 caches of the cores, causing performance
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D | cachetlb.txt | 130 us to properly handle systems whose caches are strict and require 138 indexed caches which must be flushed when virtual-->physical 140 indexed physically tagged caches of IA32 processors have no need to 141 implement these interfaces since the caches are fully synchronized 149 the caches. That is, after running, there will be no cache 158 the caches. That is, after running, there will be no cache 165 optimizations for VIPT caches.
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D | dma-buf-sharing.txt | 246 1. Prepare access, which invalidate any necessary caches and make the object 249 3. Finish access, which will flush any necessary cpu caches and free reserved 392 leaving the cpu domain and flushing caches at fault time. Note that all the 448 - If an exporter needs to manually flush caches and hence needs to fake
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D | DMA-attributes.txt | 81 to 'device' domain, what synchronizes CPU caches for the given region
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D | memory-barriers.txt | 559 machines with split caches, so that, for example, one cache bank processes 2595 a certain extent by the caches that lie between CPUs and memory, and by the 2599 caches goes, the memory system has to include the CPU's caches, and memory 2655 caches are expected to be coherent, there's no guarantee that that coherency 2662 has a pair of parallel data caches (CPU 1 has A/B, and CPU 2 has C/D): 2704 between them to guarantee that they will appear to reach that CPU's caches in 2718 the local CPU's caches have apparently been updated in the correct order. But 2728 cacheline holding p may get updated in one of the second CPU's caches whilst 2730 CPU's caches by some other cache event: 2780 Other CPUs may also have split caches, but must coordinate between the various [all …]
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D | bcache.txt | 76 Cache devices are managed as sets; multiple caches per set isn't supported yet 425 purposes (i.e. testing how different size caches affect your hit rate), but
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D | robust-futexes.txt | 67 destroying the CPU's L1 and L2 caches!
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D | kmemcheck.txt | 203 kmemcheck in such a way that the slab caches which are under SLUB debugging 211 slab cache, and with kmemcheck tracking all the other caches. This is advanced
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D | memory-hotplug.txt | 303 page caches. For offlining a memory block by migration, the kernel has to
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D | DMA-API-HOWTO.txt | 135 sharing problems (data corruption) on CPUs with DMA-incoherent caches. 376 Also, systems with caches that aren't DMA-coherent will work better
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D | edac.txt | 40 Some architectures have ECC detectors for L1, L2 and L3 caches,
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D | kernel-parameters.txt | 2389 caches in the slab allocator. Saves per-node memory,
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/linux-4.4.14/arch/unicore32/mm/ |
D | proc-ucv2.S | 49 movc p0.c1, ip, #0 @ disable caches and mmu
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/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/ |
D | pamu.txt | 63 second is the number of "ways". For direct-mapped caches, 69 second is the number of "ways". For direct-mapped caches,
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/linux-4.4.14/Documentation/arm64/ |
D | booting.txt | 157 coherent masters with caches enabled, this will typically require 159 System caches which respect the architected cache maintenance by VA 161 System caches which do not respect architected cache maintenance by VA 198 The requirements described above for CPU mode, caches, MMUs, architected
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/linux-4.4.14/Documentation/hwmon/ |
D | adc128d818 | 38 caches the alarm status for each sensor until it is at least reported
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D | lm75 | 77 The driver caches the values for a period varying between 1 second for the
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/linux-4.4.14/tools/perf/Documentation/ |
D | perf-buildid-cache.txt | 43 Purge all cached binaries including older caches which have specified
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/linux-4.4.14/fs/fscache/ |
D | Kconfig | 7 Different sorts of caches can be plugged in, depending on the
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/linux-4.4.14/Documentation/filesystems/ |
D | 9p.txt | 71 cache=mode specifies a caching policy. By default, no caches are used. 134 /sys/fs/9p/caches. (applies only to cache=fscache)
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D | dax.txt | 89 mapped caches such as ARM, MIPS and SPARC.
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D | squashfs.txt | 168 larger), the code implements an index cache that caches the mapping from 244 recently accessed data Squashfs uses two small metadata and fragment caches.
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D | tmpfs.txt | 8 tmpfs puts everything into the kernel internal caches and grows and
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D | ramfs-rootfs-initramfs.txt | 45 unnecessary work for the CPU, and pollutes the CPU caches. (There are tricks 49 since all file access goes through the page and dentry caches. The RAM
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D | overlayfs.txt | 111 will each have separate caches. A seekdir to the start of the
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D | ext4.txt | 191 of journal commits, making volatile disk write caches
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D | proc.txt | 902 SReclaimable: Part of Slab, that might be reclaimed, such as caches
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/linux-4.4.14/Documentation/vm/ |
D | slub.txt | 6 slab caches. SLUB always includes full debugging but it is off by default. 45 O Switch debugging off for caches that would have 66 a result of storing the metadata (for example, caches with PAGE_SIZE object 69 switch off debugging for such caches by default, use
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D | numa | 26 is handled in hardware by the processor caches and/or the system interconnect.
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D | cleancache.txt | 272 memory hungry caches like web browsers. (Jamie Lokier)
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/linux-4.4.14/drivers/staging/lustre/lustre/include/ |
D | lu_object.h | 1299 int lu_kmem_init(struct lu_kmem_descr *caches); 1300 void lu_kmem_fini(struct lu_kmem_descr *caches);
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/linux-4.4.14/security/keys/ |
D | Kconfig | 46 (for example Kerberos ticket caches). The data may be stored out to
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/linux-4.4.14/arch/unicore32/kernel/ |
D | sleep.S | 172 movc p0.c5, r1, #28 @ invalidate I & D caches, BTB
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/linux-4.4.14/Documentation/powerpc/ |
D | cpu_features.txt | 10 split instruction and data caches, and if the CPU supports the DOZE and NAP
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/linux-4.4.14/arch/frv/kernel/ |
D | cmode.S | 111 # (5) Flush the content of all caches by the DCEF instruction.
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D | head.S | 48 # invalidate and disable both of the caches and turn off the memory access checking
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/linux-4.4.14/fs/cachefiles/ |
D | bind.c | 25 static int cachefiles_daemon_add_cache(struct cachefiles_cache *caches);
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/linux-4.4.14/arch/nios2/platform/ |
D | Kconfig.platform | 104 perfectly fine, even if the Nios II is configured with smaller caches.
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/linux-4.4.14/Documentation/mmc/ |
D | mmc-async-req.txt | 13 possible to prepare the caches for next job in parallel with an active
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/linux-4.4.14/Documentation/ABI/testing/ |
D | sysfs-devices-system-cpu | 177 All AMD processors with L3 caches provide this functionality. 262 - Data: cache that only caches data
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D | sysfs-kernel-slab | 19 The aliases file is read-only and specifies how many caches 424 caches that do not.
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/linux-4.4.14/Documentation/arm/ |
D | cluster-pm-race-avoidance.txt | 35 writing some hardware registers and invalidating large caches), other 190 caches). 350 down, for example by cleaning data caches and exiting
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D | vlocks.txt | 169 unable to enable their caches yet. This means that the
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/linux-4.4.14/arch/mn10300/kernel/ |
D | head.S | 93 # invalidate and enable both of the caches
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/linux-4.4.14/Documentation/filesystems/pohmelfs/ |
D | design_notes.txt | 8 metadata caches but is now evolving into a parallel distributed filesystem.
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/linux-4.4.14/Documentation/devicetree/bindings/arm/msm/ |
D | qcom,idle-state.txt | 49 modes. In a hierarchical power domain SoC, this means L2 and other caches can
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/linux-4.4.14/Documentation/filesystems/caching/ |
D | object.txt | 41 of multiple caches: 84 multiple caches, but currently, non-index objects may not. Objects of any type
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D | netfs-api.txt | 184 in the hierarchy may be stored in multiple caches. This function does not 306 subtrees to be bound to particular caches, the second step is to look up cache 352 may be created in several different caches independently at different times. 463 Firstly, the netfs should ask FS-Cache to examine the caches and read the 831 copies of it will be removed from all active caches in which it is present.
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D | fscache.txt | 132 caches.
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D | cachefiles.txt | 108 Specify a tag to FS-Cache to use in distinguishing multiple caches.
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D | backend-api.txt | 5 The FS-Cache system provides an API by which actual caches can be supplied to
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/linux-4.4.14/Documentation/cgroups/ |
D | memory.txt | 41 - accounting anonymous pages, file caches, swap caches usage and limiting them. 237 caches are dropped. But as mentioned above, global LRU can do swapout memory 401 caches, RSS and Active pages/Inactive pages are shown. 470 Because rmdir() moves all pages to parent, some out-of-use page caches can be 789 pressure, the system might be making swap, paging out active file caches,
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D | cpusets.txt | 316 then the kernel will spread some file system related slab caches, 333 or slab caches to ignore the task's NUMA mempolicy and be spread 355 PFA_SPREAD_SLAB, and appropriately marked slab caches will allocate
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/linux-4.4.14/Documentation/networking/ |
D | dns_resolver.txt | 105 The kernel maintains an internal keyring in which it caches looked up keys.
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/linux-4.4.14/fs/9p/ |
D | v9fs.c | 515 static struct kobj_attribute v9fs_attr_cache = __ATTR_RO(caches);
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/linux-4.4.14/Documentation/scheduler/ |
D | sched-nice-design.txt | 44 this was long ago when hardware was weaker and caches were smaller, and
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D | sched-design-CFS.txt | 124 caches but at the cost of interactivity. This is well suited for
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/linux-4.4.14/Documentation/usb/ |
D | dma.txt | 67 semantics of dma-coherent memory require either bypassing CPU caches
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/linux-4.4.14/arch/sh/mm/ |
D | Kconfig | 258 Selecting this option will configure the caches in write-through
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/linux-4.4.14/fs/squashfs/ |
D | Kconfig | 203 By default SquashFS caches the last 3 fragments read from
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/linux-4.4.14/Documentation/blockdev/ |
D | zram.txt | 10 use as swap disks, various caches under /var and maybe many more :)
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/linux-4.4.14/Documentation/sysctl/ |
D | vm.txt | 189 Writing to this will cause the kernel to drop clean caches, as well as 206 This file is not a means to control the growth of the various kernel caches 767 to retain dentry and inode caches. When vfs_cache_pressure=0, the kernel will
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/linux-4.4.14/fs/affs/ |
D | Changes | 262 - Extension block caches are now allocated on
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/linux-4.4.14/drivers/edac/ |
D | Kconfig | 346 Support for error detection and correction on the primary caches of
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/linux-4.4.14/Documentation/RCU/ |
D | rcu_dereference.txt | 60 interact directly with the hardware to flush instruction caches.
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/linux-4.4.14/arch/arc/ |
D | Kconfig | 225 Linux only supports same line lengths for I and D caches.
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/linux-4.4.14/Documentation/device-mapper/ |
D | cache.txt | 290 invalidation of larger caches. The cache must be in passthrough mode
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/linux-4.4.14/Documentation/hid/ |
D | hid-transport.txt | 152 Normally, HID core caches any device state so this request is not necessary
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/linux-4.4.14/Documentation/devicetree/bindings/arm/ |
D | idle-states.txt | 106 the worst case since it depends on the CPU operating conditions, ie caches
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/linux-4.4.14/Documentation/power/ |
D | swsusp.txt | 142 data and disk caches into "used memory" by saving them in
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/linux-4.4.14/Documentation/development-process/ |
D | 4.Coding | 123 That, in turn, creates pressure on the processor's memory caches, which can
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/linux-4.4.14/arch/mips/ |
D | Kconfig | 2115 # Support for a MIPS32 / MIPS64 style S-caches 2401 # caches such as R3000, SB1, R7000 or those that look like they're virtually
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/linux-4.4.14/init/ |
D | Kconfig | 1752 Per cpu partial caches accellerate objects allocation and freeing 1754 in the latency of the free. On overflow these caches will be cleared
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/linux-4.4.14/Documentation/filesystems/cifs/ |
D | README | 450 behavior which caches reads (readahead) and writes
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