Searched refs:aq (Results 1 - 22 of 22) sorted by relevance

/linux-4.4.14/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq.c55 hw->aq.asq.tail = I40E_VF_ATQT1; i40e_adminq_init_regs()
56 hw->aq.asq.head = I40E_VF_ATQH1; i40e_adminq_init_regs()
57 hw->aq.asq.len = I40E_VF_ATQLEN1; i40e_adminq_init_regs()
58 hw->aq.asq.bal = I40E_VF_ATQBAL1; i40e_adminq_init_regs()
59 hw->aq.asq.bah = I40E_VF_ATQBAH1; i40e_adminq_init_regs()
60 hw->aq.arq.tail = I40E_VF_ARQT1; i40e_adminq_init_regs()
61 hw->aq.arq.head = I40E_VF_ARQH1; i40e_adminq_init_regs()
62 hw->aq.arq.len = I40E_VF_ARQLEN1; i40e_adminq_init_regs()
63 hw->aq.arq.bal = I40E_VF_ARQBAL1; i40e_adminq_init_regs()
64 hw->aq.arq.bah = I40E_VF_ARQBAH1; i40e_adminq_init_regs()
66 hw->aq.asq.tail = I40E_PF_ATQT; i40e_adminq_init_regs()
67 hw->aq.asq.head = I40E_PF_ATQH; i40e_adminq_init_regs()
68 hw->aq.asq.len = I40E_PF_ATQLEN; i40e_adminq_init_regs()
69 hw->aq.asq.bal = I40E_PF_ATQBAL; i40e_adminq_init_regs()
70 hw->aq.asq.bah = I40E_PF_ATQBAH; i40e_adminq_init_regs()
71 hw->aq.arq.tail = I40E_PF_ARQT; i40e_adminq_init_regs()
72 hw->aq.arq.head = I40E_PF_ARQH; i40e_adminq_init_regs()
73 hw->aq.arq.len = I40E_PF_ARQLEN; i40e_adminq_init_regs()
74 hw->aq.arq.bal = I40E_PF_ARQBAL; i40e_adminq_init_regs()
75 hw->aq.arq.bah = I40E_PF_ARQBAH; i40e_adminq_init_regs()
87 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, i40e_alloc_adminq_asq_ring()
89 (hw->aq.num_asq_entries * i40e_alloc_adminq_asq_ring()
95 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, i40e_alloc_adminq_asq_ring()
96 (hw->aq.num_asq_entries * i40e_alloc_adminq_asq_ring()
99 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_alloc_adminq_asq_ring()
114 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, i40e_alloc_adminq_arq_ring()
116 (hw->aq.num_arq_entries * i40e_alloc_adminq_arq_ring()
132 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_free_adminq_asq()
144 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); i40e_free_adminq_arq()
163 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, i40e_alloc_arq_bufs()
164 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); i40e_alloc_arq_bufs()
167 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; i40e_alloc_arq_bufs()
170 for (i = 0; i < hw->aq.num_arq_entries; i++) { i40e_alloc_arq_bufs()
171 bi = &hw->aq.arq.r.arq_bi[i]; i40e_alloc_arq_bufs()
174 hw->aq.arq_buf_size, i40e_alloc_arq_bufs()
180 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); i40e_alloc_arq_bufs()
183 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) i40e_alloc_arq_bufs()
208 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); i40e_alloc_arq_bufs()
209 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); i40e_alloc_arq_bufs()
225 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, i40e_alloc_asq_bufs()
226 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); i40e_alloc_asq_bufs()
229 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; i40e_alloc_asq_bufs()
232 for (i = 0; i < hw->aq.num_asq_entries; i++) { i40e_alloc_asq_bufs()
233 bi = &hw->aq.asq.r.asq_bi[i]; i40e_alloc_asq_bufs()
236 hw->aq.asq_buf_size, i40e_alloc_asq_bufs()
248 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); i40e_alloc_asq_bufs()
249 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); i40e_alloc_asq_bufs()
263 for (i = 0; i < hw->aq.num_arq_entries; i++) i40e_free_arq_bufs()
264 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); i40e_free_arq_bufs()
267 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); i40e_free_arq_bufs()
270 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); i40e_free_arq_bufs()
282 for (i = 0; i < hw->aq.num_asq_entries; i++) i40e_free_asq_bufs()
283 if (hw->aq.asq.r.asq_bi[i].pa) i40e_free_asq_bufs()
284 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); i40e_free_asq_bufs()
287 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); i40e_free_asq_bufs()
290 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_free_asq_bufs()
293 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); i40e_free_asq_bufs()
308 wr32(hw, hw->aq.asq.head, 0); i40e_config_asq_regs()
309 wr32(hw, hw->aq.asq.tail, 0); i40e_config_asq_regs()
312 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | i40e_config_asq_regs()
314 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
315 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
318 reg = rd32(hw, hw->aq.asq.bal); i40e_config_asq_regs()
319 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) i40e_config_asq_regs()
337 wr32(hw, hw->aq.arq.head, 0); i40e_config_arq_regs()
338 wr32(hw, hw->aq.arq.tail, 0); i40e_config_arq_regs()
341 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | i40e_config_arq_regs()
343 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
344 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
347 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); i40e_config_arq_regs()
350 reg = rd32(hw, hw->aq.arq.bal); i40e_config_arq_regs()
351 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) i40e_config_arq_regs()
363 * in the hw->aq structure:
364 * - hw->aq.num_asq_entries
365 * - hw->aq.arq_buf_size
374 if (hw->aq.asq.count > 0) { i40e_init_asq()
381 if ((hw->aq.num_asq_entries == 0) || i40e_init_asq()
382 (hw->aq.asq_buf_size == 0)) { i40e_init_asq()
387 hw->aq.asq.next_to_use = 0; i40e_init_asq()
388 hw->aq.asq.next_to_clean = 0; i40e_init_asq()
406 hw->aq.asq.count = hw->aq.num_asq_entries; i40e_init_asq()
422 * in the hw->aq structure:
423 * - hw->aq.num_asq_entries
424 * - hw->aq.arq_buf_size
433 if (hw->aq.arq.count > 0) { i40e_init_arq()
440 if ((hw->aq.num_arq_entries == 0) || i40e_init_arq()
441 (hw->aq.arq_buf_size == 0)) { i40e_init_arq()
446 hw->aq.arq.next_to_use = 0; i40e_init_arq()
447 hw->aq.arq.next_to_clean = 0; i40e_init_arq()
465 hw->aq.arq.count = hw->aq.num_arq_entries; i40e_init_arq()
485 mutex_lock(&hw->aq.asq_mutex); i40e_shutdown_asq()
487 if (hw->aq.asq.count == 0) { i40e_shutdown_asq()
493 wr32(hw, hw->aq.asq.head, 0); i40e_shutdown_asq()
494 wr32(hw, hw->aq.asq.tail, 0); i40e_shutdown_asq()
495 wr32(hw, hw->aq.asq.len, 0); i40e_shutdown_asq()
496 wr32(hw, hw->aq.asq.bal, 0); i40e_shutdown_asq()
497 wr32(hw, hw->aq.asq.bah, 0); i40e_shutdown_asq()
499 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ i40e_shutdown_asq()
505 mutex_unlock(&hw->aq.asq_mutex); i40e_shutdown_asq()
519 mutex_lock(&hw->aq.arq_mutex); i40e_shutdown_arq()
521 if (hw->aq.arq.count == 0) { i40e_shutdown_arq()
527 wr32(hw, hw->aq.arq.head, 0); i40e_shutdown_arq()
528 wr32(hw, hw->aq.arq.tail, 0); i40e_shutdown_arq()
529 wr32(hw, hw->aq.arq.len, 0); i40e_shutdown_arq()
530 wr32(hw, hw->aq.arq.bal, 0); i40e_shutdown_arq()
531 wr32(hw, hw->aq.arq.bah, 0); i40e_shutdown_arq()
533 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ i40e_shutdown_arq()
539 mutex_unlock(&hw->aq.arq_mutex); i40e_shutdown_arq()
548 * in the hw->aq structure:
549 * - hw->aq.num_asq_entries
550 * - hw->aq.num_arq_entries
551 * - hw->aq.arq_buf_size
552 * - hw->aq.asq_buf_size
562 if ((hw->aq.num_arq_entries == 0) || i40e_init_adminq()
563 (hw->aq.num_asq_entries == 0) || i40e_init_adminq()
564 (hw->aq.arq_buf_size == 0) || i40e_init_adminq()
565 (hw->aq.asq_buf_size == 0)) { i40e_init_adminq()
574 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; i40e_init_adminq()
592 &hw->aq.fw_maj_ver, i40e_init_adminq()
593 &hw->aq.fw_min_ver, i40e_init_adminq()
594 &hw->aq.fw_build, i40e_init_adminq()
595 &hw->aq.api_maj_ver, i40e_init_adminq()
596 &hw->aq.api_min_ver, i40e_init_adminq()
620 if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { i40e_init_adminq()
627 hw->aq.nvm_release_on_done = false; i40e_init_adminq()
677 struct i40e_adminq_ring *asq = &(hw->aq.asq); i40e_clean_asq()
685 while (rd32(hw, hw->aq.asq.head) != ntc) { i40e_clean_asq()
687 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); i40e_clean_asq()
721 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; i40e_asq_done()
750 mutex_lock(&hw->aq.asq_mutex); i40e_asq_send_command()
752 if (hw->aq.asq.count == 0) { i40e_asq_send_command()
759 hw->aq.asq_last_status = I40E_AQ_RC_OK; i40e_asq_send_command()
761 val = rd32(hw, hw->aq.asq.head); i40e_asq_send_command()
762 if (val >= hw->aq.num_asq_entries) { i40e_asq_send_command()
769 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); i40e_asq_send_command()
791 if (buff_size > hw->aq.asq_buf_size) { i40e_asq_send_command()
824 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); i40e_asq_send_command()
831 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); i40e_asq_send_command()
849 (hw->aq.asq.next_to_use)++; i40e_asq_send_command()
850 if (hw->aq.asq.next_to_use == hw->aq.asq.count) i40e_asq_send_command()
851 hw->aq.asq.next_to_use = 0; i40e_asq_send_command()
853 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); i40e_asq_send_command()
869 } while (total_delay < hw->aq.asq_cmd_timeout); i40e_asq_send_command()
892 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; i40e_asq_send_command()
899 /* save writeback aq if requested */ i40e_asq_send_command()
913 mutex_unlock(&hw->aq.asq_mutex); i40e_asq_send_command()
948 u16 ntc = hw->aq.arq.next_to_clean; i40e_clean_arq_element()
957 mutex_lock(&hw->aq.arq_mutex); i40e_clean_arq_element()
959 if (hw->aq.arq.count == 0) { i40e_clean_arq_element()
967 ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK); i40e_clean_arq_element()
975 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); i40e_clean_arq_element()
981 hw->aq.arq_last_status = i40e_clean_arq_element()
986 hw->aq.arq_last_status); i40e_clean_arq_element()
993 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, i40e_clean_arq_element()
998 hw->aq.arq_buf_size); i40e_clean_arq_element()
1004 bi = &hw->aq.arq.r.arq_bi[ntc]; i40e_clean_arq_element()
1008 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) i40e_clean_arq_element()
1015 wr32(hw, hw->aq.arq.tail, ntc); i40e_clean_arq_element()
1018 if (ntc == hw->aq.num_arq_entries) i40e_clean_arq_element()
1020 hw->aq.arq.next_to_clean = ntc; i40e_clean_arq_element()
1021 hw->aq.arq.next_to_use = ntu; i40e_clean_arq_element()
1026 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); i40e_clean_arq_element()
1029 mutex_unlock(&hw->aq.arq_mutex); i40e_clean_arq_element()
1032 if (hw->aq.nvm_release_on_done) { i40e_clean_arq_element()
1034 hw->aq.nvm_release_on_done = false; i40e_clean_arq_element()
1057 hw->aq.asq.next_to_use = 0; i40e_resume_aq()
1058 hw->aq.asq.next_to_clean = 0; i40e_resume_aq()
1062 hw->aq.arq.next_to_use = 0; i40e_resume_aq()
1063 hw->aq.arq.next_to_clean = 0; i40e_resume_aq()
H A Di40e_nvm.c99 access, time_left, ret_code, hw->aq.asq_last_status); i40e_acquire_nvm()
121 time_left, ret_code, hw->aq.asq_last_status); i40e_acquire_nvm()
699 hw->aq.nvm_release_on_done); i40e_nvmupd_command()
770 hw->aq.asq_last_status); i40e_nvmupd_state_init()
781 hw->aq.asq_last_status); i40e_nvmupd_state_init()
795 hw->aq.asq_last_status); i40e_nvmupd_state_init()
801 hw->aq.nvm_release_on_done = true; i40e_nvmupd_state_init()
811 hw->aq.asq_last_status); i40e_nvmupd_state_init()
817 hw->aq.nvm_release_on_done = true; i40e_nvmupd_state_init()
827 hw->aq.asq_last_status); i40e_nvmupd_state_init()
841 hw->aq.asq_last_status); i40e_nvmupd_state_init()
845 *perrno = hw->aq.asq_last_status ? i40e_nvmupd_state_init()
847 hw->aq.asq_last_status) : i40e_nvmupd_state_init()
851 hw->aq.nvm_release_on_done = true; i40e_nvmupd_state_init()
949 *perrno = hw->aq.asq_last_status ? i40e_nvmupd_state_writing()
951 hw->aq.asq_last_status) : i40e_nvmupd_state_writing()
955 hw->aq.nvm_release_on_done = true; i40e_nvmupd_state_writing()
963 *perrno = hw->aq.asq_last_status ? i40e_nvmupd_state_writing()
965 hw->aq.asq_last_status) : i40e_nvmupd_state_writing()
976 *perrno = hw->aq.asq_last_status ? i40e_nvmupd_state_writing()
978 hw->aq.asq_last_status) : i40e_nvmupd_state_writing()
982 hw->aq.nvm_release_on_done = true; i40e_nvmupd_state_writing()
1002 if (status && (hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) && i40e_nvmupd_state_writing()
1005 u32 old_asq_status = hw->aq.asq_last_status; i40e_nvmupd_state_writing()
1018 hw->aq.asq_last_status); i40e_nvmupd_state_writing()
1020 hw->aq.asq_last_status = old_asq_status; i40e_nvmupd_state_writing()
1151 /* get the aq descriptor */ i40e_nvmupd_exec_aq()
1154 "NVMUPD: not enough aq desc bytes for exec, size %d < %d\n", i40e_nvmupd_exec_aq()
1167 hw->aq.asq_buf_size); i40e_nvmupd_exec_aq()
1187 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_nvmupd_exec_aq()
1188 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); i40e_nvmupd_exec_aq()
1295 "i40e_nvmupd_nvm_read status %d aq %d\n", i40e_nvmupd_nvm_read()
1296 status, hw->aq.asq_last_status); i40e_nvmupd_nvm_read()
1297 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); i40e_nvmupd_nvm_read()
1334 "i40e_nvmupd_nvm_erase status %d aq %d\n", i40e_nvmupd_nvm_erase()
1335 status, hw->aq.asq_last_status); i40e_nvmupd_nvm_erase()
1336 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); i40e_nvmupd_nvm_erase()
1375 "i40e_nvmupd_nvm_write status %d aq %d\n", i40e_nvmupd_nvm_write()
1376 status, hw->aq.asq_last_status); i40e_nvmupd_nvm_write()
1377 *perrno = i40e_aq_rc_to_posix(status, hw->aq.asq_last_status); i40e_nvmupd_nvm_write()
H A Di40e_dcb.c798 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) i40e_get_ieee_dcb_config()
818 if (((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver < 33)) || i40e_get_dcb_config()
819 (hw->aq.fw_maj_ver < 4)) i40e_get_dcb_config()
823 if ((hw->aq.fw_maj_ver == 4) && (hw->aq.fw_min_ver == 33)) { i40e_get_dcb_config()
848 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) i40e_get_dcb_config()
865 if (hw->aq.asq_last_status == I40E_AQ_RC_ENOENT) i40e_get_dcb_config()
H A Di40e_debugfs.c183 * (pf->hw.aq.num_arq_entries + pf->hw.aq.num_asq_entries)); i40e_dbg_dump_write()
193 * pf->hw.aq.num_asq_entries); i40e_dbg_dump_write()
194 memcpy(p, pf->hw.aq.asq.desc_buf.va, len); i40e_dbg_dump_write()
198 * pf->hw.aq.num_arq_entries); i40e_dbg_dump_write()
199 memcpy(p, pf->hw.aq.arq.desc_buf.va, len); i40e_dbg_dump_write()
745 ring = &(hw->aq.asq); i40e_dbg_dump_aq_desc()
758 ring = &(hw->aq.arq); i40e_dbg_dump_aq_desc()
1271 } else if (strncmp(&cmd_buf[10], "aq", 2) == 0) { i40e_dbg_command_write()
1278 dev_info(&pf->pdev->dev, "dump desc aq\n"); i40e_dbg_command_write()
1314 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1427 ret, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1588 desc->opcode, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1649 desc->opcode, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1759 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1770 __func__, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1788 __func__, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1796 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1820 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1848 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1867 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1878 pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1921 ret, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1932 ret, pf->hw.aq.asq_last_status); i40e_dbg_command_write()
1959 dev_info(&pf->pdev->dev, " dump desc aq\n"); i40e_dbg_command_write()
H A Di40e_main.c1938 filter_list_len = pf->hw.aq.asq_buf_size / i40e_sync_vsi_filters()
1972 aq_err = pf->hw.aq.asq_last_status; i40e_sync_vsi_filters()
1992 aq_err = pf->hw.aq.asq_last_status; i40e_sync_vsi_filters()
2009 filter_list_len = pf->hw.aq.asq_buf_size / i40e_sync_vsi_filters()
2046 aq_err = pf->hw.aq.asq_last_status; i40e_sync_vsi_filters()
2063 aq_err = pf->hw.aq.asq_last_status; i40e_sync_vsi_filters()
2074 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) && i40e_sync_vsi_filters()
2099 pf->hw.aq.asq_last_status)); i40e_sync_vsi_filters()
2130 ret, pf->hw.aq.asq_last_status); i40e_sync_vsi_filters()
2138 ret, pf->hw.aq.asq_last_status); i40e_sync_vsi_filters()
2148 pf->hw.aq.asq_last_status)); i40e_sync_vsi_filters()
2247 vsi->back->hw.aq.asq_last_status)); i40e_vlan_stripping_enable()
2278 vsi->back->hw.aq.asq_last_status)); i40e_vlan_stripping_disable()
2586 vsi->back->hw.aq.asq_last_status)); i40e_vsi_add_pvid()
4602 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_vsi_get_bw_info()
4613 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_vsi_get_bw_info()
4664 vsi->back->hw.aq.asq_last_status); i40e_vsi_configure_bw_alloc()
4799 vsi->back->hw.aq.asq_last_status)); i40e_vsi_config_tc()
4813 vsi->back->hw.aq.asq_last_status)); i40e_vsi_config_tc()
4856 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_veb_config_tc()
4866 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_veb_config_tc()
4955 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_resume_port_tx()
4977 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || i40e_init_pf_dcb()
4978 (pf->hw.aq.fw_maj_ver < 4)) i40e_init_pf_dcb()
5009 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_init_pf_dcb()
5632 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_handle_lldp_event()
6192 val = rd32(&pf->hw, pf->hw.aq.arq.len); i40e_clean_adminq_subtask()
6207 wr32(&pf->hw, pf->hw.aq.arq.len, val); i40e_clean_adminq_subtask()
6209 val = rd32(&pf->hw, pf->hw.aq.asq.len); i40e_clean_adminq_subtask()
6224 wr32(&pf->hw, pf->hw.aq.asq.len, val); i40e_clean_adminq_subtask()
6336 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_enable_pf_switch_lb()
6348 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_enable_pf_switch_lb()
6372 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_disable_pf_switch_lb()
6384 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_disable_pf_switch_lb()
6521 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) { i40e_get_capabilities()
6524 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) { i40e_get_capabilities()
6529 pf->hw.aq.asq_last_status)); i40e_get_capabilities()
6711 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_reset_and_rebuild()
6763 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_reset_and_rebuild()
6770 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_reset_and_rebuild()
6826 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || i40e_reset_and_rebuild()
6827 (pf->hw.aq.fw_maj_ver < 4)) { i40e_reset_and_rebuild()
6834 pf->hw.aq.asq_last_status)); i40e_reset_and_rebuild()
7022 pf->hw.aq.asq_last_status)); i40e_sync_vxlan_filters_subtask()
7808 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_config_rss_aq()
7821 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_config_rss_aq()
8011 last_aq_status = pf->hw.aq.asq_last_status; i40e_commit_npar_bw_setting()
8028 last_aq_status = pf->hw.aq.asq_last_status; i40e_commit_npar_bw_setting()
8042 last_aq_status = pf->hw.aq.asq_last_status; i40e_commit_npar_bw_setting()
8061 last_aq_status = pf->hw.aq.asq_last_status; i40e_commit_npar_bw_setting()
8768 * passes it down to the add_vsi aq command.
8801 pf->hw.aq.asq_last_status)); i40e_add_vsi()
8826 pf->hw.aq.asq_last_status)); i40e_add_vsi()
8847 pf->hw.aq.asq_last_status)); i40e_add_vsi()
8941 pf->hw.aq.asq_last_status)); i40e_add_vsi()
8997 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_add_vsi()
9421 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); i40e_veb_get_bw_info()
9431 i40e_aq_str(&pf->hw, hw->aq.asq_last_status)); i40e_veb_get_bw_info()
9628 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_add_veb()
9639 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_add_veb()
9647 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_add_veb()
9857 pf->hw.aq.asq_last_status)); i40e_fetch_switch_configuration()
9900 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_setup_pf_switch()
10278 hw->aq.num_arq_entries = I40E_AQ_LEN; i40e_probe()
10279 hw->aq.num_asq_entries = I40E_AQ_LEN; i40e_probe()
10280 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE; i40e_probe()
10281 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE; i40e_probe()
10301 mutex_init(&hw->aq.asq_mutex); i40e_probe()
10302 mutex_init(&hw->aq.arq_mutex); i40e_probe()
10308 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build, i40e_probe()
10309 hw->aq.api_maj_ver, hw->aq.api_min_ver, i40e_probe()
10318 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR && i40e_probe()
10319 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR) i40e_probe()
10322 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR || i40e_probe()
10323 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1)) i40e_probe()
10363 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) || i40e_probe()
10364 (pf->hw.aq.fw_maj_ver < 4)) { i40e_probe()
10465 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_probe()
10470 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_probe()
10475 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_probe()
10494 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_probe()
10496 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) || i40e_probe()
10497 (pf->hw.aq.fw_maj_ver < 4)) { i40e_probe()
10504 pf->hw.aq.asq_last_status)); i40e_probe()
10623 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_probe()
10631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status)); i40e_probe()
10749 mutex_destroy(&hw->aq.arq_mutex); i40e_remove()
10750 mutex_destroy(&hw->aq.asq_mutex); i40e_remove()
H A Di40e_ethtool.c743 /* make the aq call */ i40e_set_settings()
748 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_set_settings()
756 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_set_settings()
778 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_nway_reset()
892 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_set_pauseparam()
898 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_set_pauseparam()
904 i40e_aq_str(hw, hw->aq.asq_last_status)); i40e_set_pauseparam()
1009 ret_val, hw->aq.asq_last_status, errno, i40e_get_eeprom()
1027 ret_val, hw->aq.asq_last_status); i40e_get_eeprom()
1044 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { i40e_get_eeprom()
1050 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { i40e_get_eeprom()
1058 offset, ret_val, hw->aq.asq_last_status); i40e_get_eeprom()
1113 ret_val, hw->aq.asq_last_status, errno, i40e_set_eeprom()
H A Di40e_virtchnl_pf.c533 vf->vf_id, pf->hw.aq.asq_last_status); i40e_alloc_vsi_res()
1118 vf->vf_id, pf->hw.aq.asq_last_status); i40e_vc_send_msg_to_vf()
2197 ret, pf->hw.aq.asq_last_status); i40e_ndo_set_vf_port_vlan()
2214 vsi->back->hw.aq.asq_last_status); i40e_ndo_set_vf_port_vlan()
H A Di40e_common.c350 if (hw->aq.asq.len) i40e_check_asq_alive()
351 return !!(rd32(hw, hw->aq.asq.len) & i40e_check_asq_alive()
1606 if (hw->aq.asq_last_status == I40E_AQ_RC_EIO) i40e_aq_get_phy_capabilities()
1855 if ((hw->aq.fw_maj_ver < 4 || (hw->aq.fw_maj_ver == 4 && i40e_aq_get_link_info()
1856 hw->aq.fw_min_ver < 40)) && hw_link_info->phy_type == 0xE) i40e_aq_get_link_info()
2646 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) i40e_aq_request_resource()
H A Di40e_type.h529 struct i40e_adminq_info aq; member in struct:i40e_hw
H A Di40e_adminq_cmd.h122 /* aq commands */
/linux-4.4.14/drivers/net/ethernet/intel/i40evf/
H A Di40e_adminq.c53 hw->aq.asq.tail = I40E_VF_ATQT1; i40e_adminq_init_regs()
54 hw->aq.asq.head = I40E_VF_ATQH1; i40e_adminq_init_regs()
55 hw->aq.asq.len = I40E_VF_ATQLEN1; i40e_adminq_init_regs()
56 hw->aq.asq.bal = I40E_VF_ATQBAL1; i40e_adminq_init_regs()
57 hw->aq.asq.bah = I40E_VF_ATQBAH1; i40e_adminq_init_regs()
58 hw->aq.arq.tail = I40E_VF_ARQT1; i40e_adminq_init_regs()
59 hw->aq.arq.head = I40E_VF_ARQH1; i40e_adminq_init_regs()
60 hw->aq.arq.len = I40E_VF_ARQLEN1; i40e_adminq_init_regs()
61 hw->aq.arq.bal = I40E_VF_ARQBAL1; i40e_adminq_init_regs()
62 hw->aq.arq.bah = I40E_VF_ARQBAH1; i40e_adminq_init_regs()
74 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.asq.desc_buf, i40e_alloc_adminq_asq_ring()
76 (hw->aq.num_asq_entries * i40e_alloc_adminq_asq_ring()
82 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.cmd_buf, i40e_alloc_adminq_asq_ring()
83 (hw->aq.num_asq_entries * i40e_alloc_adminq_asq_ring()
86 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_alloc_adminq_asq_ring()
101 ret_code = i40e_allocate_dma_mem(hw, &hw->aq.arq.desc_buf, i40e_alloc_adminq_arq_ring()
103 (hw->aq.num_arq_entries * i40e_alloc_adminq_arq_ring()
119 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_free_adminq_asq()
131 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); i40e_free_adminq_arq()
150 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.arq.dma_head, i40e_alloc_arq_bufs()
151 (hw->aq.num_arq_entries * sizeof(struct i40e_dma_mem))); i40e_alloc_arq_bufs()
154 hw->aq.arq.r.arq_bi = (struct i40e_dma_mem *)hw->aq.arq.dma_head.va; i40e_alloc_arq_bufs()
157 for (i = 0; i < hw->aq.num_arq_entries; i++) { i40e_alloc_arq_bufs()
158 bi = &hw->aq.arq.r.arq_bi[i]; i40e_alloc_arq_bufs()
161 hw->aq.arq_buf_size, i40e_alloc_arq_bufs()
167 desc = I40E_ADMINQ_DESC(hw->aq.arq, i); i40e_alloc_arq_bufs()
170 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) i40e_alloc_arq_bufs()
195 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); i40e_alloc_arq_bufs()
196 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); i40e_alloc_arq_bufs()
212 ret_code = i40e_allocate_virt_mem(hw, &hw->aq.asq.dma_head, i40e_alloc_asq_bufs()
213 (hw->aq.num_asq_entries * sizeof(struct i40e_dma_mem))); i40e_alloc_asq_bufs()
216 hw->aq.asq.r.asq_bi = (struct i40e_dma_mem *)hw->aq.asq.dma_head.va; i40e_alloc_asq_bufs()
219 for (i = 0; i < hw->aq.num_asq_entries; i++) { i40e_alloc_asq_bufs()
220 bi = &hw->aq.asq.r.asq_bi[i]; i40e_alloc_asq_bufs()
223 hw->aq.asq_buf_size, i40e_alloc_asq_bufs()
235 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); i40e_alloc_asq_bufs()
236 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); i40e_alloc_asq_bufs()
250 for (i = 0; i < hw->aq.num_arq_entries; i++) i40e_free_arq_bufs()
251 i40e_free_dma_mem(hw, &hw->aq.arq.r.arq_bi[i]); i40e_free_arq_bufs()
254 i40e_free_dma_mem(hw, &hw->aq.arq.desc_buf); i40e_free_arq_bufs()
257 i40e_free_virt_mem(hw, &hw->aq.arq.dma_head); i40e_free_arq_bufs()
269 for (i = 0; i < hw->aq.num_asq_entries; i++) i40e_free_asq_bufs()
270 if (hw->aq.asq.r.asq_bi[i].pa) i40e_free_asq_bufs()
271 i40e_free_dma_mem(hw, &hw->aq.asq.r.asq_bi[i]); i40e_free_asq_bufs()
274 i40e_free_virt_mem(hw, &hw->aq.asq.cmd_buf); i40e_free_asq_bufs()
277 i40e_free_dma_mem(hw, &hw->aq.asq.desc_buf); i40e_free_asq_bufs()
280 i40e_free_virt_mem(hw, &hw->aq.asq.dma_head); i40e_free_asq_bufs()
295 wr32(hw, hw->aq.asq.head, 0); i40e_config_asq_regs()
296 wr32(hw, hw->aq.asq.tail, 0); i40e_config_asq_regs()
299 wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | i40e_config_asq_regs()
301 wr32(hw, hw->aq.asq.bal, lower_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
302 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
305 reg = rd32(hw, hw->aq.asq.bal); i40e_config_asq_regs()
306 if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa)) i40e_config_asq_regs()
324 wr32(hw, hw->aq.arq.head, 0); i40e_config_arq_regs()
325 wr32(hw, hw->aq.arq.tail, 0); i40e_config_arq_regs()
328 wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | i40e_config_arq_regs()
330 wr32(hw, hw->aq.arq.bal, lower_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
331 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
334 wr32(hw, hw->aq.arq.tail, hw->aq.num_arq_entries - 1); i40e_config_arq_regs()
337 reg = rd32(hw, hw->aq.arq.bal); i40e_config_arq_regs()
338 if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa)) i40e_config_arq_regs()
350 * in the hw->aq structure:
351 * - hw->aq.num_asq_entries
352 * - hw->aq.arq_buf_size
361 if (hw->aq.asq.count > 0) { i40e_init_asq()
368 if ((hw->aq.num_asq_entries == 0) || i40e_init_asq()
369 (hw->aq.asq_buf_size == 0)) { i40e_init_asq()
374 hw->aq.asq.next_to_use = 0; i40e_init_asq()
375 hw->aq.asq.next_to_clean = 0; i40e_init_asq()
393 hw->aq.asq.count = hw->aq.num_asq_entries; i40e_init_asq()
409 * in the hw->aq structure:
410 * - hw->aq.num_asq_entries
411 * - hw->aq.arq_buf_size
420 if (hw->aq.arq.count > 0) { i40e_init_arq()
427 if ((hw->aq.num_arq_entries == 0) || i40e_init_arq()
428 (hw->aq.arq_buf_size == 0)) { i40e_init_arq()
433 hw->aq.arq.next_to_use = 0; i40e_init_arq()
434 hw->aq.arq.next_to_clean = 0; i40e_init_arq()
452 hw->aq.arq.count = hw->aq.num_arq_entries; i40e_init_arq()
472 mutex_lock(&hw->aq.asq_mutex); i40e_shutdown_asq()
474 if (hw->aq.asq.count == 0) { i40e_shutdown_asq()
480 wr32(hw, hw->aq.asq.head, 0); i40e_shutdown_asq()
481 wr32(hw, hw->aq.asq.tail, 0); i40e_shutdown_asq()
482 wr32(hw, hw->aq.asq.len, 0); i40e_shutdown_asq()
483 wr32(hw, hw->aq.asq.bal, 0); i40e_shutdown_asq()
484 wr32(hw, hw->aq.asq.bah, 0); i40e_shutdown_asq()
486 hw->aq.asq.count = 0; /* to indicate uninitialized queue */ i40e_shutdown_asq()
492 mutex_unlock(&hw->aq.asq_mutex); i40e_shutdown_asq()
506 mutex_lock(&hw->aq.arq_mutex); i40e_shutdown_arq()
508 if (hw->aq.arq.count == 0) { i40e_shutdown_arq()
514 wr32(hw, hw->aq.arq.head, 0); i40e_shutdown_arq()
515 wr32(hw, hw->aq.arq.tail, 0); i40e_shutdown_arq()
516 wr32(hw, hw->aq.arq.len, 0); i40e_shutdown_arq()
517 wr32(hw, hw->aq.arq.bal, 0); i40e_shutdown_arq()
518 wr32(hw, hw->aq.arq.bah, 0); i40e_shutdown_arq()
520 hw->aq.arq.count = 0; /* to indicate uninitialized queue */ i40e_shutdown_arq()
526 mutex_unlock(&hw->aq.arq_mutex); i40e_shutdown_arq()
535 * in the hw->aq structure:
536 * - hw->aq.num_asq_entries
537 * - hw->aq.num_arq_entries
538 * - hw->aq.arq_buf_size
539 * - hw->aq.asq_buf_size
546 if ((hw->aq.num_arq_entries == 0) || i40evf_init_adminq()
547 (hw->aq.num_asq_entries == 0) || i40evf_init_adminq()
548 (hw->aq.arq_buf_size == 0) || i40evf_init_adminq()
549 (hw->aq.asq_buf_size == 0)) { i40evf_init_adminq()
558 hw->aq.asq_cmd_timeout = I40E_ASQ_CMD_TIMEOUT; i40evf_init_adminq()
609 struct i40e_adminq_ring *asq = &(hw->aq.asq); i40e_clean_asq()
617 while (rd32(hw, hw->aq.asq.head) != ntc) { i40e_clean_asq()
619 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); i40e_clean_asq()
654 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; i40evf_asq_done()
683 mutex_lock(&hw->aq.asq_mutex); i40evf_asq_send_command()
685 if (hw->aq.asq.count == 0) { i40evf_asq_send_command()
692 hw->aq.asq_last_status = I40E_AQ_RC_OK; i40evf_asq_send_command()
694 val = rd32(hw, hw->aq.asq.head); i40evf_asq_send_command()
695 if (val >= hw->aq.num_asq_entries) { i40evf_asq_send_command()
702 details = I40E_ADMINQ_DETAILS(hw->aq.asq, hw->aq.asq.next_to_use); i40evf_asq_send_command()
724 if (buff_size > hw->aq.asq_buf_size) { i40evf_asq_send_command()
757 desc_on_ring = I40E_ADMINQ_DESC(hw->aq.asq, hw->aq.asq.next_to_use); i40evf_asq_send_command()
764 dma_buff = &(hw->aq.asq.r.asq_bi[hw->aq.asq.next_to_use]); i40evf_asq_send_command()
782 (hw->aq.asq.next_to_use)++; i40evf_asq_send_command()
783 if (hw->aq.asq.next_to_use == hw->aq.asq.count) i40evf_asq_send_command()
784 hw->aq.asq.next_to_use = 0; i40evf_asq_send_command()
786 wr32(hw, hw->aq.asq.tail, hw->aq.asq.next_to_use); i40evf_asq_send_command()
802 } while (total_delay < hw->aq.asq_cmd_timeout); i40evf_asq_send_command()
825 hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval; i40evf_asq_send_command()
833 /* save writeback aq if requested */ i40evf_asq_send_command()
847 mutex_unlock(&hw->aq.asq_mutex); i40evf_asq_send_command()
882 u16 ntc = hw->aq.arq.next_to_clean; i40evf_clean_arq_element()
891 mutex_lock(&hw->aq.arq_mutex); i40evf_clean_arq_element()
893 if (hw->aq.arq.count == 0) { i40evf_clean_arq_element()
901 ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK); i40evf_clean_arq_element()
909 desc = I40E_ADMINQ_DESC(hw->aq.arq, ntc); i40evf_clean_arq_element()
915 hw->aq.arq_last_status = i40evf_clean_arq_element()
920 hw->aq.arq_last_status); i40evf_clean_arq_element()
927 memcpy(e->msg_buf, hw->aq.arq.r.arq_bi[desc_idx].va, i40evf_clean_arq_element()
932 hw->aq.arq_buf_size); i40evf_clean_arq_element()
938 bi = &hw->aq.arq.r.arq_bi[ntc]; i40evf_clean_arq_element()
942 if (hw->aq.arq_buf_size > I40E_AQ_LARGE_BUF) i40evf_clean_arq_element()
949 wr32(hw, hw->aq.arq.tail, ntc); i40evf_clean_arq_element()
952 if (ntc == hw->aq.num_arq_entries) i40evf_clean_arq_element()
954 hw->aq.arq.next_to_clean = ntc; i40evf_clean_arq_element()
955 hw->aq.arq.next_to_use = ntu; i40evf_clean_arq_element()
960 *pending = (ntc > ntu ? hw->aq.arq.count : 0) + (ntu - ntc); i40evf_clean_arq_element()
963 mutex_unlock(&hw->aq.arq_mutex); i40evf_clean_arq_element()
971 hw->aq.asq.next_to_use = 0; i40evf_resume_aq()
972 hw->aq.asq.next_to_clean = 0; i40evf_resume_aq()
976 hw->aq.arq.next_to_use = 0; i40evf_resume_aq()
977 hw->aq.arq.next_to_clean = 0; i40evf_resume_aq()
H A Di40evf_main.c1253 i40evf_aq_str(hw, hw->aq.asq_last_status)); i40evf_configure_rss_aq()
1263 i40evf_aq_str(hw, hw->aq.asq_last_status)); i40evf_configure_rss_aq()
1816 val = rd32(hw, hw->aq.arq.len); i40evf_adminq_task()
1831 wr32(hw, hw->aq.arq.len, val); i40evf_adminq_task()
1833 val = rd32(hw, hw->aq.asq.len); i40evf_adminq_task()
1848 wr32(hw, hw->aq.asq.len, val); i40evf_adminq_task()
2204 hw->aq.num_arq_entries = I40EVF_AQ_LEN; i40evf_init_task()
2205 hw->aq.num_asq_entries = I40EVF_AQ_LEN; i40evf_init_task()
2206 hw->aq.arq_buf_size = I40EVF_MAX_AQ_BUF_SIZE; i40evf_init_task()
2207 hw->aq.asq_buf_size = I40EVF_MAX_AQ_BUF_SIZE; i40evf_init_task()
2231 /* aq msg sent, awaiting reply */ i40evf_init_task()
2253 /* aq msg sent, awaiting reply */ i40evf_init_task()
2482 mutex_init(&hw->aq.asq_mutex); i40evf_probe()
2483 mutex_init(&hw->aq.arq_mutex); i40evf_probe()
2635 if (hw->aq.asq.count) i40evf_remove()
2639 mutex_destroy(&hw->aq.arq_mutex); i40evf_remove()
2640 mutex_destroy(&hw->aq.asq_mutex); i40evf_remove()
H A Di40evf.h171 __I40EVF_INIT_VERSION_CHECK, /* aq msg sent, awaiting reply */
172 __I40EVF_INIT_GET_RESOURCES, /* aq msg sent, awaiting reply */
H A Di40e_common.c350 if (hw->aq.asq.len) i40evf_check_asq_alive()
351 return !!(rd32(hw, hw->aq.asq.len) & i40evf_check_asq_alive()
H A Di40evf_virtchnl.c56 i40evf_aq_str(hw, hw->aq.asq_last_status)); i40evf_send_pf_msg()
H A Di40e_type.h519 struct i40e_adminq_info aq; member in struct:i40e_hw
H A Di40e_adminq_cmd.h122 /* aq commands */
/linux-4.4.14/lib/
H A Dkasprintf.c18 va_list aq; kvasprintf() local
20 va_copy(aq, ap); kvasprintf()
21 len = vsnprintf(NULL, 0, fmt, aq); kvasprintf()
22 va_end(aq); kvasprintf()
H A Dtest_printf.c47 va_list aq; do_test() local
53 va_copy(aq, ap); do_test()
54 ret = vsnprintf(test_buffer, bufsize, fmt, aq); do_test()
55 va_end(aq); do_test()
/linux-4.4.14/drivers/base/
H A Ddevres.c836 va_list aq; devm_kvasprintf() local
838 va_copy(aq, ap); devm_kvasprintf()
839 len = vsnprintf(NULL, 0, fmt, aq); devm_kvasprintf()
840 va_end(aq); devm_kvasprintf()
/linux-4.4.14/drivers/scsi/qla2xxx/
H A Dqla_dbg.c516 } aq, *aqp; qla2xxx_copy_atioqueues() local
522 aqp = &aq; qla2xxx_copy_atioqueues()
/linux-4.4.14/net/sched/
H A Dsch_hfsc.c46 * Oleg Cherevko <olwi@aq.ml.com.ua> added the upperlimit for link-sharing.

Completed in 802 milliseconds