Home
last modified time | relevance | path

Searched refs:VSYNC (Results 1 – 28 of 28) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/media/i2c/
Dtvp514x.txt19 - vsync-active: VSYNC Polarity configuration for endpoint.
Dtvp7002.txt13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
/linux-4.4.14/drivers/video/fbdev/i810/
Di810_regs.h153 #define VSYNC 0x60014 macro
/linux-4.4.14/Documentation/fb/
Dpxafb.txt30 vsynclen:VSYNC == LCCR2_VSW + 1
46 vsync:VSYNC
Dmatroxfb.txt244 upper:X - top boundary: lines between end of VSYNC pulse and start of first
246 lower:X - bottom boundary: lines between end of picture and start of VSYNC
248 vslen:X - length of VSYNC pulse, in lines. Default is derived from `vesa'
258 sync:X - sync. pulse - bit 0 inverts HSYNC polarity, bit 1 VSYNC polarity.
/linux-4.4.14/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.txt12 order: VSYNC, LCD_SYSTEM. The interrupt specifier
/linux-4.4.14/Documentation/devicetree/bindings/media/
Dvideo-interfaces.txt84 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
85 Note, that if HSYNC and VSYNC polarities are not specified, embedded
87 - data-active: similar to HSYNC and VSYNC, specifies data line polarity.
/linux-4.4.14/Documentation/devicetree/bindings/display/exynos/
Dexynos5433-decon.txt11 order: VSYNC, LCD_SYSTEM. The interrupt specifier format
Dexynos7-decon.txt16 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
Dexynos_dp.txt60 VSYNC polarity configuration.
Dsamsung-fimd.txt23 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
/linux-4.4.14/Documentation/video4linux/cx2341x/
Dfw-upload.txt23 - Issue the I2C command to the digitizer to stop emitting VSYNC events.
/linux-4.4.14/include/video/
Dsstfb.h161 #define VSYNC 0x0224 macro
/linux-4.4.14/drivers/staging/sm750fb/
Dddk750_mode.c152 FIELD_SET(0, PANEL_DISPLAY_CTRL, VSYNC, ACTIVE_LOW); in programModeRegisters()
/linux-4.4.14/arch/avr32/mach-at32ap/include/mach/
Dat32ap700x.h227 ATMEL_LCDC(PC, HSYNC) | ATMEL_LCDC(PC, VSYNC) | \
/linux-4.4.14/arch/arm/boot/dts/
Dimx53-qsb-common.dtsi281 /* VGA_HSYNC, VSYNC with max drive strength */
Dam437x-sk-evm.dts361 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
Dam43x-epos-evm.dts304 0x0E0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
Dam437x-gp-evm.dts285 0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
Dat91sam9g45.dtsi514 AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* VSYNC */
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
Ddispc-compat.c92 PIS(VSYNC); in dispc_dump_irqs()
/linux-4.4.14/drivers/gpu/drm/i2c/
Dch7006_mode.c123 DRM_MODE_FLAG_##vsynp##VSYNC, \
/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_crt.c503 vsync_reg = VSYNC(pipe); in intel_crt_load_detect()
Dintel_display.c4089 I915_READ(VSYNC(cpu_transcoder))); in ironlake_pch_transcoder_set_timings()
7744 I915_WRITE(VSYNC(cpu_transcoder), in intel_set_pipe_timings()
7788 tmp = I915_READ(VSYNC(cpu_transcoder)); in intel_get_pipe_timings()
10682 int vsync = I915_READ(VSYNC(cpu_transcoder)); in intel_crtc_mode_get()
15747 error->transcoder[i].vsync = I915_READ(VSYNC(cpu_transcoder)); in intel_display_capture_error_state()
Di915_reg.h3042 #define VSYNC(trans) _TRANSCODER2(trans, _VSYNC_A) macro
/linux-4.4.14/drivers/pinctrl/sh-pfc/
Dpfc-sh7786.c510 GPIO_FN(VSYNC),
/linux-4.4.14/drivers/gpu/drm/
Ddrm_modes.c1025 MODE_STATUS(VSYNC),
/linux-4.4.14/drivers/video/fbdev/
Dsstfb.c534 sst_write(VSYNC, par->vSyncOff << 16 | par->vSyncOn); in sstfb_set_par()