Searched refs:UART_CR (Results 1 – 4 of 4) sorted by relevance
/linux-4.4.14/arch/arm/mach-netx/include/mach/ |
D | uncompress.h | 36 #define UART_CR 0x14 macro 47 if (REG(UART1_BASE + UART_CR) & CR_UART_EN) in putc() 49 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) in putc() 62 if (REG(UART1_BASE + UART_CR) & CR_UART_EN) in flush() 64 else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) in flush()
|
/linux-4.4.14/drivers/tty/serial/ |
D | netx-serial.c | 49 UART_CR = 0x14, enumerator 121 val = readl(port->membase + UART_CR); in netx_stop_tx() 122 writel(val & ~CR_TIE, port->membase + UART_CR); in netx_stop_tx() 128 val = readl(port->membase + UART_CR); in netx_stop_rx() 129 writel(val & ~CR_RIE, port->membase + UART_CR); in netx_stop_rx() 135 val = readl(port->membase + UART_CR); in netx_enable_ms() 136 writel(val | CR_MSIE, port->membase + UART_CR); in netx_enable_ms() 173 readl(port->membase + UART_CR) | CR_TIE, port->membase + UART_CR); in netx_start_tx() 323 port->membase + UART_CR); in netx_startup() 331 writel(0, port->membase + UART_CR) ; in netx_shutdown() [all …]
|
D | msm_serial.c | 230 msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR); in msm_wait_for_xmitr() 288 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); in msm_complete_tx_dma() 289 msm_write(port, UART_CR_TX_ENABLE, UART_CR); in msm_complete_tx_dma() 398 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_complete_rx_dma() 486 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_start_rx_dma() 487 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_start_rx_dma() 535 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_handle_rx_dm() 592 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR); in msm_handle_rx_dm() 594 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR); in msm_handle_rx_dm() 612 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR); in msm_handle_rx() [all …]
|
D | msm_serial.h | 47 #define UART_CR 0x0010 macro
|