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Searched refs:RCS (Results 1 – 16 of 16) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Di915_gem_context.c337 if (lctx->legacy_hw_ctx.rcs_state && i == RCS) in i915_gem_context_reset()
358 if (WARN_ON(dev_priv->ring[RCS].default_context)) in i915_gem_context_init()
404 struct intel_context *dctx = dev_priv->ring[RCS].default_context; in i915_gem_context_fini()
419 WARN_ON(!dev_priv->ring[RCS].last_context); in i915_gem_context_fini()
420 if (dev_priv->ring[RCS].last_context == dctx) { in i915_gem_context_fini()
425 dev_priv->ring[RCS].last_context = NULL; in i915_gem_context_fini()
623 if (ring != &dev_priv->ring[RCS]) in needs_pd_load_pre()
641 if (ring != &dev_priv->ring[RCS]) in needs_pd_load_post()
660 if (from != NULL && ring == &dev_priv->ring[RCS]) { in do_switch()
669 if (ring == &dev_priv->ring[RCS]) { in do_switch()
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Dintel_ringbuffer.h70 ring->semaphore.signal_ggtt[RCS] = GEN8_SIGNAL_OFFSET(ring, RCS); \
149 RCS = 0x0, enumerator
Dintel_ringbuffer.c493 case RCS: in intel_ring_setup_status_page()
1140 WARN_ON(ring->id != RCS); in init_workarounds_ring()
1703 if (HAS_L3_DPF(dev) && ring->id == RCS) in gen6_ring_get_irq()
1725 if (HAS_L3_DPF(dev) && ring->id == RCS) in gen6_ring_put_irq()
1781 if (HAS_L3_DPF(dev) && ring->id == RCS) { in gen8_ring_get_irq()
1804 if (HAS_L3_DPF(dev) && ring->id == RCS) { in gen8_ring_put_irq()
2148 WARN_ON(ring->id != RCS); in intel_init_ring_buffer()
2196 WARN_ON(ring->id != RCS); in intel_cleanup_ring_buffer()
2647 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_init_render_ring_buffer()
2652 ring->id = RCS; in intel_init_render_ring_buffer()
[all …]
Di915_guc_submission.c887 struct intel_context *ctx = dev_priv->ring[RCS].default_context; in i915_guc_submission_enable()
941 ctx = dev_priv->ring[RCS].default_context; in intel_guc_suspend()
947 data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state); in intel_guc_suspend()
967 ctx = dev_priv->ring[RCS].default_context; in intel_guc_resume()
972 data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state); in intel_guc_resume()
Dintel_lrc.c887 if (instp_mode != 0 && ring != &dev_priv->ring[RCS]) { in intel_execlists_submission()
916 if (ring == &dev_priv->ring[RCS] && in intel_execlists_submission()
1400 WARN_ON(ring->id != RCS); in intel_init_workaround_bb()
1957 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in logical_render_ring_init()
1961 ring->id = RCS; in logical_render_ring_init()
2181 intel_logical_ring_cleanup(&dev_priv->ring[RCS]); in intel_logical_rings_init()
2267 if (ring->id == RCS) in populate_lr_context()
2300 if (ring->id == RCS) { in populate_lr_context()
2354 if (ring->id == RCS) { in populate_lr_context()
2407 case RCS: in get_lr_context_size()
Di915_gem_execbuffer.c1023 if (ring->id != RCS && ctx_id != DEFAULT_CONTEXT_HANDLE) in i915_gem_validate_context()
1106 if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS]) { in i915_reset_gen7_sol_offsets()
1209 if (instp_mode != 0 && ring != &dev_priv->ring[RCS]) { in i915_gem_ringbuffer_submission()
1236 if (ring == &dev_priv->ring[RCS] && in i915_gem_ringbuffer_submission()
1376 ring = &dev_priv->ring[RCS]; in i915_gem_do_execbuffer()
1418 if (ring->id != RCS) { in i915_gem_do_execbuffer()
Di915_gem_render_state.c177 if (WARN_ON(ring->id != RCS)) in i915_gem_render_state_prepare()
Dintel_overlay.c236 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_on()
270 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_continue()
339 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_off()
411 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_release_old_vid()
Di915_gpu_error.c36 case RCS: return "render"; in ring_str()
907 case RCS: in i915_record_ring_state()
964 if (ring->id != RCS || !error->ccid) in i915_gem_record_active_context()
Di915_irq.c1266 notify_ring(&dev_priv->ring[RCS]); in ilk_gt_irq_handler()
1278 notify_ring(&dev_priv->ring[RCS]); in snb_gt_irq_handler()
1305 intel_lrc_irq_handler(&dev_priv->ring[RCS]); in gen8_gt_irq_handler()
1307 notify_ring(&dev_priv->ring[RCS]); in gen8_gt_irq_handler()
3891 notify_ring(&dev_priv->ring[RCS]); in i8xx_irq_handler()
4080 notify_ring(&dev_priv->ring[RCS]); in i915_irq_handler()
4305 notify_ring(&dev_priv->ring[RCS]); in i965_irq_handler()
Di915_cmd_parser.c698 case RCS: in i915_cmd_parser_init_ring()
Di915_gem.c4757 intel_cleanup_ring_buffer(&dev_priv->ring[RCS]); in i915_gem_init_rings()
4804 BUG_ON(!dev_priv->ring[RCS].default_context); in i915_gem_init_hw()
4858 if (ring->id == RCS) { in i915_gem_init_hw()
Di915_gem_gtt.c1710 if (ring->id != RCS) { in gen7_mm_switch()
2290 POSTING_READ(RING_FAULT_REG(&dev_priv->ring[RCS])); in i915_check_and_clear_faults()
Di915_drv.h2535 #define RENDER_RING (1<<RCS)
Dintel_display.c11087 if (ring->id == RCS) { in intel_gen7_queue_flip()
11125 if (ring->id == RCS) { in intel_gen7_queue_flip()
11505 if (ring == NULL || ring->id != RCS) in intel_crtc_page_flip()
11508 ring = &dev_priv->ring[RCS]; in intel_crtc_page_flip()
Di915_debugfs.c5210 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},