Searched refs:RADEON_CP_RB_WPTR (Results 1 – 6 of 6) sorted by relevance
306 (unsigned int)RADEON_READ(RADEON_CP_RB_WPTR)); in radeon_status()577 tmp = RADEON_READ(RADEON_CP_RB_WPTR) | (1 << 31); in radeon_do_cp_flush()578 RADEON_WRITE(RADEON_CP_RB_WPTR, tmp); in radeon_do_cp_flush()652 RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr); in radeon_do_cp_reset()790 RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr); in radeon_cp_init_ring_buffer()2239 RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail); in radeon_commit_ring()
1074 wptr = RREG32(RADEON_CP_RB_WPTR); in r100_gfx_get_wptr()1082 WREG32(RADEON_CP_RB_WPTR, ring->wptr); in r100_gfx_set_wptr()1083 (void)RREG32(RADEON_CP_RB_WPTR); in r100_gfx_set_wptr()1183 WREG32(RADEON_CP_RB_WPTR, ring->wptr); in r100_cp_init()2576 WREG32(RADEON_CP_RB_WPTR, 0); in r100_asic_reset()2957 wdp = RREG32(RADEON_CP_RB_WPTR); in r100_debugfs_cp_ring_info()
466 WREG32(RADEON_CP_RB_WPTR, 0); in rs600_asic_reset()
431 WREG32(RADEON_CP_RB_WPTR, 0); in r300_asic_reset()
1039 #define RADEON_CP_RB_WPTR 0x0714 macro
3309 #define RADEON_CP_RB_WPTR 0x0714 macro