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Searched refs:R2 (Results 1 – 81 of 81) sorted by relevance

/linux-4.4.14/arch/blackfin/lib/
Dudivsi3.S23 R2 = R1 << 16; define
24 CC = R2 <= R0 (IU);
27 R2 = R0 >> 31; /* if X is a 31-bit number */ define
29 R2 = R2 | R3; /* then it's okay to use the DIVQ builtins (fallthrough to fast)*/ define
30 CC = R2;
90 R2 = R0 >> 16; define
92 R2 = R3 - R2; /* shifted divisor < upper 16 bits of dividend */ define
111 R2.L = ONES R1;
112 R2 = R2.L (Z); define
113 CC = R2 == 1;
[all …]
Dmemset.S28 P2 = R2 ; /* P2 = count */
29 R3 = R0 + R2; /* end */
30 CC = R2 <= 7(IU);
33 R2 = 3; define
34 R2 = R0 & R2; /* addr bottom two bits */ define
35 CC = R2 == 0; /* AZ set if zero. */
40 R2 = R1 << 8; /* create quad filler */ define
41 R2.L = R2.L + R1.L(NS);
42 R2.H = R2.L + R1.H(NS);
47 [P0++] = R2;
[all …]
Ddivsi3.S100 R2.L = ONES R1;
101 R2 = R2.L (Z); define
102 CC = R2 == 1;
112 R2 = -R1; define
113 [--SP] = R2;
114 R2 = R0 << 1; /* R2 lsw of dividend */ define
119 R2 = R2 | R5; /* Shift quotient bit */ define
123 .Llst: R7 = R2 >> 31; /* record copy of carry from R2 */
124 R2 = R2 << 1; /* Shift 64 bit dividend up by 1 bit */ define
135 .Llend: R2 = R2 + R5; /* and then set shifted-in value to
[all …]
Douts.S16 CC = R2 == 0;
20 P2 = R2; /* P2 = count */
29 CC = R2 == 0;
33 P2 = R2; /* P2 = count */
42 CC = R2 == 0;
46 P2 = R2; /* P2 = count */
55 CC = R2 == 0;
59 P2 = R2; /* P2 = count */
Dmuldi3.S51 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */
56 A0 += R2.l * R1.l (FU); /* E2 */
58 A1 = R2.L * R0.L (FU); /* E4 */
61 A0 += R2.H * R0.H, A1 += R2.L * R0.H (FU); /* E2, E3c */
62 A1 += R0.L * R2.H (FU); /* E3c */
Dsmulsi3_highpart.S18 R2 = R1.L * R0.L (FU); define
22 R1.L = R2.H + R1.L;
24 R2 = cc; define
31 R1 = R1 + R2;
32 R2 = cc; define
33 R1 = R1 + R2;
Dstrncpy.S27 CC = R2 == 0;
30 P2 = R2 ; /* size */
49 R2 = LC0; define
50 CC = R2
57 CC = R2 < R3;
60 R2 += -1;
Dmemmove.S23 P2 = R2; /* P2 = count */
29 R3 = R1 + R2;
34 CC = R2 <= R3;
45 R2 = R2 & R3; /* remainder */ define
46 P2 = R2; /* set remainder */
Dmemcmp.S25 P2 = R2 ; /* P2 = count */
26 CC = R2 <= 7(IU);
36 R2 = R2 & R3; /* remainder */ define
37 P2 = R2; /* set remainder */
Dmemcpy.S32 CC = R2 <= 0; /* length not positive? */
37 P2 = R2 ; /* length */
42 R3 = R1 + R2;
61 P2 = R2;
89 R3 = R2 & R3;
Dstrncmp.S25 CC = R2 == 0;
37 R2 += -1; /* no, adjust count */
38 CC = R2 == 0;
Dmemchr.S23 P2 = R2; /* P2 = count */
25 CC = R2 == 0;
Dumulsi3_highpart.S18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU); define
28 R0 = R1 + R2;
Dins.S79 P2 = R2; /* P2 = count */ \
/linux-4.4.14/arch/blackfin/mach-common/
Ddpmc_modes.S25 CLI R2;
28 STI R2;
34 R2 = IWR_DISABLE_ALL; define
73 R2 = IWR_DISABLE_ALL; define
83 CLI R2;
97 P5 = R2;
101 R2 = IWR_DISABLE_ALL; define
128 R2 = 0x0404(Z); define
129 R1 = R1|R2;
131 R2 = DEPOSIT(R7, R1); define
[all …]
Dcache.S31 R2 = -L1_CACHE_BYTES; define
34 R0 = R0 & R2;
38 R1 = R1 & R2;
42 R2 = R1 - R0; define
43 R2 >>= L1_CACHE_SHIFT;
44 P1 = R2;
Dinterrupt.S165 R2 = 10; define
176 CC = R1 == R2;
/linux-4.4.14/arch/x86/crypto/
Dtwofish-x86_64-asm_64.S52 #define R2 %rcx macro
239 encrypt_round(R0,R1,R2,R3,0);
240 encrypt_round(R2,R3,R0,R1,8);
241 encrypt_round(R0,R1,R2,R3,2*8);
242 encrypt_round(R2,R3,R0,R1,3*8);
243 encrypt_round(R0,R1,R2,R3,4*8);
244 encrypt_round(R2,R3,R0,R1,5*8);
245 encrypt_round(R0,R1,R2,R3,6*8);
246 encrypt_round(R2,R3,R0,R1,7*8);
247 encrypt_round(R0,R1,R2,R3,8*8);
[all …]
Dtwofish-i586-asm_32.S244 encrypt_round(R0,R1,R2,R3,0);
245 encrypt_round(R2,R3,R0,R1,8);
246 encrypt_round(R0,R1,R2,R3,2*8);
247 encrypt_round(R2,R3,R0,R1,3*8);
248 encrypt_round(R0,R1,R2,R3,4*8);
249 encrypt_round(R2,R3,R0,R1,5*8);
250 encrypt_round(R0,R1,R2,R3,6*8);
251 encrypt_round(R2,R3,R0,R1,7*8);
252 encrypt_round(R0,R1,R2,R3,8*8);
253 encrypt_round(R2,R3,R0,R1,9*8);
[all …]
Daes-x86_64-asm_64.S26 #define R2 %rbx macro
134 prologue(FUNC,KEY,B128,B192,R2,R8,R7,R9,R1,R3,R4,R6,R10,R5,R11)
136 #define return(FUNC) epilogue(FUNC,R8,R2,R9,R7,R5,R6,R3,R4,R11)
139 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) \
140 move_regs(R1,R2,R5,R6)
143 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4)
146 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4) \
147 move_regs(R1,R2,R5,R6)
150 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4)
/linux-4.4.14/lib/
Dtest_bpf.c47 #define R2 BPF_REG_2 macro
405 insn[i++] = BPF_MOV64_IMM(R2, 1); in bpf_fill_ld_abs_vlan_push_pop()
1058 BPF_ALU64_IMM(BPF_MOV, R2, 3),
1059 BPF_ALU64_REG(BPF_SUB, R1, R2),
1074 BPF_ALU64_IMM(BPF_MOV, R2, 3),
1075 BPF_ALU64_REG(BPF_MUL, R1, R2),
1090 BPF_ALU32_IMM(BPF_MOV, R2, 3),
1091 BPF_ALU64_REG(BPF_MUL, R1, R2),
1107 BPF_ALU32_IMM(BPF_MOV, R2, 3),
1108 BPF_ALU32_REG(BPF_MUL, R1, R2),
[all …]
/linux-4.4.14/arch/parisc/kernel/
Dunaligned.c120 #define R2(i) (((i)>>16)&0x1f) macro
508 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0)<<shift; in handle_unaligned()
510 newbase += (R2(regs->iir)?regs->gr[R2(regs->iir)]:0); in handle_unaligned()
557 ret = emulate_sth(regs, R2(regs->iir)); in handle_unaligned()
562 ret = emulate_stw(regs, R2(regs->iir),0); in handle_unaligned()
575 ret = emulate_std(regs, R2(regs->iir),0); in handle_unaligned()
619 ret = emulate_ldd(regs,R2(regs->iir),1); in handle_unaligned()
623 ret = emulate_std(regs, R2(regs->iir),1); in handle_unaligned()
626 ret = emulate_ldd(regs, R2(regs->iir),0); in handle_unaligned()
629 ret = emulate_std(regs, R2(regs->iir),0); in handle_unaligned()
[all …]
/linux-4.4.14/arch/hexagon/kernel/
Dvm_entry.S74 R2.H = #HI(_THREAD_SIZE); } \
77 R2.L = #LO(_THREAD_SIZE); } \
80 R2 = neg(R2); } \
83 R2 = and(R0,R2); } \
85 THREADINFO_REG = R2; } \
88 R2 = #-1; } \
89 { memw(R0 + #_PT_SYSCALL_NR) = R2; \
125 R2 = #-1; } \
126 { memw(R0 + #_PT_SYSCALL_NR) = R2; \
/linux-4.4.14/Documentation/devicetree/bindings/regulator/
Dltc3589.txt18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
/linux-4.4.14/tools/perf/arch/arm/tests/
Dregs_load.S5 #define R2 0x10 macro
42 str r2, [r0, #R2]
/linux-4.4.14/arch/blackfin/mach-bf609/
Ddpm.S136 R2.H = .Lpm_resume_here;
137 R2.L = .Lpm_resume_here;
139 [P0++] = R2;
/linux-4.4.14/Documentation/hwmon/
Dltc426039 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
40 value of the divider resistor against the measured voltage and R2 is the value
Dltc426139 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
40 value of the divider resistor against the measured voltage and R2 is the value
Dltc294539 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
40 value of the divider resistor against the measured voltage and R2 is the value
Dvt121178 compute inx @*(1+R1/R2), @/(1+R1/R2)
86 Voltage R1 R2 Divider Raw Value
96 (2) R1 and R2 for 3.3V (int) are internal to the VT1211 chip and the driver
Df71805f68 name use R1 R2 divider raw val.
83 (2) Obviously not correct, swapping R1 and R2 would make more sense.
/linux-4.4.14/arch/sparc/net/
Dbpf_jit_comp.c298 #define emit_cmp(R1, R2) \ argument
299 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
304 #define emit_btst(R1, R2) \ argument
305 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
310 #define emit_sub(R1, R2, R3) \ argument
311 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
316 #define emit_add(R1, R2, R3) \ argument
317 *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3))
322 #define emit_and(R1, R2, R3) \ argument
323 *prog++ = (AND | RS1(R1) | RS2(R2) | RD(R3))
/linux-4.4.14/arch/sh/boards/
DKconfig313 bool "Magic Panel R2"
318 Select Magic Panel R2 if configuring for Magic Panel R2.
371 menu "Magic Panel R2 options"
374 int "Magic Panel R2 Version"
377 Set the version of the Magic Panel R2
/linux-4.4.14/arch/blackfin/mach-bf561/
Dsecondary.S140 CLI R2;
143 STI R2;
/linux-4.4.14/tools/perf/arch/arm/util/
Dunwind-libdw.c19 dwarf_regs[2] = REG(R2); in libdw__arch_set_initial_registers()
/linux-4.4.14/arch/blackfin/kernel/
Dfixed_code.S59 [P0] = R2;
/linux-4.4.14/arch/mips/bcm47xx/
DKconfig35 This will generate an image with support for BCMA and MIPS32 R2 instruction set.
/linux-4.4.14/Documentation/virtual/kvm/
Dhypercalls.txt14 R2-R7 are used for parameters 1-6. In addition, R1 is used for hypercall
15 number. The return value is written to R2.
/linux-4.4.14/drivers/net/hamradio/
Dz8530.h8 #define R2 2 macro
Dscc.c677 vector=InReg(ctrl->chan_B,R2); /* Read the vector */ in scc_isr()
1500 wr(scc, R2, chip*16); /* interrupt vector */ in z8530_init()
/linux-4.4.14/drivers/tty/serial/
Dzs.h61 #define R2 2 macro
Dip22zilog.h40 #define R2 2 macro
Dsunzilog.h32 #define R2 2 macro
Dpmac_zilog.h128 #define R2 2 macro
Dzs.c277 write_zsreg(zport, R2, regs[2]); in load_zsregs()
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Drt5645.txt46 * DMIC R2
Dnvidia,tegra-audio-rt5677.txt51 "DMIC R2", "Internal Mic 2",
/linux-4.4.14/drivers/media/dvb-frontends/
Ddrxd_hard.c94 u16 R2; member
885 u32 R2 = state->if_agc_cfg.R2; in ReadIFAgc() local
890 if (R2 == 0 && (R1 == 0 || R3 == 0)) in ReadIFAgc()
893 Vmax = (3300 * R2) / (R1 + R2); in ReadIFAgc()
894 Rpar = (R2 * R3) / (R3 + R2); in ReadIFAgc()
2515 state->if_agc_cfg.R2 = (u16) (ulIfAgcR2); in CDRXD()
2519 state->rf_agc_cfg.R2 = (u16) (ulRfAgcR2); in CDRXD()
/linux-4.4.14/arch/m32r/kernel/
Dentry.S90 #define R2(reg) @(0x18,reg) macro
/linux-4.4.14/Documentation/networking/
Dfilter.txt698 bpf_mov R2, R1
718 R2 - rsi
734 bpf_mov R2, 2
741 bpf_mov R2, 6
1019 If verifier sees an insn that does R2=R1, then R2 has now type
1021 If R1=PTR_TO_CTX and insn is R2=R1+R1, then R2=UNKNOWN_VALUE,
1027 bpf_mov R0 = R2
1029 will be rejected, since R2 is unreadable at the start of the program.
1046 bpf_mov R2 = 2
1047 bpf_xadd *(u32 *)(R1 + 3) += R2
[all …]
Dixgbe.txt312 Enabling SR-IOV in a 32-bit or 64-bit Microsoft* Windows* Server 2008/R2
/linux-4.4.14/drivers/net/wireless/iwlegacy/
D4965.c1581 s32 R1, R2, R3; in il4965_hw_get_temperature() local
1588 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[1]); in il4965_hw_get_temperature()
1594 R2 = (s32) le32_to_cpu(il->card_alive_init.therm_r2[0]); in il4965_hw_get_temperature()
1613 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); in il4965_hw_get_temperature()
1622 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2); in il4965_hw_get_temperature()
/linux-4.4.14/sound/pci/ali5451/
Dali5451.c648 u8 bval, R1 = 0, R2; in snd_ali_detect_spdif_rate() local
669 R2 = bval & 0x1F; in snd_ali_detect_spdif_rate()
670 if (R2 != R1) in snd_ali_detect_spdif_rate()
671 R1 = R2; in snd_ali_detect_spdif_rate()
681 if (R2 >= 0x0b && R2 <= 0x0e) { in snd_ali_detect_spdif_rate()
689 } else if (R2 == 0x12) { in snd_ali_detect_spdif_rate()
/linux-4.4.14/drivers/net/wan/
Dz85230.h27 #define R2 2 macro
/linux-4.4.14/arch/m32r/platforms/oaks32r/
Ddot.gdbinit.nommu78 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/cris/arch-v10/kernel/
Dkgdb.c303 R0, R1, R2, R3, enumerator
/linux-4.4.14/arch/powerpc/kvm/
Dbooke_interrupts.S220 stw r2, VCPU_GPR(R2)(r4)
428 lwz r2, VCPU_GPR(R2)(r4)
Dbookehv_interrupts.S74 PPC_STL r2, VCPU_GPR(R2)(r4)
651 PPC_LL r2, VCPU_GPR(R2)(r4)
Dbook3s_hv_rmhandlers.S1044 ld r2, VCPU_GPR(R2)(r4)
1128 std r2, VCPU_GPR(R2)(r9)
/linux-4.4.14/Documentation/video4linux/
DCARDLIST.em28xx19 18 -> Hauppauge WinTV HVR 900 (R2) (em2880) [2040:6502]
/linux-4.4.14/arch/cris/arch-v32/kernel/
Dkgdb_asm.S475 move.d [$acr], $r2 ; Restore R2
Dkgdb.c311 R0, R1, R2, R3, enumerator
/linux-4.4.14/arch/m32r/platforms/mappi3/
Ddot.gdbinit136 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/m32r/platforms/mappi2/
Ddot.gdbinit.vdec2147 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
Dentry.S90 mov.l @r8+,r2 ! old R2
/linux-4.4.14/arch/m32r/platforms/m32700ut/
Ddot.gdbinit_400MHz_32MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit_200MHz_16MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit_300MHz_32MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/m32r/platforms/mappi/
Ddot.gdbinit164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit.nommu164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit.smp232 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/hexagon/lib/
Dmemcpy.S153 #define len R2 /* length of copy in bytes */
/linux-4.4.14/arch/ia64/kernel/
Dunwind_decoder.c182 UNW_DEC_PROLOGUE_GR(R2, rlen, mask, grsave, arg); in unw_decode_r2()
/linux-4.4.14/Documentation/device-mapper/
Dswitch.txt134 dmsetup message switch 0 set_region_mappings 1000:1 :2 R2,10
/linux-4.4.14/arch/m32r/platforms/opsput/
Ddot.gdbinit173 printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/sh/kernel/cpu/sh2/
Dentry.S107 mov.l @r2+,r0 ! old R2
/linux-4.4.14/arch/blackfin/include/asm/
Ddpmc.h18 #define PM_REG5 R2
/linux-4.4.14/arch/mn10300/
DKconfig212 This option removes the E2/R2 register from the set available to gcc
/linux-4.4.14/arch/mips/
DKconfig2196 bool "MIPS R2-to-R6 emulator"
2205 comment "MIPS R2-to-R6 emulator is only available for UP kernels"
2369 # Vectored interrupt mode is an R2 feature
2375 # Extended interrupt mode is an R2 feature
/linux-4.4.14/drivers/platform/x86/
DKconfig67 USB MCU such as the X51 and X51-R2.
298 R2, R3, R5, T2, W2 and Y2 series), say Y.
/linux-4.4.14/Documentation/crypto/
Ddescore-readme.txt147 movement (in particular, his use of L1, R1, L2, R2), and it was full of