Home
last modified time | relevance | path

Searched refs:PSR_I_BIT (Results 1 – 35 of 35) sorted by relevance

/linux-4.4.14/arch/unicore32/include/asm/
Dptrace.h26 (!((regs)->UCreg_asr & PSR_I_BIT))
43 if ((regs->UCreg_asr & PSR_I_BIT) == 0) { in valid_user_regs()
Dirqflags.h19 #define ARCH_IRQ_DISABLED (PRIV_MODE | PSR_I_BIT)
Dassembler.h46 or \temp, \temp, #PSR_I_BIT | PRIV_MODE
/linux-4.4.14/arch/unicore32/kernel/
Dsetup.c124 "r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE), in cpu_init()
126 "r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE), in cpu_init()
128 "r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE), in cpu_init()
130 "r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE) in cpu_init()
Dentry.S260 cand.a r3, #PSR_I_BIT
262 andn r17, r17, #PSR_I_BIT
330 cand.a r3, #PSR_I_BIT
332 andn r17, r17, #PSR_I_BIT
Dhead.S64 or r0, #PSR_R_BIT | PSR_I_BIT @ disable irqs
/linux-4.4.14/arch/arm/kernel/
Dfiqasm.S26 mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
39 mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE
Dentry-armv.S339 ARM( msr cpsr_c, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
340 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
344 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
345 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
353 ARM( msr cpsr_c, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
354 THUMB( mov r0, #ABT_MODE | PSR_I_BIT | PSR_F_BIT )
358 ARM( msr cpsr_c, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
359 THUMB( mov r0, #SVC_MODE | PSR_I_BIT | PSR_F_BIT )
Diwmmxt.S200 orr r2, ip, #PSR_I_BIT @ disable interrupts
252 orr r2, ip, #PSR_I_BIT @ disable interrupts
290 orr r2, ip, #PSR_I_BIT @ disable interrupts
357 orr ip, r2, #PSR_I_BIT @ disable interrupts
Dsetup.c501 PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE), in cpu_init()
503 PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE), in cpu_init()
505 PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE), in cpu_init()
507 PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE), in cpu_init()
509 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
Dhead-nommu.S55 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
99 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
/linux-4.4.14/arch/arm/include/asm/
Dptrace.h42 (!((regs)->ARM_cpsr & PSR_I_BIT))
60 if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { in valid_user_regs()
Dassembler.h103 msr cpsr_c, #PSR_I_BIT | SVC_MODE
179 tst \oldcpsr, #PSR_I_BIT
344 orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT | SVC_MODE
359 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, \reg
Dirqflags.h18 #define IRQMASK_I_BIT PSR_I_BIT
/linux-4.4.14/arch/arm64/include/asm/
Dptrace.h141 (!((regs)->pstate & PSR_I_BIT))
160 if (user_mode(regs) && (regs->pstate & PSR_I_BIT) == 0) { in valid_user_regs()
Dirqflags.h90 return flags & PSR_I_BIT; in arch_irqs_disabled_flags()
/linux-4.4.14/arch/arm/kvm/
Dreset.c37 .usr_regs.ARM_cpsr = SVC_MODE | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT,
Demulate.c301 *vcpu_cpsr(vcpu) |= PSR_I_BIT; in kvm_inject_undefined()
336 *vcpu_cpsr(vcpu) |= PSR_I_BIT | PSR_A_BIT; in inject_abt()
/linux-4.4.14/arch/arm64/include/uapi/asm/
Dptrace.h44 #define PSR_I_BIT 0x00000080 macro
/linux-4.4.14/arch/arm/mach-s3c24xx/
Dsleep.S56 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/linux-4.4.14/arch/arm/mach-s3c64xx/
Dsleep.S43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
/linux-4.4.14/arch/arm/mach-rockchip/
Dsleep.S29 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set svc, irqs off
/linux-4.4.14/arch/arm64/kvm/
Dreset.c38 .regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT |
Dinject_fault.c29 PSR_I_BIT | PSR_D_BIT)
Dhyp.S908 mov lr, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\
/linux-4.4.14/arch/unicore32/include/uapi/asm/
Dptrace.h29 #define PSR_I_BIT 0x00000080 macro
/linux-4.4.14/arch/arm/include/uapi/asm/
Dptrace.h73 #define PSR_I_BIT 0x00000080 /* >= V4, but not V7M */ macro
/linux-4.4.14/arch/arm/mach-ep93xx/
Dcrunch-bits.S213 orr r2, ip, #PSR_I_BIT @ disable interrupts
259 orr r2, ip, #PSR_I_BIT @ disable interrupts
292 orr r2, ip, #PSR_I_BIT @ disable interrupts
/linux-4.4.14/arch/arm/mm/
Dproc-feroceon.S263 orr r3, r2, #PSR_I_BIT
309 orr r3, r2, #PSR_I_BIT
341 orr r3, r2, #PSR_I_BIT
372 orr r3, r2, #PSR_I_BIT
Dproc-xsc3.S110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
451 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
Dproc-xscale.S147 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
/linux-4.4.14/arch/unicore32/mm/
Dproc-ucv2.S23 mov ip, #PSR_R_BIT | PSR_I_BIT | PRIV_MODE
/linux-4.4.14/arch/arm/probes/kprobes/
Dcore.c508 cpsr = regs->ARM_cpsr | PSR_I_BIT; in setjmp_pre_handler()
Dtest-core.c1200 regs->ARM_cpsr |= PSR_I_BIT; in setup_test_context()
1288 regs->ARM_cpsr &= ~PSR_I_BIT; in test_after_pre_handler()
/linux-4.4.14/arch/arm64/kernel/
Dhead.S533 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT |\