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Searched refs:PIPE_C (Results 1 – 12 of 12) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_atomic.c244 if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { in intel_atomic_setup_scalers()
Dintel_pm.c356 case PIPE_C: in vlv_get_fifo_size()
848 FW_WM_VLV(wm->pipe[PIPE_C].sprite[1], SPRITEF) | in vlv_write_wm_values()
849 FW_WM_VLV(wm->pipe[PIPE_C].sprite[0], SPRITEE)); in vlv_write_wm_values()
851 FW_WM_VLV(wm->pipe[PIPE_C].primary, PLANEC) | in vlv_write_wm_values()
852 FW_WM(wm->pipe[PIPE_C].cursor, CURSORC)); in vlv_write_wm_values()
855 FW_WM(wm->pipe[PIPE_C].sprite[1] >> 8, SPRITEF_HI) | in vlv_write_wm_values()
856 FW_WM(wm->pipe[PIPE_C].sprite[0] >> 8, SPRITEE_HI) | in vlv_write_wm_values()
857 FW_WM(wm->pipe[PIPE_C].primary >> 8, PLANEC_HI) | in vlv_write_wm_values()
1076 wm_state->cxsr = crtc->pipe != PIPE_C && crtc->wm.cxsr_allowed; in vlv_compute_wm()
1231 case PIPE_C: in vlv_pipe_set_fifo_size()
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Dintel_dp_mst.c451 for (i = PIPE_A; i <= PIPE_C; i++) { in intel_dp_add_mst_connector()
561 for (i = PIPE_A; i <= PIPE_C; i++) in intel_dp_create_fake_mst_encoders()
Dintel_runtime_pm.c221 1 << PIPE_C | 1 << PIPE_B); in hsw_power_well_post_enable()
245 1 << PIPE_C | 1 << PIPE_B); in skl_power_well_post_enable()
1109 pipe = PIPE_C; in chv_dpio_cmn_power_well_enable()
1169 assert_pll_disabled(dev_priv, PIPE_C); in chv_dpio_cmn_power_well_disable()
1189 enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C; in assert_chv_phy_powergate()
Di915_irq.c1649 case PIPE_C: in valleyview_pipestat_irq_handler()
3218 if (pipe_mask & 1 << PIPE_C) in gen8_irq_power_well_post_enable()
3219 GEN8_IRQ_INIT_NDX(DE_PIPE, PIPE_C, in gen8_irq_power_well_post_enable()
3220 dev_priv->de_irq_mask[PIPE_C], in gen8_irq_power_well_post_enable()
3221 ~dev_priv->de_irq_mask[PIPE_C] | extra_ier); in gen8_irq_power_well_post_enable()
3659 dev_priv->de_irq_mask[PIPE_C] = ~de_pipe_masked; in gen8_de_irq_postinstall()
Di915_cmd_parser.c487 REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_C)),
Di915_dma.c782 info->num_sprites[PIPE_C] = 1; in intel_device_info_runtime_init()
Dintel_drv.h844 case PIPE_C: in vlv_pipe_to_channel()
Dintel_ddi.c1905 case PIPE_C: in intel_ddi_enable_transcoder_func()
2041 *pipe = PIPE_C; in intel_ddi_get_hw_state()
Dintel_display.c4104 WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE); in cpt_set_fdi_bc_bifurcation()
4129 case PIPE_C: in ivybridge_update_fdi_bc_bifurcation()
6531 other_crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, PIPE_C)); in ironlake_check_fdi_lanes()
6543 case PIPE_C: in ironlake_check_fdi_lanes()
7753 (pipe == PIPE_B || pipe == PIPE_C)) in intel_set_pipe_timings()
9876 trans_edp_pipe = PIPE_C; in haswell_get_pipe_config()
13790 if (IS_CHERRYVIEW(plane->dev) && pipe == PIPE_C && in intel_check_cursor_plane()
13922 if (pipe == PIPE_C) in intel_crtc_init()
Di915_debugfs.c3455 .pipe = PIPE_C,
3645 case PIPE_C: in vlv_pipe_crc_ctl_reg()
3746 case PIPE_C: in vlv_undo_pipe_scramble_reset()
Di915_drv.h118 PIPE_C, enumerator