Searched refs:PINT5 (Results 1 - 9 of 9) sorted by relevance

/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
H A Dsetup-mxg.c23 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2622
47 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
84 PINT4, PINT5, PINT6, PINT7),
111 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
H A Dsetup-sh7201.c23 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2623
60 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
150 PINT4, PINT5, PINT6, PINT7),
174 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
H A Dsetup-sh7203.c22 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2624
53 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
136 PINT4, PINT5, PINT6, PINT7),
170 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
H A Dsetup-sh7206.c23 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2625
51 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
105 PINT4, PINT5, PINT6, PINT7),
130 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
H A Dsetup-sh7264.c23 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2626
59 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
181 PINT4, PINT5, PINT6, PINT7),
222 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
H A Dsetup-sh7269.c24 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7, enumerator in enum:__anon2627
63 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
198 PINT4, PINT5, PINT6, PINT7),
244 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
/linux-4.4.14/arch/blackfin/mach-bf609/include/mach/
H A Dirq.h42 #define IRQ_PINT5 BFIN_IRQ(26) /* PINT5 Interrupt */
H A DdefBF60x_base.h928 PINT5
930 #define PINT5_MASK_SET 0xFFC04500 /* PINT5 Pint Mask Set Register */
931 #define PINT5_MASK_CLEAR 0xFFC04504 /* PINT5 Pint Mask Clear Register */
932 #define PINT5_REQUEST 0xFFC04508 /* PINT5 Pint Request Register */
933 #define PINT5_ASSIGN 0xFFC0450C /* PINT5 Pint Assign Register */
934 #define PINT5_EDGE_SET 0xFFC04510 /* PINT5 Pint Edge Set Register */
935 #define PINT5_EDGE_CLEAR 0xFFC04514 /* PINT5 Pint Edge Clear Register */
936 #define PINT5_INVERT_SET 0xFFC04518 /* PINT5 Pint Invert Set Register */
937 #define PINT5_INVERT_CLEAR 0xFFC0451C /* PINT5 Pint Invert Clear Register */
938 #define PINT5_PINSTATE 0xFFC04520 /* PINT5 Pint Pinstate Register */
939 #define PINT5_LATCH 0xFFC04524 /* PINT5 Pint Latch Register */
/linux-4.4.14/arch/sh/boards/
H A Dboard-magicpanelr2.c146 * K3 PINT7(/PWR2); K2 PINT6(/PWR1); K1 PINT5(nu); K0 PINT4(FLASH_READY) setup_port_multiplexing()

Completed in 273 milliseconds