Searched refs:PFIT_CONTROL (Results 1 - 16 of 16) sorted by relevance
| /linux-4.4.14/drivers/gpu/drm/gma500/ |
| H A D | oaktrail_lvds.c | 141 REG_WRITE(PFIT_CONTROL, 0); oaktrail_lvds_mode_set()
147 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); oaktrail_lvds_mode_set()
151 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | oaktrail_lvds_mode_set()
154 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE | oaktrail_lvds_mode_set()
157 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); oaktrail_lvds_mode_set()
159 REG_WRITE(PFIT_CONTROL, PFIT_ENABLE); oaktrail_lvds_mode_set()
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| H A D | mdfld_device.c | 221 regs->savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); mdfld_save_display_registers()
349 PSB_WVDC32(regs->savePFIT_CONTROL, PFIT_CONTROL); mdfld_restore_display_registers()
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| H A D | psb_intel_lvds.c | 281 lvds_priv->savePFIT_CONTROL = REG_READ(PFIT_CONTROL); psb_intel_lvds_save()
322 REG_WRITE(PFIT_CONTROL, lvds_priv->savePFIT_CONTROL); psb_intel_lvds_restore()
499 REG_WRITE(PFIT_CONTROL, pfit_control); psb_intel_lvds_mode_set()
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| H A D | cdv_device.c | 293 regs->cdv.savePFIT_CONTROL = REG_READ(PFIT_CONTROL); cdv_save_display_registers()
360 REG_WRITE(PFIT_CONTROL, regs->cdv.savePFIT_CONTROL); cdv_restore_display_registers()
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| H A D | oaktrail_crtc.c | 356 pfit_control = REG_READ(PFIT_CONTROL); oaktrail_panel_fitter_pipe()
427 REG_WRITE(PFIT_CONTROL, 0); oaktrail_crtc_mode_set()
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| H A D | oaktrail_device.c | 249 regs->psb.savePFIT_CONTROL = PSB_RVDC32(PFIT_CONTROL); oaktrail_save_display_registers()
373 PSB_WVDC32(regs->psb.savePFIT_CONTROL, PFIT_CONTROL); oaktrail_restore_display_registers()
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| H A D | psb_intel_display.c | 93 pfit_control = REG_READ(PFIT_CONTROL); psb_intel_panel_fitter_pipe()
219 REG_WRITE(PFIT_CONTROL, 0); psb_intel_crtc_mode_set()
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| H A D | cdv_intel_display.c | 570 pfit_control = REG_READ(PFIT_CONTROL); cdv_intel_panel_fitter_pipe()
776 REG_WRITE(PFIT_CONTROL, 0); cdv_intel_crtc_mode_set()
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| H A D | mdfld_intel_display.c | 115 pfit_control = REG_READ(PFIT_CONTROL); psb_intel_panel_fitter_pipe()
770 REG_WRITE(PFIT_CONTROL, 0); mdfld_crtc_mode_set()
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| H A D | cdv_intel_lvds.c | 386 REG_WRITE(PFIT_CONTROL, pfit_control); cdv_intel_lvds_mode_set()
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| H A D | psb_intel_reg.h | 217 #define PFIT_CONTROL 0x61230 macro
849 /* #define PFIT_CONTROL 0x61230 */
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| H A D | cdv_intel_dp.c | 1102 REG_WRITE(PFIT_CONTROL, pfit_control); cdv_intel_dp_mode_set()
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| /linux-4.4.14/drivers/gpu/drm/i915/ |
| H A D | intel_overlay.c | 899 u32 pfit_control = I915_READ(PFIT_CONTROL); update_pfit_vscale_ratio()
1072 pfit_control = I915_READ(PFIT_CONTROL); intel_panel_fitter_pipe()
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| H A D | intel_lvds.c | 119 tmp = I915_READ(PFIT_CONTROL); intel_lvds_get_config()
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| H A D | intel_display.c | 5187 WARN_ON(I915_READ(PFIT_CONTROL) & PFIT_ENABLE); i9xx_pfit_enable()
5191 I915_WRITE(PFIT_CONTROL, pipe_config->gmch_pfit.control); i9xx_pfit_enable()
6263 I915_READ(PFIT_CONTROL)); i9xx_pfit_disable()
6264 I915_WRITE(PFIT_CONTROL, 0); i9xx_pfit_disable()
7983 tmp = I915_READ(PFIT_CONTROL); i9xx_get_pfit_config()
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| H A D | i915_reg.h | 3530 #define PFIT_CONTROL (dev_priv->info.display_mmio_offset + 0x61230) macro
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