Searched refs:PCLK_UART2 (Results 1 - 64 of 64) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h36 #define PCLK_UART2 18 macro
H A Ds3c2412.h51 #define PCLK_UART2 39 macro
H A Ds3c2443.h71 #define PCLK_UART2 74 macro
H A Dexynos7-clk.h97 #define PCLK_UART2 2 macro
H A Dsamsung,s3c64xx-clock.h89 #define PCLK_UART2 71 macro
H A Drk3188-cru-common.h90 #define PCLK_UART2 334 macro
H A Drk3288-cru.h141 #define PCLK_UART2 343 macro
H A Drk3368-cru.h130 #define PCLK_UART2 343 macro
/linux-4.4.14/drivers/clk/samsung/
H A Dclk-s3c2410.c126 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 12, 0, 0),
221 ALIAS(PCLK_UART2, "s3c2410-uart.2", "uart"),
224 ALIAS(PCLK_UART2, "s3c2410-uart.2", "clk_uart_baud0"),
309 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
312 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2412.c161 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0),
187 ALIAS(PCLK_UART2, "s3c2412-uart.2", "uart"),
190 ALIAS(PCLK_UART2, "s3c2412-uart.2", "clk_uart_baud2"),
H A Dclk-s3c2443.c186 GATE(PCLK_UART2, "uart2", "pclk", PCLKCON, 2, 0, 0),
196 ALIAS(PCLK_UART2, "s3c2440-uart.2", "uart"),
200 ALIAS(PCLK_UART2, "s3c2440-uart.2", "clk_uart_baud2"),
H A Dclk-s3c64xx.c308 GATE_BUS(PCLK_UART2, "pclk_uart2", "pclk", PCLK_GATE, 3),
413 ALIAS(PCLK_UART2, "s3c6400-uart.2", "uart"),
H A Dclk-exynos7.c755 GATE(PCLK_UART2, "pclk_uart2", "mout_aclk_peric1_66_user",
/linux-4.4.14/drivers/clk/rockchip/
H A Dclk-rk3188.c502 GATE(PCLK_UART2, "pclk_uart2", "pclk_peri", 0, RK2928_CLKGATE_CON(8), 2, GFLAGS),
H A Dclk-rk3368.c682 GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 5, GFLAGS),
H A Dclk-rk3288.c649 GATE(PCLK_UART2, "pclk_uart2", "pclk_cpu", 0, RK3288_CLKGATE_CON(11), 9, GFLAGS),

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