Searched refs:PCLK_UART0 (Results 1 - 64 of 64) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Ds3c2410.h34 #define PCLK_UART0 16 macro
H A Ds3c2412.h53 #define PCLK_UART0 41 macro
H A Ds3c2443.h69 #define PCLK_UART0 72 macro
H A Dexynos7-clk.h81 #define PCLK_UART0 1 macro
H A Dsamsung,s3c64xx-clock.h91 #define PCLK_UART0 73 macro
H A Drk3188-cru-common.h88 #define PCLK_UART0 332 macro
H A Drk3288-cru.h139 #define PCLK_UART0 341 macro
H A Drk3368-cru.h128 #define PCLK_UART0 341 macro
/linux-4.4.14/drivers/clk/samsung/
H A Dclk-s3c2410.c128 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 10, 0, 0),
219 ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"),
222 ALIAS(PCLK_UART0, "s3c2410-uart.0", "clk_uart_baud0"),
307 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
310 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
H A Dclk-s3c2412.c163 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0),
185 ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"),
188 ALIAS(PCLK_UART0, "s3c2412-uart.0", "clk_uart_baud2"),
H A Dclk-s3c2443.c188 GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0),
194 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
198 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
H A Dclk-s3c64xx.c310 GATE_BUS(PCLK_UART0, "pclk_uart0", "pclk", PCLK_GATE, 1),
415 ALIAS(PCLK_UART0, "s3c6400-uart.0", "uart"),
H A Dclk-exynos7.c664 GATE(PCLK_UART0, "pclk_uart0", "mout_aclk_peric0_66_user",
/linux-4.4.14/drivers/clk/rockchip/
H A Dclk-rk3188.c622 GATE(PCLK_UART0, "pclk_uart0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
709 GATE(PCLK_UART0, "pclk_uart0", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
H A Dclk-rk3368.c774 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 7, GFLAGS),
H A Dclk-rk3288.c695 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 8, GFLAGS),

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