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Searched refs:MMU_REG_BASE (Results 1 – 5 of 5) sorted by relevance

/linux-4.4.14/arch/m32r/include/asm/
Dm32r.h77 #define MMU_REG_BASE (0xffff0000) macro
83 #define MATM MMU_REG_BASE /* MMU Address Translation Mode
85 #define MPSZ (0x04 + MMU_REG_BASE) /* MMU Page Size Designation Register */
86 #define MASID (0x08 + MMU_REG_BASE) /* MMU Address Space ID Register */
87 #define MESTS (0x0c + MMU_REG_BASE) /* MMU Exception Status Register */
88 #define MDEVA (0x10 + MMU_REG_BASE) /* MMU Operand Exception Virtual
90 #define MDEVP (0x14 + MMU_REG_BASE) /* MMU Operand Exception Virtual Page
92 #define MPTB (0x18 + MMU_REG_BASE) /* MMU Page Table Base Register */
93 #define MSVA (0x20 + MMU_REG_BASE) /* MMU Search Virtual Address
95 #define MTOP (0x24 + MMU_REG_BASE) /* MMU TLB Operation Register */
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Dtlbflush.h71 : "r" (page), "i" (MMU_REG_BASE), "i" (MSVA_offset), in __flush_tlb_page()
/linux-4.4.14/arch/m32r/boot/
Dsetup.S124 seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher
125 or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower
/linux-4.4.14/arch/m32r/mm/
Dmmu.S35 seth r3, #high(MMU_REG_BASE)
220 seth r3, #high(MMU_REG_BASE)
323 seth r0, #high(MMU_REG_BASE) ; Set MMU_REG_BASE higher
324 or3 r0, r0, #low(MMU_REG_BASE) ; Set MMU_REG_BASE lower
Dfault.c405 : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE), in update_mmu_cache()