Searched refs:MII_ADDR_C45 (Results 1 – 10 of 10) sorted by relevance
16 #define BCM87XX_PMD_RX_SIGNAL_DETECT (MII_ADDR_C45 | 0x1000a)17 #define BCM87XX_10GBASER_PCS_STATUS (MII_ADDR_C45 | 0x30020)18 #define BCM87XX_XGXS_LANE_STATUS (MII_ADDR_C45 | 0x40018)20 #define BCM87XX_LASI_CONTROL (MII_ADDR_C45 | 0x39002)21 #define BCM87XX_LASI_STATUS (MII_ADDR_C45 | 0x39005)61 u32 regnum = MII_ADDR_C45 | (devid << 16) | reg; in bcm87xx_of_reg_init()
160 if (reg & MII_ADDR_C45) { in mdiobb_read()191 if (reg & MII_ADDR_C45) { in mdiobb_write()
191 if (regnum & MII_ADDR_C45) { in octeon_mdiobus_read()233 if (regnum & MII_ADDR_C45) { in octeon_mdiobus_write()
224 reg_addr = MII_ADDR_C45 | dev_addr << 16 | MDIO_DEVS2; in get_phy_c45_devs_in_pkg()230 reg_addr = MII_ADDR_C45 | dev_addr << 16 | MDIO_DEVS1; in get_phy_c45_devs_in_pkg()291 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID1; in get_phy_c45_ids()297 reg_addr = MII_ADDR_C45 | i << 16 | MII_PHYSID2; in get_phy_c45_ids()
138 if (regnum & MII_ADDR_C45) { in xgmac_mdio_write()159 if (regnum & MII_ADDR_C45) { in xgmac_mdio_write()194 if (regnum & MII_ADDR_C45) { in xgmac_mdio_read()213 if (regnum & MII_ADDR_C45) { in xgmac_mdio_read()
147 #define MII_ADDR_C45 (1<<30) macro623 MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); in phy_read_mmd()726 regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); in phy_write_mmd()
225 u8 is_c45 = !!(regnum & MII_ADDR_C45); in hns_mdio_write()287 u8 is_c45 = !!(regnum & MII_ADDR_C45); in hns_mdio_read()
92 if (phyreg & MII_ADDR_C45) { in sxgbe_mdio_access()
1283 MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff)))1290 MII_ADDR_C45 | (_mmd << 16) | ((_reg) & 0xffff), (_val)))
881 if (mmd_reg & MII_ADDR_C45) in xgbe_read_mmd_regs()882 mmd_address = mmd_reg & ~MII_ADDR_C45; in xgbe_read_mmd_regs()908 if (mmd_reg & MII_ADDR_C45) in xgbe_write_mmd_regs()909 mmd_address = mmd_reg & ~MII_ADDR_C45; in xgbe_write_mmd_regs()