Searched refs:MDCNFG (Results 1 – 7 of 7) sorted by relevance
153 MDCNFG |= MDCNFG_CDB2; in sa1100_update_dram_timings()161 MDCNFG = settings->mdcnfg; in sa1100_update_dram_timings()168 MDCNFG |= MDCNFG_CDB2; in sa1100_update_dram_timings()176 MDCNFG = settings->mdcnfg; in sa1100_update_dram_timings()
165 sd->mdcnfg = MDCNFG & 0x007f007f; in sdram_calculate_timing()294 : "r" (&MDCNFG), "r" (&PPCR), "0" (sd.mdcnfg), in sa1110_target()
246 uint32_t mdcnfg = __raw_readl(MDCNFG); in init_sdram_rows()
102 ldr r9, =MDCNFG130 @ Step 4 clear DE bis in MDCNFG
18 #define MDCNFG (SMEMC_VIRT + 0x00) /* SDRAM Configuration Register 0 */ macro
772 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0), in __sa1111_probe()773 FExtr(MDCNFG, MDCNFG_SA1110_TDL0)); in __sa1111_probe()
1367 #define MDCNFG __REG(0xA0000000) /* DRAM CoNFiGuration reg. */ macro