Searched refs:IRQ2 (Results 1 - 68 of 68) sorted by relevance

/linux-4.4.14/arch/sh/kernel/cpu/sh3/
H A Dsetup-sh3.c21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator in enum:__anon2628
26 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
34 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
40 { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
44 { 0xa4000010, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7705.c25 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator in enum:__anon2629
60 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh770x.c29 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator in enum:__anon2630
75 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7710.c24 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator in enum:__anon2631
62 { 0xa4000016, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
H A Dsetup-sh7720.c231 IRQ0, IRQ1, IRQ2, IRQ3, enumerator in enum:__anon2632
275 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
/linux-4.4.14/arch/arm/mach-shmobile/
H A Dregulator-quirk-rcar-gen2.c6 * to the same interrupt pin (IRQ2) on the SoC.
42 #define REGULATOR_IRQ_MASK BIT(2) /* IRQ2, active low */
110 dev_info(dev, "IRQ2 is not asserted, removing quirk\n"); regulator_quirk_notify()
136 pr_debug("%s: IRQ2 is not asserted, not installing quirk\n", rcar_gen2_regulator_quirk()
142 pr_info("IRQ2 is asserted, installing da9063/da9210 regulator quirk\n"); rcar_gen2_regulator_quirk()
/linux-4.4.14/arch/sh/kernel/cpu/sh2/
H A Dsetup-sh7619.c23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2617
33 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
51 { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
H A Dsetup-mxg.c20 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2622
37 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
88 { 0xfffd9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7201.c22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2623
54 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
154 { 0xfffe9418, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7203.c21 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2624
48 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
140 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7206.c22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2625
46 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
109 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7264.c22 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2626
53 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
193 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7269.c23 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2627
57 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
210 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
/linux-4.4.14/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7366.c258 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2663
280 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
346 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
363 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
368 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
373 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7343.c316 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2662
340 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
411 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
426 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
431 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
436 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7763.c244 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2670
345 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
352 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
356 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
361 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
367 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7780.c307 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2672
388 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
395 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
399 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
404 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
410 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-shx3.c173 IRQ0, IRQ1, IRQ2, IRQ3, enumerator in enum:__anon2675
267 { IRQ0, IRQ1, IRQ2, IRQ3 } },
294 { 0xfe410010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
320 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
324 { 0xfe41001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
H A Dsetup-sh7722.c531 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2664
554 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
624 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
641 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
646 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
651 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7723.c451 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2665
489 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
620 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
637 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
642 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
647 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7734.c307 IRQ0, IRQ1, IRQ2, IRQ3, enumerator in enum:__anon2668
541 INTC_VECT(IRQ2, 0x2C0), INTC_VECT(IRQ3, 0x300),
546 { IRQ0, IRQ1, IRQ2, IRQ3, } },
551 { IRQ0, IRQ1, IRQ2, IRQ3, } },
556 { IRQ0, IRQ1, IRQ2, IRQ3, } },
561 { IRQ0, IRQ1, IRQ2, IRQ3, } },
H A Dsetup-sh7785.c384 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2673
448 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
468 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
493 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
502 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
508 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7770.c345 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, enumerator in enum:__anon2671
469 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
475 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, } },
479 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
484 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
H A Dsetup-sh7786.c480 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2674
580 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 },
623 { 0xfe410010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
689 INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
698 { 0xfe41001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
704 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7724.c871 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2666
916 INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660),
1070 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
1091 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
1096 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
1101 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
H A Dsetup-sh7757.c794 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, enumerator in enum:__anon2669
957 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
1063 { INTPRI, 0, 32, 4, { IRQ0, IRQ1, IRQ2, IRQ3,
1127 INTC_VECT(IRQ2, 0x280), INTC_VECT(IRQ3, 0x2c0),
1136 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
1142 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
/linux-4.4.14/arch/sh/include/mach-se/mach/
H A Dse7724.h58 /* IRQ2 */
H A Dse7780.h95 #define IRQPIN_EXTINT3 2 /* IRQ2 pin */
/linux-4.4.14/arch/arm/mach-mmp/include/mach/
H A Dregs-icu.h37 * IRQ1 is routed to PJ4 IRQ, and IRQ2 is routes to PJ4 FIQ.
/linux-4.4.14/arch/powerpc/sysdev/
H A Di8259.c241 outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */ i8259_init()
247 outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */ i8259_init()
/linux-4.4.14/arch/m68k/include/asm/
H A DMC68328.h248 #define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */
252 #define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */
281 #define IRQ2_IRQ_NUM 17 /* IRQ2 */
312 #define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */
346 #define IWR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
376 #define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
410 #define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
H A DMC68EZ328.h211 #define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */
215 #define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */
240 #define IRQ2_IRQ_NUM 17 /* IRQ2 */
266 #define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */
295 #define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
324 #define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
430 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */
H A DMC68VZ328.h214 #define ICR_ET2 0x0400 /* Edge Trigger Select for IRQ2 */
218 #define ICR_POL2 0x4000 /* Polarity Control for IRQ2 */
246 #define IRQ2_IRQ_NUM 17 /* IRQ2 */
276 #define IMR_MIRQ2 (1 << IRQ2_IRQ_NUM) /* Mask IRQ2 */
305 #define ISR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
334 #define IPR_IRQ2 (1 << IRQ2_IRQ_NUM) /* IRQ2 */
440 #define PD_IRQ2 0x20 /* Use IRQ2 as PD[5] */
/linux-4.4.14/drivers/vme/bridges/
H A Dvme_tsi148.h984 #define TSI148_LCSR_VICR_CNTS_IRQ2 (3<<22) /* IRQ2 to Cntr */
989 #define TSI148_LCSR_VICR_EDGIS_IRQ2 (3<<20) /* IRQ2 to Edge */
997 #define TSI148_LCSR_VICR_IRQ2F_M (3<<16) /* IRQ2* Function MASK */
1048 #define TSI148_LCSR_INTEN_IRQ2EN (1<<2) /* IRQ2 */
1088 #define TSI148_LCSR_INTEO_IRQ2EO (1<<2) /* IRQ2 */
1128 #define TSI148_LCSR_INTS_IRQ2S (1<<2) /* IRQ2 */
1199 #define TSI148_LCSR_INTM2_IRQ2M_M (3<<4) /* IRQ2 */
/linux-4.4.14/arch/x86/kernel/
H A Dirqinit.c46 * IRQ2 is cascade interrupt to second interrupt controller
H A Di8259.c179 /* 'Specific EOI' to master-IRQ2 */ mask_and_ack_8259A()
H A Dmpparse.c318 continue; /* IRQ2 is never connected */ construct_default_ioirq_mptable()
/linux-4.4.14/drivers/irqchip/
H A Dirq-i8259.c177 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ mask_and_ack_8259A()
292 * IRQ2 is cascade interrupt to second interrupt controller
/linux-4.4.14/drivers/parisc/
H A Deisa.c219 eisa_out8(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */ eisa_irq()
340 /* Reserve IRQ2 */ eisa_probe()
/linux-4.4.14/arch/sh/boards/
H A Dboard-magicpanelr2.c173 * P4 GPO(nu); P3 IRQ3(LAN_IRQ); P2 IRQ2(CAN3_IRQ); setup_port_multiplexing()
374 irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */ init_mpr2_IRQ()
/linux-4.4.14/drivers/mfd/
H A Dwm8997-tables.c677 { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */
678 { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */
679 { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */
680 { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */
681 { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */
683 { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */
H A Dwm5102-tables.c877 { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */
878 { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */
879 { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */
880 { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */
881 { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */
882 { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */
885 { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */
H A Dwm8998-tables.c700 { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */
701 { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */
702 { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */
703 { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */
704 { 0x00000D1C, 0xFEFF }, /* R3356 - IRQ2 Status 5 Mask */
705 { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */
707 { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */
H A Dwm5110-tables.c1510 { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */
1511 { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */
1512 { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */
1513 { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */
1514 { 0x00000D1C, 0xFFFF }, /* R3356 - IRQ2 Status 5 Mask */
1515 { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */
1516 { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */
1518 { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */
/linux-4.4.14/drivers/power/
H A Drt9455_charger.c63 #define RT9455_REG_IRQ2 0x09 /* IRQ2 reg address */
90 F_CHMIVRI, /* IRQ2 reg fields */
443 dev_err(dev, "Failed to read IRQ2 register\n"); rt9455_charger_get_health()
964 dev_err(dev, "Failed to read IRQ2 register\n"); rt9455_irq_handler_check_irq2_register()
1169 dev_err(dev, "Failed to handle IRQ2 register\n"); rt9455_irq_handler_thread()
/linux-4.4.14/arch/mips/sni/
H A Drm200.c357 * IRQ2 is cascade interrupt to second interrupt controller
/linux-4.4.14/include/linux/mfd/arizona/
H A Dregisters.h5652 * R3344 (0xD10) - IRQ2 Status 1
5672 * R3345 (0xD11) - IRQ2 Status 2
5688 * R3346 (0xD12) - IRQ2 Status 3
5752 * R3347 (0xD13) - IRQ2 Status 4
5820 * R3347 (0xD13) - IRQ2 Status 4 (Alternate layout)
5867 * R3348 (0xD14) - IRQ2 Status 5
5891 * R3348 (0xD14) - IRQ2 Status 5 (Alternate layout)
5902 * R3349 (0xD15) - IRQ2 Status 6
5970 * R3352 (0xD18) - IRQ2 Status 1 Mask
5990 * R3353 (0xD19) - IRQ2 Status 2 Mask
6006 * R3354 (0xD1A) - IRQ2 Status 3 Mask
6070 * R3355 (0xD1B) - IRQ2 Status 4 Mask
6138 * R3355 (0xD1B) - IRQ2 Status 4 Mask (Alternate layout)
6185 * R3356 (0xD1C) - IRQ2 Status 5 Mask
6221 * R3357 (0xD1D) - IRQ2 Status 6 Mask
6289 * R3359 (0xD1F) - IRQ2 Control
6787 * R3410 (0xD52) - AOD IRQ2
6849 * R3412 (0xD54) - AOD IRQ Mask IRQ2
/linux-4.4.14/drivers/pinctrl/sh-pfc/
H A Dpfc-shx3.c405 GPIO_FN(IRQ2),
H A Dpfc-r8a7795.c122 #define GPSR2_2 F_(IRQ2, IP1_3_0)
242 #define IP1_3_0 FM(IRQ2) FM(QCPV_QDE) F_(0, 0) FM(DU_EXODDF_DU_ODDF_DISP_CDE) FM(VI4_DATA2_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) FM(PWM3_B) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0)
622 PINMUX_IPSR_DATA(IP1_3_0, IRQ2),
H A Dpfc-r8a7778.c2828 /* SEL_8_7 (IRQ2) [2] */
3065 [RCAR_GP_PIN(1, 14)] = { PUPR4, 30 }, /* IRQ2 */
H A Dpfc-sh7722.c1098 GPIO_FN(IRQ2),
H A Dpfc-sh7723.c1264 GPIO_FN(IRQ2),
H A Dpfc-r8a73a4.c2608 PINMUX_IRQ(2), /* IRQ2 */
H A Dpfc-sh7757.c1372 GPIO_FN(IRQ2),
H A Dpfc-r8a7794.c1282 PINMUX_IPSR_DATA(IP10_17_15, IRQ2),
1866 /* IRQ2 */
H A Dpfc-r8a7779.c1267 PINMUX_IPSR_MSEL(IP10_8_6, IRQ2, SEL_INT2_0),
H A Dpfc-sh73a0.c3654 PINMUX_IRQ(149), /* IRQ2 */
H A Dpfc-r8a7790.c1160 PINMUX_IPSR_DATA(IP6_13_11, IRQ2),
H A Dpfc-r8a7791.c1113 PINMUX_IPSR_DATA(IP6_13_12, IRQ2),
/linux-4.4.14/arch/mips/vr41xx/common/
H A Dicu.c100 #define INT_TO_IRQ(x) ((x) + 2) /* Int0-4 -> IRQ2-6 */
/linux-4.4.14/drivers/net/ethernet/8390/
H A Dwd.c309 } else if (dev->irq == 2) /* Fixup bogosity: IRQ2 is really IRQ9 */ wd_probe1()
/linux-4.4.14/drivers/acpi/
H A Dpci_link.c453 PIRQ_PENALTY_ISA_ALWAYS, /* IRQ2 cascade */
/linux-4.4.14/drivers/scsi/
H A Desp_scsi.c1108 shost_printk(KERN_ERR, esp->host, "Reconnect IRQ2 timeout\n"); esp_reconnect_with_tag()
1114 esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n", esp_reconnect_with_tag()
/linux-4.4.14/drivers/net/appletalk/
H A Dltpc.c170 * original documentation refers to IRQ2. Since you'll be running
/linux-4.4.14/drivers/dma/
H A Dmpc512x_dma.c936 dev_err(dev, "Error requesting IRQ2!\n"); mpc_dma_probe()
/linux-4.4.14/sound/oss/
H A Dsb_common.c1078 * Set the SCSI interrupt (IRQ2/9, IRQ3 or IRQ10). The SCSI interrupt smw_midi_init()
/linux-4.4.14/arch/x86/kernel/apic/
H A Dio_apic.c2196 * Traditionally ISA IRQ2 is the cascade IRQ, and is not available
2208 * bootstrap processor. Therefore we refrain from routing IRQ2 to
/linux-4.4.14/drivers/isdn/hisax/
H A Dhfc_sx.c36 * B4 IRQ2/9 95 IRQ_B

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