| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | tonga_ih.c | 62 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in tonga_ih_enable_interrupts()
63 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 1); in tonga_ih_enable_interrupts()
79 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in tonga_ih_disable_interrupts()
80 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, ENABLE_INTR, 0); in tonga_ih_disable_interrupts()
128 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_irq_init()
129 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in tonga_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_WRITEBACK_ENABLE, 1); in tonga_ih_irq_init()
132 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, MC_VMID, 0); in tonga_ih_irq_init()
135 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RPTR_REARM, 1); in tonga_ih_irq_init()
216 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in tonga_ih_get_wptr()
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| D | cz_ih.c | 64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in cz_ih_enable_interrupts()
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in cz_ih_disable_interrupts()
129 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in cz_ih_irq_init()
130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in cz_ih_irq_init()
134 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_WRITEBACK_ENABLE, 1); in cz_ih_irq_init()
205 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in cz_ih_get_wptr()
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| D | iceland_ih.c | 64 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 1); in iceland_ih_enable_interrupts()
82 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_ENABLE, 0); in iceland_ih_disable_interrupts()
129 ih_rb_cntl = REG_SET_FIELD(0, IH_RB_CNTL, WPTR_OVERFLOW_ENABLE, 1); in iceland_ih_irq_init()
130 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_irq_init()
131 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, RB_SIZE, rb_bufsz); in iceland_ih_irq_init()
134 ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL, WPTR_WRITEBACK_ENABLE, 1); in iceland_ih_irq_init()
205 tmp = REG_SET_FIELD(tmp, IH_RB_CNTL, WPTR_OVERFLOW_CLEAR, 1); in iceland_ih_get_wptr()
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | r600.c | 3547 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_enable_interrupts()
3552 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_enable_interrupts()
3558 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in r600_disable_interrupts()
3563 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_disable_interrupts()
3675 WREG32(IH_RB_CNTL, ih_rb_cntl); in r600_irq_init()
4009 tmp = RREG32(IH_RB_CNTL); in r600_get_ih_wptr()
4011 WREG32(IH_RB_CNTL, tmp); in r600_get_ih_wptr()
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| D | si.c | 5910 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_enable_interrupts()
5915 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_enable_interrupts()
5921 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in si_disable_interrupts()
5926 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_disable_interrupts()
6041 WREG32(IH_RB_CNTL, ih_rb_cntl); in si_irq_init()
6414 tmp = RREG32(IH_RB_CNTL); in si_get_ih_wptr()
6416 WREG32(IH_RB_CNTL, tmp); in si_get_ih_wptr()
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| D | cik.c | 7260 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_enable_interrupts()
7265 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_enable_interrupts()
7278 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); in cik_disable_interrupts()
7283 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_disable_interrupts()
7427 WREG32(IH_RB_CNTL, ih_rb_cntl); in cik_irq_init()
7875 tmp = RREG32(IH_RB_CNTL); in cik_get_ih_wptr()
7877 WREG32(IH_RB_CNTL, tmp); in cik_get_ih_wptr()
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| D | sid.h | 651 #define IH_RB_CNTL 0x3e00 macro
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| D | cikd.h | 803 #define IH_RB_CNTL 0x3e00 macro
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| D | evergreend.h | 1220 #define IH_RB_CNTL 0x3e00 macro
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| D | r600d.h | 659 #define IH_RB_CNTL 0x3e00 macro
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| D | evergreen.c | 5028 tmp = RREG32(IH_RB_CNTL); in evergreen_get_ih_wptr()
5030 WREG32(IH_RB_CNTL, tmp); in evergreen_get_ih_wptr()
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