Searched refs:GEN9_FREQ_SCALER (Results 1 – 3 of 3) sorted by relevance
4709 dev_priv->rps.rp0_freq *= GEN9_FREQ_SCALER; in gen6_init_rps_frequencies()4710 dev_priv->rps.rp1_freq *= GEN9_FREQ_SCALER; in gen6_init_rps_frequencies()4711 dev_priv->rps.min_freq *= GEN9_FREQ_SCALER; in gen6_init_rps_frequencies()4712 dev_priv->rps.max_freq *= GEN9_FREQ_SCALER; in gen6_init_rps_frequencies()4713 dev_priv->rps.efficient_freq *= GEN9_FREQ_SCALER; in gen6_init_rps_frequencies()5062 min_gpu_freq = dev_priv->rps.min_freq / GEN9_FREQ_SCALER; in __gen6_update_ring_freq()5063 max_gpu_freq = dev_priv->rps.max_freq / GEN9_FREQ_SCALER; in __gen6_update_ring_freq()7266 GEN9_FREQ_SCALER); in intel_gpu_freq()7278 return DIV_ROUND_CLOSEST(val * GEN9_FREQ_SCALER, in intel_freq_opcode()
1255 max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1); in i915_frequency_info()1260 max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1); in i915_frequency_info()1266 max_freq *= (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1); in i915_frequency_info()1807 dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER; in i915_ring_freq_table()1809 dev_priv->rps.max_freq_softlimit / GEN9_FREQ_SCALER; in i915_ring_freq_table()1824 (IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1))), in i915_ring_freq_table()
2635 #define GEN9_FREQ_SCALER 3 macro