Searched refs:FLUSH (Results 1 - 75 of 75) sorted by relevance

/linux-4.4.14/arch/powerpc/include/asm/
H A Ddbdma.h34 #define FLUSH 0x2000 macro
96 out_le32(&((regs)->control), (RUN|FLUSH)<<16); \
97 while(in_le32(&((regs)->status)) & (ACTIVE|FLUSH)) \
102 out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
/linux-4.4.14/drivers/staging/slicoss/
H A Dslicoss.c188 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); slic_mcast_set_mask()
190 FLUSH); slic_mcast_set_mask()
197 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); slic_mcast_set_mask()
199 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); slic_mcast_set_mask()
259 slic_reg32_write(wphy, phy_advreg, FLUSH); slic_link_config()
267 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
274 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
289 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
316 slic_reg32_write(wphy, phy_advreg, FLUSH); slic_link_config()
319 slic_reg32_write(wphy, phy_gctlreg, FLUSH); slic_link_config()
328 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
335 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
341 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
361 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
366 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
379 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
383 slic_reg32_write(wphy, phy_config, FLUSH); slic_link_config()
434 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH); slic_card_download_gbrcv()
438 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH); slic_card_download_gbrcv()
443 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH); slic_card_download_gbrcv()
449 FLUSH); slic_card_download_gbrcv()
454 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH); slic_card_download_gbrcv()
514 baseaddress + codeaddr, FLUSH); slic_card_download()
517 instruction, FLUSH); slic_card_download()
523 instruction, FLUSH); slic_card_download()
540 FLUSH); slic_card_download()
543 FLUSH); slic_card_download()
548 FLUSH); slic_card_download()
565 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH); slic_card_download()
598 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH); slic_intagg_set()
605 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH); slic_soft_reset()
610 FLUSH); slic_soft_reset()
621 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH); slic_mac_address_config()
622 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH); slic_mac_address_config()
627 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH); slic_mac_address_config()
628 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH); slic_mac_address_config()
665 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH); slic_mac_config()
692 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); slic_config_set()
705 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); slic_config_set()
722 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); slic_config_set()
738 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); slic_config_clear()
745 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); slic_config_clear()
749 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH); slic_config_clear()
852 slic_reg32_write(intagg, level, FLUSH); slic_timer_load_check()
869 slic_reg32_write(intagg, level, FLUSH); slic_timer_load_check()
930 FLUSH); slic_upr_start()
935 upr->upr_data_h, FLUSH); slic_upr_start()
942 FLUSH); slic_upr_start()
948 upr->upr_data_h, FLUSH); slic_upr_start()
951 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); slic_upr_start()
2167 ICR_INT_MASK, FLUSH); slic_interrupt()
2188 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH); slic_interrupt()
2351 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); slic_if_init()
2366 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); slic_if_init()
2370 FLUSH); slic_if_init()
2401 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); slic_if_init()
2402 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH); slic_if_init()
2408 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); slic_if_init()
2409 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); slic_if_init()
2523 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); slic_entry_halt()
2533 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH); slic_entry_halt()
2722 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); slic_card_init()
2731 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); slic_card_init()
2748 0, FLUSH); slic_card_init()
2750 0, FLUSH); slic_card_init()
2758 0, FLUSH); slic_card_init()
2768 0, FLUSH); slic_card_init()
2848 0, FLUSH); slic_card_init()
H A Dslic.h513 #define FLUSH true macro
/linux-4.4.14/drivers/scsi/
H A Da2091.h46 volatile unsigned short FLUSH; member in struct:a2091_scsiregs
H A Da3000.h38 volatile unsigned short FLUSH; member in struct:a3000_scsiregs
H A Da3000.c127 regs->FLUSH = 1; dma_stop()
131 mb(); /* no IO until FLUSH is done */ dma_stop()
H A Dmac53c94.c113 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); mac53c94_host_reset()
139 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); mac53c94_init()
H A Da2091.c125 regs->FLUSH = 1; dma_stop()
H A Dmesh.c366 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ mesh_init()
1715 out_le32(&md->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* stop dma */ mesh_host_reset()
H A Dncr53c8xx.h1061 ** SCR_COPY sets the NO FLUSH option by default.
H A Dscsi_lib.c874 * actually transfer anything (FLUSH), so cannot use scsi_io_completion()
H A Dips.c4563 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
H A Dncr53c8xx.c3583 ** the NO FLUSH bit if present. ncr_script_copy_and_bind()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_ctl.c63 /* True if the current CTL has FLUSH bits pending for single FLUSH. */
79 /* status for single FLUSH */
460 DBG("CTL %d FLUSH pending mask %x", ctl->id, *flush_mask); fix_for_single_flush()
473 DBG("Single FLUSH mask %x,ID %d", *flush_mask, fix_for_single_flush()
486 * Some registers FLUSH bits are shared when the hardware does not have
546 * mdp5_ctl_pair() - Associate 2 booked CTLs for single FLUSH
697 * interfaces to support single FLUSH feature (Flush CTL0 and CTL1 when mdp5_ctlm_init()
698 * only write into CTL0's FLUSH register) to keep two DSI pipes in sync. mdp5_ctlm_init()
699 * Single FLUSH is supported from hw rev v3.0. mdp5_ctlm_init()
H A Dmdp5_cfg.h56 uint32_t flush_hw_mask; /* FLUSH register's hardware mask */
H A Dmdp5_ctl.h63 * mdp_ctl_flush_mask...() - Register FLUSH masks
H A Dmdp5_smp.c62 * As hw is programmed, before FLUSH, MDP5_MDP_SMP_ALLOC registers
H A Dmdp5_crtc.c458 * It is better to request pending before FLUSH and START trigger mdp5_crtc_atomic_flush()
/linux-4.4.14/block/
H A Dblk-flush.c2 * Functions to sequence FLUSH and FUA writes.
9 * REQ_{FLUSH|FUA} requests are decomposed to sequences consisted of three
19 * If the device doesn't have writeback cache, FLUSH and FUA don't make any
34 * step. This allows arbitrary merging of different types of FLUSH/FUA
50 * FUA (without FLUSH) requests.
55 * Note that a sequenced FLUSH/FUA request with DATA is completed twice.
62 * The above peculiarity requires that each FLUSH/FUA request has only one
78 /* FLUSH/FUA sequences */
152 * @rq: FLUSH/FUA request being sequenced
373 * blk_insert_flush - insert a new FLUSH/FUA request
/linux-4.4.14/include/scsi/
H A Dosd_protocol.h71 * osd2r03: 6.8 FLUSH, FLUSH COLLECTION, FLUSH OSD, FLUSH PARTITION
286 OSD_ACT___(FLUSH, 0x08)
/linux-4.4.14/arch/blackfin/mach-common/
H A Dcache.S113 do_flush FLUSH, .Ldfr
/linux-4.4.14/net/atm/
H A Dlec_arpc.h29 * 1. FLUSH started
/linux-4.4.14/drivers/hwmon/
H A Dpcf8591.c268 * previous read cycle. FLUSH IT! pcf8591_init_client()
288 * the previous read cycle. FLUSH IT! pcf8591_read_channel()
/linux-4.4.14/include/uapi/linux/
H A Dhdreg.h486 * 13: FLUSH CACHE EXT
487 * 12: FLUSH CACHE
536 * 13: FLUSH CACHE EXT
537 * 12: FLUSH CACHE
/linux-4.4.14/drivers/net/ethernet/apple/
H A Dbmac.c193 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)); dbdma_reset()
486 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_suspend()
487 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_suspend()
1414 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_close()
1415 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ bmac_close()
1504 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); bmac_tx_timeout()
1510 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); bmac_tx_timeout()
H A Dmace.c306 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); dbdma_reset()
472 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ mace_open()
482 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); mace_open()
510 rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ mace_close()
511 td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ mace_close()
/linux-4.4.14/arch/arc/mm/
H A Dcache.c229 /* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */ __cache_line_loop_v2()
341 /* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */ __cache_line_loop_v4()
397 /* Dcache provides 2 cmd: FLUSH or INV __before_dc_op()
398 * INV inturn has sub-modes: DISCARD or FLUSH-BEFORE __before_dc_op()
449 * D-Cache Line ops: Per Line INV (discard or wback+discard) or FLUSH (wback)
/linux-4.4.14/drivers/infiniband/ulp/ipoib/
H A Dipoib.h260 struct list_head rx_flush_list; /* state: FLUSH, drain not started */
261 struct list_head rx_drain_list; /* state: FLUSH, drain started */
262 struct list_head rx_reap_list; /* state: FLUSH, drain done */
/linux-4.4.14/drivers/net/usb/
H A Dnet1080.c206 (usbctl & USBCTL_FLUSH_THIS) ? " FLUSH" : "", nc_dump_usbctl()
209 (usbctl & USBCTL_FLUSH_OTHER) ? " FLUSH" : "", nc_dump_usbctl()
/linux-4.4.14/drivers/staging/rdma/amso1100/
H A Dc2_intr.c100 * FLUSH for a peer disconenct prior to the ESTABLISHED handle_mq()
/linux-4.4.14/drivers/video/fbdev/i810/
H A Di810.h71 #define FLUSH (0x04 << 23) macro
H A Di810_accel.c262 PUT_RING(PARSER | FLUSH); load_front()
/linux-4.4.14/sound/ppc/
H A Dpmac.c187 out_le32(&rec->dma->control, (RUN|WAKE|FLUSH|PAUSE) << 16); snd_pmac_dma_stop()
424 out_le32(&rec->dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16); snd_pmac_pcm_dead_xfer()
748 out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); snd_pmac_dbdma_reset()
750 out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); snd_pmac_dbdma_reset()
/linux-4.4.14/drivers/md/
H A Ddm-log-writes.c37 * Wa,Wb,Wc,Cc,Ca,FLUSH,FUAd,Cb,CFLUSH,CFUAd
44 * on data being written before invoking a FLUSH. FUA bypasses cache so once it
H A Draid5-cache.c96 * write io unit with FLUSH/FUA
/linux-4.4.14/fs/btrfs/
H A Dcheck-integrity.c41 * FLUSH request to the device where these blocks are
2251 block->is_iodone = 1; /* for FLUSH, this releases the block */ btrfsic_bio_end_io()
2288 block->is_iodone = 1; /* for FLUSH, this releases the block */ btrfsic_bh_end_io()
2912 /* Only called to write the superblock (incl. FLUSH/FUA) */ btrfsic_submit_bh()
2932 "submit_bh(rw=0x%x FLUSH, bdev=%p)\n", btrfsic_submit_bh()
2939 "btrfsic_submit_bh(%s) with FLUSH" btrfsic_submit_bh()
3030 "submit_bio(rw=0x%x FLUSH, bdev=%p)\n", __btrfsic_submit_bio()
3037 "btrfsic_submit_bio(%s) with FLUSH" __btrfsic_submit_bio()
H A Dctree.h3502 * case, use FLUSH LIMIT
/linux-4.4.14/drivers/ide/
H A Dpmac.c1471 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma->control); pmac_ide_build_dmatable()
1633 writel((FLUSH << 16) | FLUSH, &dma->control); pmac_ide_dma_test_irq()
1638 if ((status & FLUSH) == 0) pmac_ide_dma_test_irq()
/linux-4.4.14/drivers/ata/
H A Dpata_macio.c579 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control); pata_macio_freeze()
688 writel((FLUSH << 16) | FLUSH, &dma_regs->control); pata_macio_bmdma_status()
692 if ((dstat & FLUSH) == 0) pata_macio_bmdma_status()
H A Dlibata-eh.c2325 { ATA_CMD_FLUSH, "FLUSH CACHE" }, ata_get_cmd_descript()
2326 { ATA_CMD_FLUSH_EXT, "FLUSH CACHE EXT" }, ata_get_cmd_descript()
3331 * ata_eh_maybe_retry_flush - Retry FLUSH if necessary
3332 * @dev: ATA device which may need FLUSH retry
3334 * If @dev failed FLUSH, it needs to be reported upper layer
3336 * lost at least a sector and further FLUSH retrials won't make
3337 * any difference to the lost sector. However, if FLUSH failed
3338 * for other reasons, for example transmission error, FLUSH needs
3341 * This function determines whether FLUSH failure retry is
3376 ata_dev_warn(dev, "retrying FLUSH 0x%x Emask 0x%x\n", ata_eh_maybe_retry_flush()
3382 * FLUSH is complete but there's no way to ata_eh_maybe_retry_flush()
3391 ata_dev_warn(dev, "FLUSH failed Emask 0x%x\n", ata_eh_maybe_retry_flush()
H A Dlibata-scsi.c1417 * Sets up an ATA taskfile to issue FLUSH CACHE or
1418 * FLUSH CACHE EXT.
H A Dlibata-core.c4156 /* Seagate NCQ + FLUSH CACHE firmware bug */
/linux-4.4.14/drivers/infiniband/ulp/iser/
H A Diser_verbs.c1138 * Since we cannot rely on wc opcode in FLUSH errors
1160 * Notes: We may handle a FLUSH error completion and in this case
1161 * we only cleanup in case TX type was DATAOUT. For non-FLUSH
/linux-4.4.14/drivers/usb/serial/
H A Dkobil_sct.c547 "%s - Send reset_all_queues (FLUSH) URB returns: %i\n", kobil_ioctl()
/linux-4.4.14/drivers/scsi/sym53c8xx_2/
H A Dsym_fw.c433 * the NO FLUSH bit if present. sym_fw_bind_script()
H A Dsym_defs.h542 * SCR_COPY sets the NO FLUSH option by default.
/linux-4.4.14/drivers/misc/sgi-gru/
H A Dgrutlbpurge.c187 " FLUSH gruid %d, asid 0x%x, vaddr 0x%lx, vamask 0x%x, num %ld, cbmap 0x%x\n", gru_flush_tlb_range()
/linux-4.4.14/arch/x86/include/asm/
H A Dperf_event_p4.h711 P4_GEN_ESCR_EMASK(P4_EVENT_TC_MISC, FLUSH, 4),
/linux-4.4.14/fs/xfs/
H A Dxfs_buf.h78 { XBF_FLUSH, "FLUSH" }, \
/linux-4.4.14/drivers/tty/vt/
H A Dvt.c2173 #define FLUSH do { } while(0); do_con_write() macro
2175 #define FLUSH if (draw_x >= 0) { \ do_con_write()
2372 FLUSH do_con_write()
2377 FLUSH do_con_write()
2408 FLUSH do_con_write()
2420 FLUSH do_con_write()
2423 FLUSH do_con_write()
2428 #undef FLUSH do_con_write() macro
/linux-4.4.14/arch/sparc/kernel/
H A Dttable_32.S53 t_uflsh:SKIP_TRAP(0x25, unimp_flush) /* Unimplemented FLUSH inst. */
/linux-4.4.14/drivers/block/
H A Dps3vram.c362 dev_dbg(&dev->core, "FLUSH\n"); ps3vram_cache_flush()
H A Dxen-blkfront.c655 * implement it the same way. (It's also a FLUSH+FUA, blkif_queue_rw_req()
H A Dskd_main.c16 * Added support for DISCARD / FLUSH and FUA.
/linux-4.4.14/arch/mips/pci/
H A Dpci-octeon.c516 * FLUSH -> must be 1. MRV -> should be 0xFF. octeon_pci_initialize()
/linux-4.4.14/arch/blackfin/mach-bf533/include/mach/
H A Danomaly.h252 /* PREFETCH, FLUSH, and FLUSHINV Instructions Must Be Followed by a CSYNC Instruction */
/linux-4.4.14/drivers/usb/gadget/udc/
H A Dmv_u3d_core.c749 "EP FLUSH TIMEOUT for ep%d%s\n", ep->ep_num, mv_u3d_ep_fifo_flush()
771 "EP FLUSH TIMEOUT for ep%d%s\n", ep->ep_num, mv_u3d_ep_fifo_flush()
/linux-4.4.14/drivers/target/
H A Dtarget_core_user.c493 /* TODO: only if FLUSH and FUA? */ tcmu_queue_cmd_ring()
/linux-4.4.14/drivers/net/ethernet/
H A Djme.h1232 reg_dbg(jme, "REG WRITE FLUSH", val, reg); jwrite32f()
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
H A Dhtc_drv_txrx.c1046 * FIXME: Handle FLUSH later on.
/linux-4.4.14/arch/x86/kernel/cpu/
H A Dperf_event_p4.c319 P4_ESCR_EMASK_BIT(P4_EVENT_TC_MISC, FLUSH),
/linux-4.4.14/lib/zlib_deflate/
H A Ddeflate.c835 Tracev((stderr,"[FLUSH]")); \
/linux-4.4.14/kernel/trace/
H A Dblktrace.c222 what |= MASK_TC_BIT(rw, FLUSH); __blk_add_trace()
/linux-4.4.14/include/linux/
H A Djbd2.h515 * FLUSH: All updates complete, but we are still writing to disk
H A Dlibata.h161 ATA_DFLAG_FLUSH_EXT = (1 << 4), /* do FLUSH_EXT instead of FLUSH */
/linux-4.4.14/drivers/md/bcache/
H A Dbtree.c407 * which will be marked FLUSH|FUA. do_btree_node_write()
/linux-4.4.14/drivers/nvme/host/
H A Dscsi.c2232 /* Issue NVME FLUSH command prior to START STOP UNIT */ nvme_trans_start_stop()
/linux-4.4.14/fs/fuse/
H A Ddev.c254 * This is used for sending the FLUSH request, which must get to
/linux-4.4.14/arch/powerpc/platforms/powermac/
H A Dfeature.c519 out_le32(&chan->control, (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16); dbdma_restore()
/linux-4.4.14/drivers/infiniband/ulp/isert/
H A Dib_isert.c2029 * Since we cannot rely on wc opcode in FLUSH errors
/linux-4.4.14/drivers/block/drbd/
H A Ddrbd_int.h505 MD_NO_FUA, /* Users wants us to not use FUA/FLUSH on meta data dev */
/linux-4.4.14/drivers/net/wireless/iwlwifi/dvm/
H A Dcommands.h997 * operations are done. Each TX command flushed return response with the FLUSH
/linux-4.4.14/drivers/block/mtip32xx/
H A Dmtip32xx.c3856 * tag space. Since we don't support FLUSH/FUA, simply return mtip_init_cmd()
/linux-4.4.14/fs/ceph/
H A Dcaps.c1647 (flags & CHECK_CAPS_FLUSH) ? " FLUSH" : ""); ceph_check_caps()
/linux-4.4.14/tools/lguest/
H A Dlguest.c3005 verbose("FLUSH fdatasync: %i\n", ret); blk_request()

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