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Searched refs:DSPFW1 (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/gma500/
Dpsb_device.c189 regs->saveDSPFW1 = PSB_RVDC32(DSPFW1); in psb_save_display_registers()
227 PSB_WVDC32(regs->saveDSPFW1, DSPFW1); in psb_restore_display_registers()
Dcdv_intel_display.c507 fw = REG_READ(DSPFW1); in cdv_update_wm()
512 REG_WRITE(DSPFW1, fw); in cdv_update_wm()
549 REG_WRITE(DSPFW1, 0x3f880808); in cdv_update_wm()
Doaktrail_device.c199 regs->psb.saveDSPFW1 = PSB_RVDC32(DSPFW1); in oaktrail_save_display_registers()
313 PSB_WVDC32(regs->psb.saveDSPFW1, DSPFW1); in oaktrail_restore_display_registers()
Dcdv_device.c278 regs->cdv.saveDSPFW[0] = REG_READ(DSPFW1); in cdv_save_display_registers()
348 REG_WRITE(DSPFW1, regs->cdv.saveDSPFW[0]); in cdv_restore_display_registers()
Dpsb_intel_reg.h614 #define DSPFW1 0x70034 macro
Doaktrail_crtc.c337 REG_WRITE(DSPFW1, 0x3f8f0404); in oaktrail_crtc_dpms()
/linux-4.4.14/drivers/gpu/drm/i915/
Dintel_pm.c640 reg = I915_READ(DSPFW1); in pineview_update_wm()
643 I915_WRITE(DSPFW1, reg); in pineview_update_wm()
831 I915_WRITE(DSPFW1, in vlv_write_wm_values()
884 POSTING_READ(DSPFW1); in vlv_write_wm_values()
1397 I915_WRITE(DSPFW1, in g4x_update_wm()
1473 I915_WRITE(DSPFW1, FW_WM(srwm, SR) | in i965_update_wm()
3938 tmp = I915_READ(DSPFW1); in vlv_read_wm_values()
Di915_reg.h4572 #define DSPFW1 (dev_priv->info.display_mmio_offset + 0x70034) macro