Searched refs:CTRL1 (Results 1 – 10 of 10) sorted by relevance
| /linux-4.4.14/drivers/net/ethernet/amd/ |
| D | am79c961a.h | 73 #define CTRL1 5 macro
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| D | am79c961a.c | 395 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND); in am79c961_setmulticastlist()
400 while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) { in am79c961_setmulticastlist()
422 write_rreg(dev->base_addr, CTRL1, 0); in am79c961_setmulticastlist()
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| D | amd8111e.h | 62 #define CTRL1 0x6C /* Control1 register */ macro
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| D | amd8111e.c | 450 reg_val = readl(mmio + CTRL1); in amd8111e_restart()
452 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 ); in amd8111e_restart()
589 writel(CTRL1_DEFAULT, mmio + CTRL1); in amd8111e_init_hw_default()
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| /linux-4.4.14/sound/soc/codecs/ |
| D | ak4613.c | 30 #define CTRL1 0x03 /* Control 1 */ macro
343 snd_soc_update_bits(codec, CTRL1, FMT_MASK, fmt_ctrl); in ak4613_dai_hw_params()
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| /linux-4.4.14/drivers/net/ethernet/intel/ixgb/ |
| D | ixgb_hw.c | 107 IXGB_WRITE_REG(hw, CTRL1, ctrl_reg); in ixgb_mac_reset()
319 IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
321 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST); in ixgb_init_hw()
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| D | ixgb_ethtool.c | 236 *reg++ = IXGB_READ_REG(hw, CTRL1); /* 1 */ in ixgb_get_regs()
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| /linux-4.4.14/Documentation/devicetree/bindings/mfd/ |
| D | s2mps11.txt | 26 connected to the ground so the PMIC must manually set PWRHOLD bit in CTRL1
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| /linux-4.4.14/drivers/regulator/ |
| D | max77802.c | 443 .enable_reg = MAX77802_REG_BUCK ## num ## CTRL1, \
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| /linux-4.4.14/drivers/media/i2c/soc_camera/ |
| D | ov2640.c | 100 #define CTRL1 0xC3 /* DSP Module enable 1 */ macro
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